Patents by Inventor Yumiko Kawano

Yumiko Kawano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040025789
    Abstract: A metal CVD process includes a step (A) of introducing a gaseous source material containing a metal carbonyl compound into a process space adjacent to a surface of a substrate to be processed in such a manner that the metal carbonyl compound has a first partial pressure, and a step (B) of depositing a metal film on the surface of the substrate by introducing a gaseous source material containing the metal carbonyl compound into the process space in such a mater that the metal carbonyl compound has a second, smaller partial pressure. The step (A) is conducted such that there is caused no substantial deposition of the metal film on the substrate.
    Type: Application
    Filed: July 14, 2003
    Publication date: February 12, 2004
    Applicant: Tokyo Electron Limited
    Inventors: Hideaki Yamasaki, Tatsuo Hatano, Tsukasa Matsuda, Taro Ikeda, Kazuhito Nakamura, Koumei Matsuzawa, Yumiko Kawano, Mitsuhiro Tachibana
  • Publication number: 20040007180
    Abstract: A film-formation apparatus includes a film-formation chamber and a source gas supplying apparatus supplying a source gas to the film-formation chamber together with a carrier gas, wherein the source gas supplying apparatus includes a concentration detector detecting a concentration of the source gas and a gas flow controller controlling a flow rate of an inert gas added to the carrier gas based on a result of measurement of the concentration of the source gas obtained by the concentration detector.
    Type: Application
    Filed: July 10, 2003
    Publication date: January 15, 2004
    Applicant: Tokyo Electron Limited
    Inventors: Hideaki Yamasaki, Yumiko Kawano
  • Publication number: 20030148605
    Abstract: A CVD process of forming a conductive film containing Ti, Si and N includes a first step of supplying gaseous sources of Ti, Si and N simultaneously to grow a conductive film and a second step of supplying the gaseous sources of Ti, Si and N in a state that a flow rate of the gaseous source of Ti is reduced, to grow the conductive film further, wherein the first step and the second step are conducted alternately.
    Type: Application
    Filed: August 2, 2002
    Publication date: August 7, 2003
    Inventors: Yukihiro Shimogaki, Yumiko Kawano
  • Patent number: 6548112
    Abstract: A CVD reactor is provided with a precursor delivery system that is integrally connected to the reactor chamber. Liquid precursor such as a copper or other metal-organic precursor is atomized at the entry of a high flow-conductance vaporizer, preferably with the assistance of an inert sweep gas. Liquid precursor is maintained, when in an unstable liquid state, at or below room temperature. In the vaporizer, heat is introduced to uniformly heat the atomized precursor. The vaporized precursor is passed into a diffuser which diffuses the vapor, either directly or through a showerhead, into the reaction chamber.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: April 15, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Joseph T. Hillman, Tugrul Yasar, Kenichi Kubo, Vincent Vezin, Hideaki Yamasaki, Yasuhiko Kojima, Yumiko Kawano, Hideki Yoshikawa
  • Publication number: 20030037730
    Abstract: An object of the present invention is to ensure the stable operation of a vacuum pump for discharging an unused source gas and reaction byproduct gases from a low-pressure processing chamber, to recover the reaction byproducts efficiently for the effective utilization of resources and reduction of running costs. A low-pressure CVD system has a processing vessel (10) for carrying out a low-pressure CVD process for forming a copper film, a source gas supply unit (12) for supplying an organic copper compound as a source gas, such as Cu(I)hfacTMVS, into the processing vessel (10), and an evacuating system (14) for evacuating the processing vessel (10). The evacuating system (14) includes a vacuum pump (26), a high-temperature trapping device (28) disposed above the vacuum pump (26) with respect to the flowing direction of a gas, and a low-temperature trapping device (30) disposed below the vacuum pump with respect to the flowing direction of a gas.
    Type: Application
    Filed: October 23, 2002
    Publication date: February 27, 2003
    Applicant: Tokyo Electron Limited
    Inventors: Hideaki Yamasaki, Yumiko Kawano, Kenichi Kubo, Susumu Arima
  • Publication number: 20030038314
    Abstract: A semiconductor device includes at least one interlevel insulating film, a storage electrode, a capacitor insulating film, a plate electrode, and a protective film. The interlevel insulating film is arranged on a semiconductor substrate. The storage electrode is made of a metal material and arranged on the interlevel insulating film. The capacitor insulating film is made of an insulating metal oxide and arranged on the storage electrode. The plate electrode is made of tungsten nitride and arranged on the capacitor insulating film. The protective film is arranged on the plate electrode to suppress outward diffusion of nitrogen from the plate electrode. A method of manufacturing the semiconductor device is also disclosed.
    Type: Application
    Filed: October 23, 2002
    Publication date: February 27, 2003
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hideaki Yamasaki, Yumiko Kawano
  • Publication number: 20030003729
    Abstract: A metal film forming method, includes the steps of (a) (s13, s15) supplying a plural kinds of ingredient gases to a base barrier film (3) in sequence, wherein at least one of the gases includes a metal, and (b) (s14, s16) vacuum-exhausting the ingredient gases of the step (a) or substituting the ingredient gases of the step (a) by an other kind of gas after the ingredient gases of the step (a) are supplied respectively, thereby an extremely thin film (5) of the metal is formed on the base barrier film (3).
    Type: Application
    Filed: July 16, 2002
    Publication date: January 2, 2003
    Inventors: Hideaki Yamasaki, Mitsuhiro Tachibana, Kazuya Okubo, Kenji Suzuki, Yumiko Kawano
  • Patent number: 6489198
    Abstract: A semiconductor device includes at least one interlevel insulating film, a storage electrode, a capacitor insulating film, a plate electrode, and a protective film. The interlevel insulating film is arranged on a semiconductor substrate. The storage electrode is made of a metal material and arranged on the interlevel insulating film. The capacitor insulating film is made of an insulating metal oxide and arranged on the storage electrode. The plate electrode is made of tungsten nitride and arranged on the capacitor insulating film. The protective film is arranged on the plate electrode to suppress outward diffusion of nitrogen from the plate electrode. A method of manufacturing the semiconductor device is also disclosed.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: December 3, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Hideaki Yamasaki, Yumiko Kawano
  • Patent number: 6486063
    Abstract: In a semiconductor device manufacturing method, an interlevel insulating film is formed on a silicon substrate. A trench is formed in the interlevel insulating film. A lower underlying film made of a tungsten-based material is formed by thermal chemical vapor deposition to cover a bottom surface and side surface of the trench. An upper underlying film made of a tungsten-based material is formed by thermal chemical vapor deposition on an entire region on the lower underlying film. A copper film made of copper fills the trench. The upper underlying film is formed in accordance with thermal chemical vapor deposition by supplying a tungsten source gas and the other source gas such that the other source gas is supplied in an amount lager than that of the tungsten source gas. The lower underlying film is formed in accordance with thermal chemical vapor deposition by increasing a content of the tungsten source gas to be larger than to that of the other source gas in formation of the lower underlying film.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: November 26, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Hideaki Yamasaki, Yumiko Kawano
  • Publication number: 20020173078
    Abstract: As a preparation process, a gas supply source 10A supplies WF6 gas for restricting formation of nuclei for growing a metal film onto a surface of a process target semiconductor wafer W for a predetermined period of time. After the preparation process is performed, the gas supply source 10A and a gas supply source 10B respectively supply WF6 gas and NH3 gas onto the surface of the semiconductor wafer W to which the preparation process has been applied, for a predetermined period of time. Thus, a tungsten nitride film which is a metal compound film whose surface has bumps is formed on the semiconductor wafer W. A controller 51 controls operations of the gas supply sources 10A and 10B, and the like in accordance with a program or the like previously provided.
    Type: Application
    Filed: January 18, 2002
    Publication date: November 21, 2002
    Inventors: Yumiko Kawano, Hideaki Yamasaki, Gishi Chung
  • Patent number: 6436203
    Abstract: The present invention provides a CVD apparatus and a CVD method for use in forming an Al/Cu multilayered film. The Al/Cu multilayered film is formed in the CVD apparatus comprising a chamber for placing a semiconductor wafer W, a susceptor for mounting the semiconductor wafer W thereon, an Al raw material supply system for introducing a gasified Al raw material into the chamber and a Cu raw material supply system for introducing a gasified Cu raw material into the chamber. The Al/Cu multilayered film is formed by repeating a series of steps consisting of introducing the Al raw material gas into the chamber, depositing the Al film on the semiconductor wafer W by a CVD method, followed by generating a plasma in the chamber in which the Cu raw material gas has been introduced and depositing the Cu film on the semiconductor wafer W by a CVD method. The Al/Cu multilayered film thus obtained is subjected to a heating treatment (annealing), thereby forming a desired Al/Cu multilayered film.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: August 20, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Takeshi Kaizuka, Takashi Horiuchi, Masami Mizukami, Takashi Mochizuki, Yumiko Kawano, Hideaki Yamasaki
  • Patent number: 6399484
    Abstract: A semiconductor device fabricating method includes a preparatory process that brings a first source gas containing tungsten atoms into contact with a workpiece and that does not bring a second source gas containing nitrogen atoms into contact with the workpiece, and a film forming process that forms a tungsten nitride film on the workpiece by using the first and the second source gases so as to fabricate a semiconductor device. The semiconductor device fabricating method is capable of preventing the tungsten nitride film from peeling off from a layer underlying the same when the tungsten nitride film is subjected to heat treatment.
    Type: Grant
    Filed: October 25, 1999
    Date of Patent: June 4, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Hideaki Yamasaki, Satoshi Yonezawa, Susumu Arima, Yumiko Kawano, Mitsuhiro Tachibana, Keizo Hosoda
  • Publication number: 20020027240
    Abstract: A semiconductor device includes at least one interlevel insulating film, a storage electrode, a capacitor insulating film, a plate electrode, and a protective film. The interlevel insulating film is arranged on a semiconductor substrate. The storage electrode is made of a metal material and arranged on the interlevel insulating film. The capacitor insulating film is made of an insulating metal oxide and arranged on the storage electrode. The plate electrode is made of tungsten nitride and arranged on the capacitor insulating film. The protective film is arranged on the plate electrode to suppress outward diffusion of nitrogen from the plate electrode. A method of manufacturing the semiconductor device is also disclosed.
    Type: Application
    Filed: March 21, 2001
    Publication date: March 7, 2002
    Applicant: Tokyo Electron Limited
    Inventors: Hideaki Yamasaki, Yumiko Kawano
  • Publication number: 20010034127
    Abstract: In a semiconductor device manufacturing method, an interlevel insulating film is formed on a silicon substrate. A trench is formed in the interlevel insulating film. A lower underlying film made of a tungsten-based material is formed by thermal chemical vapor deposition to cover a bottom surface and side surface of the trench. An upper underlying film made of a tungsten-based material is formed by thermal chemical vapor deposition on an entire region on the lower underlying film. A copper film made of copper fills the trench. The upper underlying film is formed in accordance with thermal chemical vapor deposition by supplying a tungsten source gas and the other source gas such that the other source gas is supplied in an amount lager than that of the tungsten source gas. The lower underlying film is formed in accordance with thermal chemical vapor deposition by increasing a content of the tungsten source gas to be larger than to that of the other source gas in formation of the lower underlying film.
    Type: Application
    Filed: February 28, 2001
    Publication date: October 25, 2001
    Applicant: Tokyo Electron Limited
    Inventors: Hideaki Yamasaki, Yumiko Kawano
  • Publication number: 20010020715
    Abstract: A semiconductor device includes an interlevel insulating film, a contact plug, a barrier film, a first electrode, a capacitor insulating file, and a second electrode. The interlevel insulating film is formed on a semiconductor substrate. The contact plug extends through the interlevel insulating film and is formed from a conductive material. The barrier film is formed from a tungsten-based material on the upper surface of the contact plug. The first electrode is connected to the contact plug via the barrier film and formed from a metal material on the interlevel insulating film. The capacitor insulating film is formed from an insulating metal oxide on the first electrode. The second electrode is insulated by the capacitor insulating film and formed on the surface of the first electrode.
    Type: Application
    Filed: February 28, 2001
    Publication date: September 13, 2001
    Applicant: Tokyo Electron Limited
    Inventors: Hideaki Yamasaki, Yumiko Kawano
  • Patent number: 6210486
    Abstract: A CVD film forming apparatus includes a susceptor, provided in a process chamber, having a surface of an area smaller than that of a wafer. A process gas is supplied to a top surface of the wafer mounted on the susceptor, thereby forming a CVD film on the top surface. A film formation preventing gas is supplied in a direction from the rear surface of the wafer toward a peripheral edge thereof at a flow rate which prevents the process gas from flowing to the rear surface of the wafer.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: April 3, 2001
    Assignee: Tokyo Electron Limited
    Inventors: Masami Mizukami, Takashi Mochizuki, Yumiko Kawano
  • Patent number: 6089184
    Abstract: The present invention provides a CVD apparatus and a CVD method for use in forming an Al/Cu multilayered film. The Al/Cu multilayered film is formed in the CVD apparatus comprising a chamber for placing a semiconductor wafer W, a susceptor for mounting the semiconductor wafer W thereon, an Al raw material supply system for introducing a gasified Al raw material into the chamber and a Cu raw material supply system for introducing a gasified Cu raw material into the chamber. The Al/Cu multilayered film is formed by repeating a series of steps consisting of introducing the Al raw material gas into the chamber, depositing the Al film on the semiconductor wafer W by a CVD method, followed by generating a plasma in the chamber in which the Cu raw material gas has been introduced and depositing the Cu film on the semiconductor wafer W by a CVD method. The Al/Cu multilayered film thus obtained is subjected to a heating treatment (annealing), thereby forming a desired Al/Cu multilayered film.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: July 18, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Takeshi Kaizuka, Takashi Horiuchi, Masami Mizukami, Takashi Mochizuki, Yumiko Kawano, Hideaki Yamasaki
  • Patent number: 6066558
    Abstract: The multilevel interconnection forming method of the present invention comprises the following. A metal film containing aluminum is deposited on an insulating film of a substrate, and the metal film is patterned, to form a wiring layer of a first layer. An interlayer dielectric film forming part of the first layer is formed on an entire surface of the substrate, such that the interlayer dielectric film covers the wiring layer from upside. A hole is formed at a predetermined position of the interlayer dielectric film such that the hole reaches the wiring layer of the first layer. Aluminum is selectively deposited and filled into the hole by a CVD method, such that the aluminum is filled at a volume ratio smaller than 100% with respect to the hole. An active metal film is formed on an entire upper surface of an interlayer dielectric film including the hole filled with the aluminum. A metal layer containing aluminum is formed on the active metal film.
    Type: Grant
    Filed: March 4, 1997
    Date of Patent: May 23, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Yumiko Kawano, Shigetoshi Hosaka, Yuichi Wada, Hiroshi Kobayashi, Tetsuya Yano
  • Patent number: 6063703
    Abstract: A metal interconnection is prepared by forming an underlying metal film of high melting point metal such as Ti and/or high melting point metal compound such as TiN layers above a semiconductor substrate, plasma etching the surface of the underlying metal film in a gas atmosphere containing chloride, and forming an interconnecting metal film such as Al, Cu, Au and Ag on the underlying metal film. Alternatively, a metal interconnection is prepared by forming an insulating film above a semiconductor substrate, forming connecting holes in the insulating film, forming an underlying metal film such as TiN on the insulating film and the bottom and side wall of the connection holes by a CVD process under controlled conditions, and forming an interconnecting metal film such as Al on the underlying metal film. The TiN film has (111) preferential orientation and the aluminum film has (111) preferential orientation, smooth surface and effective coverage.
    Type: Grant
    Filed: May 19, 1998
    Date of Patent: May 16, 2000
    Assignee: Kawasaki Steel Corporation
    Inventors: Hiroshi Shinriki, Takeshi Kaizuka, Nobuyuki Takeyasu, Tomohiro Ohta, Eiichi Kondoh, Hiroshi Yamamoto, Tomoharu Katagiri, Tadashi Nakano, Yumiko Kawano
  • Patent number: 6045862
    Abstract: A CVD film forming apparatus includes a susceptor, provided in a process chamber, having a surface of an area smaller than that of a wafer. A process gas is supplied to a top surface of the wafer mounted on the susceptor, thereby forming a CVD film on the top surface. A film formation preventing gas is supplied in a direction from the rear surface of the wafer toward a peripheral edge thereof at a flow rate which prevents the process gas from flowing to the rear surface of the wafer.
    Type: Grant
    Filed: July 9, 1998
    Date of Patent: April 4, 2000
    Assignee: Tokyo Electron Limited
    Inventors: Masami Mizukami, Takashi Mochizuki, Yumiko Kawano