Abstract: A semiconductor device including a FET includes an isolation insulating layer disposed in a trench of the substrate, a gate dielectric layer disposed over a channel region of the substrate, a gate electrode disposed over the gate dielectric layer, a source and a drain disposed adjacent to the channel region, and an embedded insulating layer disposed below the source, the drain and the gate electrode and both ends of the embedded insulating layer are connected to the isolation insulating layer.

Abstract: A method includes: providing a first gate electrode over the substrate; forming a first pair of spacers on two sides of the first gate electrode; removing the first gate electrode to form a first trench between the first pair of spacers; depositing a dielectric layer in the first trench; depositing a first layer over the dielectric layer; removing the first layer from the first trench; and depositing a work function layer over the dielectric layer in the first trench.

Abstract: A memory device includes a semiconductor substrate. The memory device includes a stack of channel layers over the semiconductor substrate, each channel layer including an oxide material. The memory device includes a word line structure interleaved with the stack of channel layers. The memory device includes a source feature and a drain feature on both sides of the stack of channel layers.

Abstract: A semiconductor device includes a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a first lateral direction. The semiconductor device includes third conductive structures each extending along the first lateral direction. The third conductive structures are disposed across the first and second conductive structures. The semiconductor device includes a first semiconductor channel extending along the vertical direction. The first semiconductor channel is disposed between the third conductive structures and the first conductive structure, and between the third conductive structures and the second conductive structure. The first and second conductive structures each have a first varying width along the first lateral direction, and the first semiconductor channel has a second varying width along a second lateral direction.

Abstract: The present invention relates to a display device, comprising: a first substrate comprising a first inner surface, a first outer surface opposite to the first inner surface, a display region, a bonding region adjacent to the display region, a plurality of thin film transistors disposed on the first inner surface and corresponding to the display region; a second substrate opposite to the display region and comprising a second inner surface, a second outer surface opposite to the second inner surface, a first color resist and a second color resist each disposed on the second inner surface; a display molecular layer disposed between the first substrate and the second substrate; an electrical shielding layer disposed on the first outer surface of the first substrate, wherein the electrical shielding layer comprises a first shielding region corresponding to the first color resist and a second shielding region corresponding to the bonding region.

Abstract: Various embodiments of the present disclosure provide a memory device and methods of forming the same. In one embodiment, a memory device is provided. The memory device includes a gate electrode disposed in an insulating material layer, a ferroelectric dielectric layer disposed over the gate electrode, a metal oxide semiconductor layer disposed over the ferroelectric dielectric layer, a source feature disposed over the metal oxide semiconductor layer, wherein the source feature has a first dimension, and a source extension. The source extension includes a first portion disposed over the source feature, wherein the first portion has a second dimension that is greater than the first dimension. The source extension also includes a second portion extending downwardly from the first portion to an elevation that is lower than a top surface of the source feature.

Abstract: A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The first and second conductive structures each have a varying width along the lateral direction. The plurality of third conductive structures have respective different thicknesses in accordance with the varying width of the first and second conductive structures.

Abstract: Various embodiments of the present disclosure provide a memory device and methods of forming the same. In one embodiment, a memory device is provided. The memory device includes a first oxide material having a first sidewall and a second sidewall, a first spacer layer in contact with the first sidewall of the first oxide material, the first spacer layer having a first conductivity type, a second spacer layer in contact with the second sidewall of the first oxide material, wherein the second spacer layer has the first conductivity type. The memory device also includes a channel layer having a second conductivity type that is opposite to the first conductivity type, wherein the channel layer is in contact with the first oxide material, the first spacer layer, and the second spacer layer. The memory device further includes a ferroelectric layer in contact with the channel layer.

Abstract: A method includes: applying a first solution to a semiconductor structure of a semiconductor device to form a first coating, the semiconductor structure including a feature and the trench, the first coating being formed in the trench and over the feature, the first solution containing a metal-containing solute; heating the first coating in a multi-step procedure to turn the first coating into a first film, the multi-step procedure including heating at a first temperature, followed by heating at a second temperature not lower than the first temperature; applying a second solution onto the first film to form a second coating, the second solution containing the metal-containing solute; and heating the second coating in a multi-step procedure to turn the second coating into a second film, the multi-step procedure including heating at a third temperature, followed by heating at a fourth temperature not lower than the third temperature.

Abstract: A semiconductor device comprises a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a lateral direction. The semiconductor device further comprises a plurality of third conductive structures each extending along the lateral direction. The plurality of third conductive structures are disposed across the first and second conductive structures. The first and second conductive structures each have a varying width along the lateral direction. The plurality of third conductive structures have respective different thicknesses in accordance with the varying width of the first and second conductive structures.

Abstract: A method, an apparatus, and a device for target detection in consecutive images, and a computer-readable storage medium. A second frame is divided into multiple sub-images, before a target in the second frame in a video sequence is detected through a target-detecting network model. A first frame is searched, according to a preset rule for motion estimation, for a corresponding image block matched with each sub-image. Pixels of a sub-image, of which the matched image block is found in the first frame, are replaced with preset background pixels. Hence, a target repeating in both frames is replaced. Finally, the second frame subject to the replacement is inputted in to the target-detecting network model, to obtain a bounding box of a target object of the second frame and a category of such target object. An algorithm for target detection in consecutive images is optimized.

Abstract: A method includes: forming an interconnect structure over a substrate, the forming of the interconnect structure includes forming a memory device including a transistor. The forming of the interconnect structure includes: forming a first metallization layer and a second metallization layer over the first metallization layer; forming a gate region of the transistor in at least one of the first and second metallization layers; etching a trench disposed in the second metallization layer and exposing the gate region; depositing a gate dielectric layer in the trench over the gate region; depositing a channel layer in the trench over the gate dielectric layer; and forming two source/drain regions of the transistor over the channel layer on opposite sides of the trench. At least one of the gate region and the channel layer includes two first segments extending in the trench, wherein the first segments are parallel with each other.

Abstract: An integrated wafer debonding and cleaning apparatus and a debonding and cleaning method are provided. The integrated wafer debonding and cleaning apparatus includes an input port, a debonding module, a wafer cleaning device, and a transport device. The input port is configured to allow a substrate to be processed to enter the integrated wafer debonding and cleaning apparatus. The substrate to be processed includes a wafer and a carrier which are bonded. The debonding module is configured to debond the substrate to be processed, and to separate the wafer from the carrier. The wafer cleaning apparatus is configured to clean the wafer. The transport device is configured to transfer the substrate to be processed, the wafer, and the carrier. The debonding module and the wafer cleaning module are integrated in one apparatus for continuous processing.

Abstract: A semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device comprises a gate, a ferroelectric layer disposed on the gate; a first channel layer disposed on the ferroelectric layer, a second channel layer disposed on the ferroelectric layer, and source and drain regions disposed on the first channel layer. The first channel layer includes a first thickness and the second channel layer includes a second thickness. A ratio of the first thickness and the second thickness is less than 3/5.

Abstract: An embodiment of the invention provides a method for a location tracking, applied to a mobile device, an indoor access point (AP) and at least one indoor Internet of Things (IoT) device, comprising: receiving, by the indoor AP, a first set of location information of the mobile device from the mobile device at outdoor, wherein the first set of location information is determined according to a Global Navigation Satellite System (GNSS); determining, by the indoor AP, a second set of location information of the indoor AP according to the first set of location information; determining, by the indoor AP, a third set of location information of the at least one indoor IoT device according to the second set of location information; and transmitting, by the indoor AP, the third set of location information to the at least one indoor IoT device.

Abstract: Methods for speaker role determination and scrubbing identifying information are performed by systems and devices. In speaker role determination, data from an audio or text file is divided into respective portions related to speaking parties. Characteristics classifying the portions of the data for speaking party roles are identified in the portions to generate data sets from the portions corresponding to the speaking party roles and to assign speaking party roles for the data sets. For scrubbing identifying information in data, audio data for speaking parties is processed using speech recognition to generate a text-based representation. Text associated with identifying information is determined based on a set of key words/phrases, and a portion of the text-based representation that includes a part of the text is identified. A segment of audio data that corresponds to the identified portion is replaced with different audio data, and the portion is replaced with different text.

Abstract: A three-dimensional printer includes a projector, a tank, and a platform. The projector includes a light source, a digital micromirror device, and a controller. The digital micromirror device includes a micromirror, and the micromirror may be switched between an on state and an off state according to a control signal. The controller is electrically connected to the digital micromirror device and the light source. The controller further includes a judgement unit. The judgement unit may output the control signal to switch the micromirror to the off state when the light source is in the off state. The platform is adjacent to the tank. In addition, a manufacturing method for a three-dimensional printer is provided.

Abstract: A semiconductor device includes a first conductive structure extending along a vertical direction and a second conductive structure extending along the vertical direction. The second conductive structure is spaced apart from the first conductive structure along a first lateral direction. The semiconductor device includes third conductive structures each extending along the first lateral direction. The third conductive structures are disposed across the first and second conductive structures. The semiconductor device includes a first semiconductor channel extending along the vertical direction. The first semiconductor channel is disposed between the third conductive structures and the first conductive structure, and between the third conductive structures and the second conductive structure. The first and second conductive structures each have a first varying width along the first lateral direction, and the first semiconductor channel has a second varying width along a second lateral direction.

Abstract: A ferroelectric memory device includes a semiconductor structure, a stack structure disposed on the semiconductor structure and including multiple dielectric layers and multiple conductive layers that are alternatingly stacked, and multiple memory arrays extending through the stack structure. Each of the memory arrays includes two spaced-apart memory segments connecting to the stack structure, multiple spaced-apart channel portions each being connected to a corresponding one of the memory segments, and multiple pairs of source/bit lines that are spaced apart from each other. Each of the pairs of the source/bit lines is connected between corresponding two of the channel portions. The ferroelectric memory device further includes multiple carrier structures each being connected to one of the source/bit lines in a corresponding one of the pairs of the source/bit lines, and being separated from the other one of the source/bit lines in the corresponding one of the pairs of the source/bit lines.