Abstract: A method for preparing a bifunctional film, including: (a) drying a first polymer solution to form a film to form an anti-adhesion layer; and (b) drying a second polymer solution over the anti-adhesion layer to form a film to form an attachment layer. The first polymer solution includes a first hydrophobic solution and a first hydrophilic solution, and in the first polymer solution, the weight ratio of the solute of the first hydrophobic solution to the solute of the first hydrophilic solution is 1:0.01-1. Moreover, the second polymer solution consists of a second hydrophilic solution.

Abstract: A method for filling recessed features with a low-resistivity metal. The method includes providing a patterned substrate containing a recessed feature formed in a first layer and a second layer that is exposed in the recessed feature, forming a nucleation enhancement layer on a sidewall of the first layer in the recessed feature and depositing a metal layer in the recessed feature by vapor phase deposition, where the metal layer is deposited on the second layer and on the nucleation enhancement layer. An initial metal layer may be selectively formed on the second layer in the recessed feature before forming the nucleation enhancement layer.

Abstract: A display device and an electronic apparatus are disclosed. The display device comprises: an image-display component, which generates an image light output, wherein at least one pixel light of the image light output has light polarization components of at least two polarization states or has a polarization light component of a polarization state and a non-polarization light component; and a polarization dependent image offset component, which receives the image light output coming from the image display component and deflects the polarization light components based on the polarization states to separate each of the at least one pixel light into at least two pixel lights, or deflects the polarization light component from the non-polarization light component to separate each of the at least one pixel light into at least two pixel lights.

Abstract: A method executed at least partially by a processor includes creating a plurality of groups of paths from a plurality of paths in an integrated circuit (IC) layout diagram. Each group among the plurality of groups has a unique dominant feature among a plurality of features of the plurality of paths. The dominant feature of a group among the plurality of groups is slack. The method further includes testing at least one path in a group among the plurality of groups. The method also includes, in response to the testing indicating that the at least one path fails, modifying at least one of the IC layout diagram, at least a portion of at least one library having cells included in the IC layout diagram, or a manufacturing process for manufacturing an IC corresponding to the IC layout diagram.

Abstract: Electronic system level (ESL) design and verification of the present disclosure is utilized to provide an electronic simulation and modeling of function safety and fault management of an electronic device. A method for simulating a safety circuit includes providing an electronic architectural design to perform one or more functional behaviors of the electronic device in accordance with an electronic design specification. The method further includes modeling the safety circuit of the electronic architectural design and one or more other electronic circuits of the electronic architectural design that communicate with the safety circuit. The method further includes simulating, using the modeling, operation of the safety circuit while the electronic architectural design is performing the one or more functional behaviors. The method also includes determining whether the simulated operation of the safety circuit satisfies the electronic design specification.

Abstract: A memory macro structure includes a first memory array, a second memory array, a cell activation circuit coupled to the first and second memory arrays and positioned between the first and second memory arrays, a control circuit coupled to the cell activation circuit and positioned adjacent to the cell activation circuit, and a through-silicon via (TSV) extending through one of the cell activation circuit or the control circuit.

Abstract: An optical display system includes an information display (image-generating) component, a polarization rotator, a polarization dependent optical element, an input holographic coupler, a light guide and an output holographic coupler. By controlling the polarization of the displayed light through the polarization rotator, the polarization dependent optical element changes the viewable content to different distances from the viewer. This enables the generation of a proper light field which will then be coupled into the light guide through the input holographic coupler, and finally go through the output holographic coupler to a user's eye.

Abstract: A polarization conversion device includes a geometric phase grating and an angular selective waveplate. The geometric phase grating includes a first liquid crystal layer and is configured to diffract a unpolarized or partially polarized incident light beam into a first light beam and a second light beam (e.g., in two different diffraction orders). The first light beam is characterized by a first polarization state and propagates in a first direction. The second light beam is characterized by a second polarization state and propagates in a second direction. The angular selective waveplate includes a second liquid crystal layer, and functions as a zero or full-wave plate for the first light beam incident in the first direction and a half-wave plate for the second light beam incident in the second direction.

Abstract: A device includes a light source configured to output a light. The device also includes a display panel including a plurality of subpixel areas. The device also includes a microlens assembly disposed between the light source and the display panel. The microlens assembly includes a first microlens array configured to substantially collimate the light into a first polarized light, and a second microlens array configured to focus the first polarized light as a second polarized light propagating through apertures of the subpixel areas.

Abstract: A system includes a polarization selective optical element configured to diffract a light reflected by an object into a plurality of signal lights. The system also includes at least one optical sensor configured to receive the signal lights and generate a plurality of tracking signals for tracking the object.

Abstract: A touch sensing unit includes driving electrode groups which are arranged in a first direction, each of the driving electrode groups including a plurality of driving electrodes electrically connected in a second direction intersecting the first direction, sensing electrode groups which are arranged in the second direction, each of the sensing electrode groups including plurality of sensing electrodes electrically connected in the first direction, driving lines which are connected to the driving electrode groups, respectively, a first sensing line group including sensing lines respectively connected to first sensing electrode groups among the sensing electrode groups, and a second sensing line group including sensing lines respectively connected to second sensing electrode groups among the sensing electrode groups. The sensing lines of the first sensing line group have the same width.

Abstract: Provided is a method of detecting microbial colonies, the method including: irradiating light having coherence to a sample unit in which a sample is accommodated; detecting, by an image sensor, transmitted light passing through the sample unit to obtain a sample image in a time-series manner; analyzing the sample image by a controller after a preset time to determine the concentration level of colonies in the sample; and obtaining a spatial correlation of the coherence pattern of the sample image when the concentration level determined by the controller is a high concentration that is equal to or greater than a preset reference value, and determining information about the concentration of colonies in the sample based on the change of the spatial correlation of the coherence pattern over time.

Abstract: A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly.

Abstract: A method for processing a substrate includes performing a cyclic plasma etch process including a plurality of cycles, where each cycle of the plurality of cycles includes: causing chemical reactions with the surface of the substrate by exposing a surface of the substrate to fluorine radicals extracted from a first gas discharge plasma formed using a first gaseous mixture including a non-polymerizing fluorine compound; cooling the substrate and concurrently removing residual gaseous byproducts by flowing a second gaseous mixture over the substrate, and at the same time, suppressing the chemical reactions with the surface of the substrate; and performing a plasma surface modification process by exposing the surface of the substrate to hydrogen radicals extracted from a second gas discharge plasma formed using a third gaseous mixture including gases including nitrogen and hydrogen.

Abstract: Improved process flows and methods are provided herein for fabricating a transistor on a substrate. In the disclosed process flows and methods, a contact etch stop layer (CESL) is conformally deposited directly onto a plurality of transistor structures, and a sacrificial layer is conformally deposited directly onto the CESL to protect the CESL from oxidation and thinning during subsequent processing step(s). The sacrificial layer improves the etch stop capability of the CESL during a subsequently performed oxide etch process. By providing a CESL with improved etch stop capability, the disclosed process flows and methods provide a controlled CESL etch process, which reduces or avoids damage to underlying transistor structures.

Abstract: An input coupler component, optical display system and electronics apparatus are disclosed. The input coupler component, comprisesing: an input polarization volume grating, which is disposed to deflect an. input polarized electromagnetic wave into a waveguide in a total internal reflection manner and an input polarization management layer, which. adjusts the polarization.

Abstract: The present embodiments provide a mechanism for computing a thickness of a scanned wafer shape to determine a profile, and computing a delta correction value and a polishing end point time by using a computed PV value by the profile and a set predicted PV value and reflecting the same on the polishing time of each wafer which is under polishing. Accordingly, excellent flatness of a wafer surface can be achieved and simultaneously, a plurality of controllers can be controlled simultaneously to reduce equipment cost.

Abstract: An optical element includes a first boundary layer and a second boundary layer. A solution is disposed between the first boundary layer and the second boundary layer. The solution includes liquid crystals co-mingled with oblong photochromic dye molecules. The photochromic dye molecules are matched to the liquid crystals to offset a decrease in absorption of the photochromic dye molecules in response to a temperature increase of the photochromic dye molecules.

Abstract: A device includes a light guide. The device also includes a first in-coupling element configured to couple a first input light into the light guide, and a first out-coupling element configured to couple the first input light out of the light guide as a first output light having a first output field of view (“FOV”). The device also includes a second in-coupling element configured to couple a second input light into the light guide. The device further includes a second out-coupling element configured to couple the second input light out of the light guide as a second output light having a second output FOV substantially non-overlapping with the first output FOV. A combination of the first and second output FOVs is larger than at least one of the first or second output FOV, and the first and second input lights have orthogonal polarizations.

Abstract: Methods of a scan partitioning a circuit are disclosed. One method includes calculating a power score for circuit cells within a circuit design based on physical cell parameters of the circuit cells. For each of the circuit cells, the circuit cell is assigned to a scan group according to the power score for the circuit cell and a total power score for each scan group. A plurality of scan chains is formed. Each of the scan chains is formed from the circuit cells in a corresponding scan group based at least in part on placement data within the circuit design for each of the circuit cells. Interconnect power consumption can be assessed to determine routing among circuit cells in the scan chains.