Abstract: A FinFET device structure and method for forming the same is provided. The FinFET device structure includes an isolation structure formed over a substrate, and a gate structure formed over the isolation structure. The FinFET device structure includes a first dielectric layer formed over the isolation structure and adjacent to the gate structure and a source/drain (S/D) contact structure formed in the first dielectric layer. The FinFET device structure also includes a deep contact structure formed through the first dielectric layer and adjacent to the S/D contact structure. The deep contact structure is through the isolation structure, and a bottom surface of the S/D contact structure is higher than a bottom surface of the deep contact structure.

Abstract: A method for forming a FinFET device structure is provided. The method includes forming a fin structure over a substrate and forming a gate dielectric layer over the fin structure. The method also includes forming a gate electrode layer over the gate dielectric layer and forming a source/drain (S/D) structure adjacent to the gate electrode layer. In addition, the method includes forming an S/D contact structure over the S/D structure. The method also includes forming a first conductive layer in direct with the gate electrode layer. A bottom surface of the first conductive layer is lower than a top surface of the gate dielectric layer. The method further includes forming a second conductive layer over the first conductive layer. The gate electrode layer is electrically connected to the second conductive layer by the first conductive layer.

Abstract: A parachute system and a safety protection method of an unmanned aerial vehicle (UAV), and relates to the technical field of intelligent storage. The parachute system of the UAV includes: a sensor configured to detect the flight state of the UAV, a parachute; and a controller electrically connected with the sensor and the parachute, respectively, and configured to obtain the flight state of the UAV from the sensor, and control the parachute to open when the UAV is in an unstable state.

Abstract: Methods, systems, and devices, including computer programs encoded on computer storage media, for processing an electronic coupon link are provided. One of the methods includes: receiving, by a server, an electronic coupon link from a first user terminal; determining a first attribute of the electronic coupon link according to the electronic coupon link; determining, according to the first attribute, a storage pool corresponding to the first attribute from a plurality of storage pools; and storing the electronic coupon link in the storage pool corresponding to the first attribute, for a second user terminal to obtain the electronic coupon link in the storage pool. The storage pool may store one or more electronic coupon links.

Abstract: Semiconductor structures and methods for forming the same are provided. The method includes forming a dummy gate structure and forming a spacer on a lower portion of a sidewall of the dummy gate structure and exposing an upper portion of the sidewall of the dummy gate structure. The method further includes forming a dielectric layer covering the upper portion of the sidewall of the dummy gate structure exposed by the spacer and removing the dummy gate structure to form a tube-shaped trench. The method further includes removing a portion of the dielectric layer to form a cone-shaped trench and forming a gate structure in a bottom portion of the tube-shaped trench. The method further includes forming a hard mask structure in the cone-shaped trench and an upper portion of the tube-shaped trench, and an interface between the hard mask structure and the dielectric layer overlaps the spacer.

Abstract: A FinFET device structure is provided. The FinFET device structure includes a first gate structure formed over a fin structure, and a first capping layer formed over the first gate structure. The FinFET device structure includes a first etching stop layer formed over the first capping layer and the first gate structure, and a top surface and a sidewall surface of the first capping layer are in direct contact with the first etching stop layer.

Abstract: A method and system for providing file level restore (FLR) service for restoring one or more files stored in a plurality of file systems in a backup of a first virtual machine is provided. The method creates a FLR session for a user, including: creating a virtual disk file in a second virtual machine providing the FLR service, the virtual disk file including an empty file system being mounted as a root folder of a virtual appliance in the second virtual machine; creating a respective folder for each of the plurality of file systems under the root folder; mounting each of the plurality of file systems to the respective folder; and mounting the root folder to a folder of the second virtual machine. The method restores the one or more files by the user through accessing the folder of the second virtual machine in the FLR session.

Abstract: A lighting device (100) comprises an elongate tubular body (102) with a carrier (104) located inside the tubular body. The carrier comprises a first section (106) and a second section (108), each of which carries at least one solid state lighting element (110). The first section extends in the elongation direction of the tubular body. The second section extends from an end of the first section at an angle with respect to the first section such that the second section and the tubular body at least partially delimit an internal cavity of the tubular body. Further provided is a luminaire comprising said lighting device.

Abstract: A semiconductor device includes: an isolation insulating layer; fin structures protruding from the isolation insulating layer; gate structures, each having a metal gate and a cap insulating layer disposed over the metal gate; a first source/drain epitaxial layer and a second source/drain epitaxial layer disposed between two adjacent gate structures; and a first conductive contact disposed on the first source/drain epitaxial layer, and a second conductive contact disposed on the second source/drain epitaxial layer; a separation isolation region disposed between the first and second conductive contact; and an insulating layer disposed between the separation isolation region and the isolation insulating layer. The separation isolation region is made of a different material than the insulating layer.

Abstract: A tubular LED lighting device (10) comprising an LED, a driver (18) for driving the LED, and an electrical connector (14). The lighting device further comprises a thermally triggered switch (16) for prevention of overheating of the electrical connector. The thermally triggered switch is connected in series between the electrical connector and the driver, and the thermally triggered switch is configured to interrupt current in the event of the temperature of the electrical connector meeting a triggering condition. If a significant degree of arcing occurs the electrical connector will heat up such that the triggering condition will be met and the current flow between the electrical connector and the driver will be interrupted. There is also provided a luminaire (20) comprising the tubular LED lighting device.

Abstract: The invention relates to an extraction process for the recovery of high-boiling aldehyde products and catalysts from a hydroformylation product solution.

Abstract: A method includes forming a metal gate structure, wherein the metal gate structure includes a gate dielectric layer and a gate electrode; performing a surface treatment to a top surface of the metal gate structure, wherein the surface treatment converts a top portion of the gate electrode to an oxidation layer; forming a conductive layer above the gate electrode, wherein the forming of the conductive layer includes substituting oxygen in the oxidation layer with a metallic element; and forming a contact feature above the metal gate structure, wherein the contact feature is in direct contact with the conductive layer.

Abstract: A method includes forming a transistor including forming a source/drain region on a side of a dummy gate stack, forming a first Inter-Layer Dielectric (ILD) covering the source/drain region, and replacing the dummy gate stack with a replacement gate stack. The method further includes forming a second ILD over the first ILD and the replacement gate stack, and forming a lower source/drain contact plug electrically coupling to the source/drain region. The lower source/drain contact plug penetrates through both the first ILD and the second ILD. A third ILD is formed over the second ILD. A gate contact plug is formed in the second ILD and the third ILD. An upper source/drain contact plug is formed overlapping and contacting the lower source/drain contact plug. The upper source/drain contact plug penetrates through the third ILD. The upper source/drain contact plug and the gate contact plug are formed of different materials.

Abstract: An active device substrate including a flexible substrate, an inorganic insulation layer, an organic insulation pattern, a conductive device and a peripheral wiring is provided. The flexible substrate has an active region, a peripheral region outside the active region and a bending region connected between the active region and the peripheral region. The inorganic insulation layer is disposed on the flexible substrate and has a groove disposed in the bending region. The organic insulation pattern is disposed in the groove of the inorganic insulation layer. The peripheral wiring is extended from the active region to the conductive device in the peripheral region. The peripheral wiring is disposed on the organic insulation pattern, and the organic insulation pattern is located between the peripheral wiring and the flexible substrate.

Abstract: An automatic gain control circuit for controlling an LNA for inputting signals carrying packets, the automatic gain control circuit can perform a background calibration in the non-preamble time region of a first packet for pre-determining a gain adjustment to the LNA before the next preamble of a second packet arrives, so that the gain of the LNA can be adjusted immediately according to the pre-determined gain adjustment when the next preamble of the second packet arrives.

Abstract: A conductive layer is formed between a metal gate structure, which includes a high-k gate dielectric layer and a gate electrode, and a contact feature. The conductive layer can be selectively deposited on a top surface of the gate electrode or, alternatively, non-selectively formed on the top surface of the gate electrode and the gate dielectric layer by controlling, for example, time of deposition. The conductive layer can have a bottom portion embedded into the gate electrode. The conductive layer and the contact feature can include the same composition, though they may be formed using different deposition techniques.

Abstract: The present disclosure relates generally to systems and methods that may reduce a reduction in visual artifacts related to hysteresis of a light emitting diode (LED) electronic display. In one example, an electronic device may include a controller. The controller is may provide a signal to a pixel of a display of the electronic device while at least a portion of the display is turned off. The signal may include a first current and a second current. The first current may be designed to increase an ambient temperature corresponding to the pixel. The second current may be generated as part of an active panel conditioning operation. By applying the first current and the second current, hysteresis settling times from the pixel may improve, therefore improving speeds of sensing and compensation operations of the electronic device.

Abstract: Micro-alloyed aluminium alloys containing complex sub-micro/or nano-sized strengthening phases are provided for use for example in the automotive industry. Existing commercial alloys are treated by adding at least one of the elements from Ni, Ag, Nb, Mo, Ce, La, Y and Sc at a level of more than 0.1 wt. % but less than 0.5 wt. % on top of the existing commercial alloy containing Si, Cu, Mg, Mn, Zn, and at least one type of sub-micron sized or even nano-sized TiB2, TiC and AI2O3 solid particles at a level of more than 0.05 wt. % but less than 0.5 wt. % in the solidified castings.

Abstract: A semiconductor arrangement and method of forming the same are described. A semiconductor arrangement includes a third metal connect in contact with a first metal connect in a first active region and a second metal connect in a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes forming a first opening over the first metal connect, the STI region, and the second metal connect, and forming the third metal connect in the first opening. Forming the third metal connect over the first metal connect and the second metal connect mitigates RC coupling.

Abstract: Semiconductor devices and methods of fabricating semiconductor devices are provided. The present disclosure provides a semiconductor device that includes a first fin structure and a second fin structure each extending from a substrate; a first gate segment over the first fin structure and a second gate segment over the second fin structure; a first isolation feature separating the first and second gate segments; a first source/drain (S/D) feature over the first fin structure and adjacent to the first gate segment; a second S/D feature over the second fin structure and adjacent to the second gate segment; and a second isolation feature also disposed in the trench. The first and second S/D features are separated by the second isolation feature, and a composition of the second isolation feature is different from a composition of the first isolation feature.