Abstract: A voltage regulator includes a control circuit configured to output a plurality of enable signals, and a power stage including a plurality of phase circuits. Each phase circuit of the plurality of phase circuits includes a node, an inductor coupled between the node and an output node of the voltage regulator, a plurality of p-type transistors coupled between the node and a power supply node of the voltage regulator, and a plurality of n-type transistors coupled between the node and a reference node of the voltage regulator. Each phase circuit of the plurality of phase circuits is configured to, responsive to the plurality of enable signals, selectively couple the node to the power supply node through a first subset or all of the plurality of p-type transistors, and selectively couple the node to the reference node through a second subset or all of the plurality of n-type transistors.

Abstract: Various embodiments set forth eye tracking systems. In some embodiments, an eye tracking system includes a polarization volume hologram (PVH) combiner having a rolling k-vector design that provides relatively wide coverage of users whose eyeglasses prescriptions can vary. The PVH combiner can further include (1) fiducial regions created by differential patterning that generate dark regions in images captured of an eye, and/or (2) multiple regions that diffract light at angles to produce different perspectives in the captured images. The dark regions and/or different perspectives can be used to calibrate eye tracking. In addition, the PVH combiner can include off-axis lens regions that generate glints for the eye tracking.

Abstract: A non-coherent noise reduction method, comprising: (a) receiving a plurality of input audio sensing signals by a processor, wherein the input audio sensing signals correspond to a plurality of channels responsive to sensing by a plurality of audio sensors; (b) detecting whether non-coherent noise exists in at least one of the channels by a non-coherent noise detector; (c) estimating at least one noise power of the non-coherent noise by a noise power estimator, if the non-coherent noise exists in at least one of the channels; (d) deriving at least one noise contour of the non-coherent noise by a noise contour estimator, if the non-coherent noise exists in at least one of the channels; and (e) enhancing the input audio sensing signals according to the noise power and the noise contour if the non-coherent noise exists in at least one of the channels.

Abstract: A system includes a display element configured to output an image light. The system also includes an image combiner configured to guide the image light toward an eye-box region of the system. The system also includes a dimming device disposed at a side of the image combiner. The dimming device includes a dimming material layer including a mixture of liquid crystal (“LC”) molecules and dye molecules, and pretilt angles of the LC molecules and the dye molecules are configured with a predetermined variation in at least two opposite in-plane directions from a center to two opposite peripheries of the dimming material layer.

Abstract: A method (of manufacturing a semiconductor device) includes: migrating a circuit design from a first netlist corresponding with a first semiconductor process technology (SPT) to a second netlist corresponding with a second SPT, at least the second netlist being stored on a non-transitory computer-readable medium, the migrating including: generating first versions correspondingly of the first and second netlists; abstracting selected components in the first version of the second netlist and correspondingly in the first version of the second netlist to form corresponding second versions of the second and first netlists; performing a logic equivalence check (LEC) between the second versions of the first and second netlists, thereby identifying migration errors; and revising the second version of the second netlist to reduce the migration errors, thereby resulting in a third version of the second netlist.

Abstract: A semiconductor device includes an on-chip clock controller configured to provide a clock output signal and configured to receive a mode signal and a speed enable signal, and to generate a first fast clock enable signal and a first slow clock enable signal. The on-chip clock controller is configured to override the first fast clock enable signal based on the mode signal and the speed enable signal to provide a fast clock in the clock output signal and to override the first slow clock enable signal based on the mode signal and the speed enable signal to provide a slow clock in the clock output signal.

Abstract: An image sensor includes different first and second focus pixels in a substrate; a first adjacent pixel in the substrate and adjacent to the first focus pixel in a positive first direction, a pixel being absent between the first focus pixel and the first adjacent pixel; a first micro-lens covering the first adjacent pixel; a second adjacent pixel in the substrate and adjacent to the second focus pixel in a positive first direction, a pixel being absent between the second focus pixel and the second adjacent pixel; and a second micro-lens covering the second adjacent pixel, and an area of the first micro-lens being different from an area of the second micro-lens.

Abstract: A device includes a display configured to generate an image light. The device also includes a waveguide optically coupled with the display and configured to guide the image light to an exit pupil of the device. The waveguide includes a grating including a birefringent material, and a birefringence of the grating is configured to increase along a pupil-expanding direction of the device.

Abstract: Electronic system level (ESL) design and verification of the present disclosure is utilized to provide an electronic simulation and modeling of function safety and fault management of an electronic device. A method for simulating a safety circuit includes providing an electronic architectural design to perform one or more functional behaviors of the electronic device in accordance with an electronic design specification. The method further includes modeling the safety circuit of the electronic architectural design and one or more other electronic circuits of the electronic architectural design that communicate with the safety circuit. The method further includes simulating, using the modeling, operation of the safety circuit while the electronic architectural design is performing the one or more functional behaviors. The method also includes determining whether the simulated operation of the safety circuit satisfies the electronic design specification.

Abstract: Electronic system level (ESL) design and verification of the present disclosure is utilized to provide an electronic simulation and modeling of function safety and fault management of an electronic device. A method for simulating a safety circuit includes providing an electronic architectural design to perform one or more functional behaviors of the electronic device in accordance with an electronic design specification. The method further includes modeling the safety circuit of the electronic architectural design and one or more other electronic circuits of the electronic architectural design that communicate with the safety circuit. The method further includes simulating, using the modeling, operation of the safety circuit while the electronic architectural design is performing the one or more functional behaviors. The method also includes determining whether the simulated operation of the safety circuit satisfies the electronic design specification.

Abstract: A liquid crystal display (LCD) system for a head mounted display includes an LCD panel and a backlight unit. The LCD panel includes a color filter on array (COA) configuration. The backlight unit includes a light adjustment layer to adjust at least one characteristic of illumination light from a light source to tune the illumination light for enlarging an emission cone of display light.

Abstract: A liquid crystal pixel includes liquid crystals, a source electrode, and a transparent common electrode layer. The liquid crystals are configured to change an alignment of the liquid crystals in response to a voltage applied across the source electrode and the transparent common electrode layer. The slit in the transparent common electrode layer includes multiple angled sections.

Abstract: A non-transitory computer-readable storage medium is encoded with a set of instructions for designing a semiconductor device using electronic system level (ESL) modeling for machine learning applications that, when executed by at least one processor, cause the at least one processor to: retrieve a source code operable to execute a plurality of operations of a machine learning algorithm; classify a first group of the plurality of operations as slow group operations and classify a second group of the plurality of operations as fast group operations, based on a time required to complete each operation; define a neural network operable to execute the slow group operations; define a trained neural network configuration including a plurality of interconnected neurons operable to execute the slow group operations; and generate an ESL platform for evaluating a design of a semiconductor device based on the trained neural network configuration.

Abstract: A first layer of anisotropic material extends along a first plane and includes anisotropic components being parallel to a second plane non-parallel and non-perpendicular to the first plane. The anisotropic components are arranged in cycloidal or helical patterns. The cycloidal or helical patterns define one or more Bragg planes that are non-parallel and non-perpendicular to the first plane and either substantially parallel or substantially perpendicular to the second plane.

Abstract: An integrated circuit includes first through fourth devices positioned over one or more substrates, a first radio frequency interconnect (RFI) including a first transmitter included in the first device, a first receiver included in the second device, and a first guided transmission medium coupled to each of the first transmitter and the first receiver, a second RFI including a second transmitter included in the first device, a second receiver included in the third device, and a second guided transmission medium coupled to each of the second transmitter and the second receiver, and a third RFI including a third transmitter included in the first device, a third receiver included in the fourth device, and the second guided transmission medium coupled to each of the third transmitter and the third receiver.

Abstract: A memory system includes multiple groups of primary memory cells residing in a first die or a stack of first dies, multiple groups of cache memory cells residing in a second die, an interposer, and control circuits residing in a third die. Each group of the cache memory cells is associated with a corresponding group of the primary memory cells. The first die or the stack of first dies is coupled to a top surface of the second die through a first group of bumps. A bottom surface of the second die is coupled to a top surface of the interposer through a second group of bumps. The control circuits are associated with the primary memory cells and the cache memory cells. The third die is positioned aside the second die and coupled to the top surface of the interposer through a third group of pumps.

Abstract: A light-emitting diode (“LED”) package includes a package housing defining a space. The LED package includes a first LED disposed with the space defined by the package housing, and configured to emit a first light having a blue wavelength range. The blue wavelength range has a peak wavelength ranging from about 440 nm to about 480 nm. The LED package includes a second LED disposed within the space, and configured to emit a second light having a red wavelength range. The red wavelength range has a peak wavelength ranging from about 610 nm to about 680 nm. The LED package includes a phosphor filler filling the space and configured to absorb a portion of the first light to emit a third light having a green wavelength range. The green wavelength range has a peak wavelength ranging from about 510 nm to about 570 nm.

Abstract: A display device and an electronic apparatus are disclosed. The display device comprises: an image-display component, which generates an image light output, wherein at least one pixel light of the image light output has light polarization components of at least two polarization states or has a polarization light component of a polarization state and a non-polarization light component; and a polarization dependent image offset component, which receives the image light output coming from the image display component and deflects the polarization light components based on the polarization states to separate each of the at least one pixel light into at least two pixel lights, or deflects the polarization light component from the non-polarization light component to separate each of the at least one pixel light into at least two pixel lights.

Abstract: A device is disclosed. The cell block includes a pin disposed at a Nth metal layer in a cell layout. The first metal interconnect is disposed at a (N+1)th metal layer above the Nth metal layer and stacked over the pin, and electrically coupled to the pin. The second interconnects are disposed at a (N+2)th metal layer and stacked over the first metal interconnect, and parallel to each other. The second metal interconnects are electrically coupled to the first metal interconnect, and forming an equivalent tapping point of the pin of the cell block. The equivalent tapping point and the pin are vertically overlapped with each other, and fabrication of the device is initiated after a DRC or a SEM simulation test is passed. A first width of at least one first metal interconnect is different from a second width of one of the plurality of second metal interconnects.

Abstract: The disclosed system may include a display; a lens; and a diffractive optical element, where the diffractive optical element is configured to increase a fill factor of the display when the lens is used to magnify the display. Various other apparatuses, systems, and methods are also disclosed.