Patents by Inventor Yushuang YAO

Yushuang YAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210343620
    Abstract: A method includes disposing a series of protrusions on a rectangular side panel of an open four-sided box-like structure in a frame, and attaching an electronic substrate to the frame. The electronic substrate carries one or more circuit components. The series of protrusions acts as a spring-like compensator to compensate plastic deformation, twisting or warping of the frame, and to limit propagation of stress to the electronic substrate via the frame.
    Type: Application
    Filed: May 4, 2020
    Publication date: November 4, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Vemmond Jeng Hung NG, Chee Hiong CHEW, Qing YANG
  • Publication number: 20210265248
    Abstract: A casing for semiconductor packages that includes a plurality of press-fit pins is disclosed. Specific implementations include a shaft including a first end and a second end. The first end may include a head. The press-fit pin may include a bonding portion included at the second end. The bonding portion may include a first section extending substantially perpendicular from a longest length of the shaft. The bonding portion may also include an angled section coupled to a bonding foot. The bonding foot may be configured to be ultrasonically welded to a substrate.
    Type: Application
    Filed: February 20, 2020
    Publication date: August 26, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Qing YANG, Lihu HOU
  • Patent number: 11081828
    Abstract: A housing that can be used for a power module in a power system is disclosed. The housing includes features to improve the insulating properties and to reduce or eliminate a mechanical stress on a housing that could crack or break a substrate contained within the housing. The insulating properties are improved by protrusions that surround apertures for press-fit pins. Each protrusion can increase a creepage for the housing by extending the surface of the housing along a press-fit pin. The mechanical stress is reduced by a mounting flange that includes a wedge surface and a flexible structure that react to a force applied when the mounting flange is fastened to a surface by a fastener.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: August 3, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jihwan Kim, Yushuang Yao, Bosung Won, Atapol Prajuckamol, Olaf Zschieschang
  • Publication number: 20210219448
    Abstract: A fin frame baseplate is disclosed. Specific implementations include a baseplate configured to be coupled to a substrate, a fin frame including a base portion coupled to the baseplate, and a plurality of fins extending from the base portion, the plurality of fins protruding from the base portion. The fin frame may include a plurality of openings therethrough.
    Type: Application
    Filed: March 29, 2021
    Publication date: July 15, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol PRAJUCKAMOL, Chee Hiong CHEW, Yushuang YAO
  • Patent number: 10971428
    Abstract: A semiconductor baseplate is disclosed. Specific implementations of a baseplate may include a planar portion including a plurality of recesses therein, the planar portion may be made of a first material, and a plurality of pegs where each peg of the plurality of pegs may be configured to fit within each recess of the plurality of recesses, the plurality of pegs may be made of a second material, where the first material and the second material may be bonded together.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: April 6, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol Prajuckamol, Francis J. Carney, Chee Hiong Chew, Yushuang Yao
  • Patent number: 10966335
    Abstract: A fin frame baseplate is disclosed. Specific implementations include a baseplate configured to be coupled to a substrate, a fin frame including a base portion coupled to the baseplate, and a plurality of fins extending from the base portion, the plurality of fins protruding from the base portion. The fin frame may include a plurality of openings therethrough.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: March 30, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol Prajuckamol, Chee Hiong Chew, Yushuang Yao
  • Publication number: 20210090975
    Abstract: A semiconductor package assembly having a connecting clip disposed on both a first material stack and a second material stack having different thicknesses and disposed on a conducting substrate. This connecting clip has a first portion disposed on to the first material stack and second portion disposed on the second material stack, such that the surfaces of the first portion and second portion opposite the conducting substrate are at the same perpendicular distance from the conducting substrate. For example, in some implementations, when the thickness of the second material stack is smaller than the thickness of the first material stack, the second portion of the connecting clip may include a vertical support disposed on the second material stack to equalize the heights of the surfaces of the first portion and second portion of the connecting clip.
    Type: Application
    Filed: December 3, 2020
    Publication date: March 25, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol PRAJUCKAMOL, Chee Hiong CHEW, Yushuang YAO
  • Publication number: 20210050272
    Abstract: Implementations of a semiconductor package may include: a substrate, a case coupled to the substrate, and a plurality of press-fit pins. The plurality of press-fit pins may be fixedly coupled with the case. The plurality of press-fit pins may have at least one locking portion that extends from a side of the plurality of press-fit pins into the case and the plurality of press-fit pins may be electrically and mechanically coupled to the substrate.
    Type: Application
    Filed: November 2, 2020
    Publication date: February 18, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Chee Hiong CHEW, Atapol PRAJUCKAMOL
  • Patent number: 10897821
    Abstract: One illustrative method embodiment includes: providing a direct bonded copper (DBC) substrate including a plurality of copper traces; providing a guide plate having protrusions on a surface of the guide plate; mounting hollow bush rings onto the protrusions; mounting the bush rings onto the copper traces by aligning the protrusions of the guide plate with solder units on said copper traces; attaching the bush rings and one or more dies to the copper traces by simultaneously reflowing said solder units and other solder units positioned between the dies and the copper traces; and after said simultaneous reflow, removing the protrusions from the bush rings.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: January 19, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang Yao, Atapol Prajuckamol, Chee Hiong Chew, Francis J. Carney, Yusheng Lin
  • Publication number: 20200402887
    Abstract: A semiconductor baseplate is disclosed. Specific implementations of a baseplate may include a planar portion including a plurality of recesses therein, the planar portion may be made of a first material, and a plurality of pegs where each peg of the plurality of pegs may be configured to fit within each recess of the plurality of recesses, the plurality of pegs may be made of a second material, where the first material and the second material may be bonded together.
    Type: Application
    Filed: June 20, 2019
    Publication date: December 24, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol PRAJUCKAMOL, Francis J. CARNEY, Chee Hiong CHEW, Yushuang YAO
  • Patent number: 10861767
    Abstract: Example implementations relate to an electronic module can include a first direct bonded metal (DBM) substrate, a second DBM substrate, a housing member, and a plurality of connection terminals. The first DBM substrate and second DBM substrate can be aligned along a same plane. The housing member can be coupled to the first substrate and the second substrate and the housing member can include a plurality of openings in a surface of the housing member. The plurality of connection terminals can be electrically coupled to at least one of the first DBM substrate and the second DBM substrate, in which a connection terminal from the plurality of terminals can extend through an opening from the plurality of openings of the housing member.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: December 8, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol Prajuckamol, Chee Hiong Chew, Yushuang Yao
  • Patent number: 10861775
    Abstract: A semiconductor package assembly having a connecting clip disposed on both a first material stack and a second material stack having different thicknesses and disposed on a conducting substrate. This connecting clip has a first portion disposed on to the first material stack and second portion disposed on the second material stack, such that the surfaces of the first portion and second portion opposite the conducting substrate are at the same perpendicular distance from the conducting substrate. For example, in some implementations, when the thickness of the second material stack is smaller than the thickness of the first material stack, the second portion of the connecting clip may include a vertical support disposed on the second material stack to equalize the heights of the surfaces of the first portion and second portion of the connecting clip.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: December 8, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol Prajuckamol, Chee Hiong Chew, Yushuang Yao
  • Publication number: 20200373231
    Abstract: A semiconductor guide pin is disclosed. Specific implementations may include a heatsink, one or more substrates coupled together, one or more pressfit pins coupled to the one or more substrates, and two or more guide pins coupled to the one or more substrates, where the two or more guide pins may have a height greater than the one or more pressfit pins.
    Type: Application
    Filed: July 3, 2019
    Publication date: November 26, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chee Hiong CHEW, Yushuang YAO, Atapol PRAJUCKAMOL, Chuncao NIU
  • Publication number: 20200358221
    Abstract: A housing that can be used for a power module in a power system is disclosed. The housing includes features to improve the insulating properties and to reduce or eliminate a mechanical stress on a housing that could crack or break a substrate contained within the housing. The insulating properties are improved by protrusions that surround apertures for press-fit pins. Each protrusion can increase a creepage for the housing by extending the surface of the housing along a press-fit pin. The mechanical stress is reduced by a mounting flange that includes a wedge surface and a flexible structure that react to a force applied when the mounting flange is fastened to a surface by a fastener.
    Type: Application
    Filed: July 12, 2019
    Publication date: November 12, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jihwan KIM, Yushuang YAO, Bosung WON, Atapol PRAJUCKAMOL, Olaf ZSCHIESCHANG
  • Patent number: 10825748
    Abstract: Implementations of a semiconductor package may include: a substrate, a case coupled to the substrate, and a plurality of press-fit pins. The plurality of press-fit pins may be fixedly coupled with the case. The plurality of press-fit pins may have at least one locking portion that extends from a side of the plurality of press-fit pins into the case and the plurality of press-fit pins may be electrically and mechanically coupled to the substrate.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: November 3, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang Yao, Chee Hiong Chew, Atapol Prajuckamol
  • Publication number: 20200344905
    Abstract: A fin frame baseplate is disclosed. Specific implementations include a baseplate configured to be coupled to a substrate, a fin frame including a base portion coupled to the baseplate, and a plurality of fins extending from the base portion, the plurality of fins protruding from the base portion. The fin frame may include a plurality of openings therethrough.
    Type: Application
    Filed: September 30, 2019
    Publication date: October 29, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol PRAJUCKAMOL, Chee Hiong CHEW, Yushuang YAO
  • Patent number: 10720725
    Abstract: Implementations of pins for semiconductor packages may include: an upper contact portion having a contact surface coupled with a pin receiver; a lower portion having a vertical stop and at least two curved legs; a horizontal base coupled directly to the at least two curved legs and configured to be soldered to a substrate to mechanically and electrically couple the pin to the substrate, the horizontal base having an upper contact surface, and; a gap between a bottom contact surface of the vertical stop and the upper contact surface of the horizontal base.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: July 21, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang Yao, Chee Hiong Chew, Atapol Prajuckamol
  • Publication number: 20200176907
    Abstract: Implementations of pins for semiconductor packages may include: an upper contact portion having a contact surface coupled with a pin receiver; a lower portion having a vertical stop and at least two curved legs; a horizontal base coupled directly to the at least two curved legs and configured to be soldered to a substrate to mechanically and electrically couple the pin to the substrate, the horizontal base having an upper contact surface, and; a gap between a bottom contact surface of the vertical stop and the upper contact surface of the horizontal base.
    Type: Application
    Filed: February 6, 2020
    Publication date: June 4, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Chee Hiong CHEW, Atapol PRAJUCKAMOL
  • Publication number: 20200105648
    Abstract: A semiconductor package assembly having a connecting clip disposed on both a first material stack and a second material stack having different thicknesses and disposed on a conducting substrate. This connecting clip has a first portion disposed on to the first material stack and second portion disposed on the second material stack, such that the surfaces of the first portion and second portion opposite the conducting substrate are at the same perpendicular distance from the conducting substrate. For example, in some implementations, when the thickness of the second material stack is smaller than the thickness of the first material stack, the second portion of the connecting clip may include a vertical support disposed on the second material stack to equalize the heights of the surfaces of the first portion and second portion of the connecting clip.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 2, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol PRAJUCKAMOL, Chee Hiong CHEW, Yushuang YAO
  • Patent number: D922329
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: June 15, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jihwan Kim, Yushuang Yao, Bosung Won, Atapol Prajuckamol, Olaf Zschieschang