Patents by Inventor Yushuang YAO

Yushuang YAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10559905
    Abstract: Implementations of pins for semiconductor packages may include: an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver; a lower portion having a vertical stop and at least two curved legs; a horizontal base coupled directly to the at least two curved legs and configured to be soldered to a substrate to mechanically and electrically couple the pin to the substrate, the horizontal base having an upper contact surface, and; a gap between a bottom contact surface of the vertical stop and the upper contact surface of the horizontal base; wherein the at least two curved legs are configured to flex to allow the bottom contact surface of the vertical stop to move toward the upper contact surface of the horizontal base in response to a pressure applied to the pin along a direction collinear with a longest length of the pin toward the upper contact surface, and; wherein the vertical stop is configured to stop movement of the pin when the bottom contact s
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: February 11, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang Yao, Chee Hiong Chew, Atapol Prajuckamol
  • Publication number: 20190348342
    Abstract: Example implementations relate to an electronic module can include a first direct bonded metal (DBM) substrate, a second DBM substrate, a housing member, and a plurality of connection terminals. The first DBM substrate and second DBM substrate can be aligned along a same plane. The housing member can be coupled to the first substrate and the second substrate and the housing member can include a plurality of openings in a surface of the housing member. The plurality of connection terminals can be electrically coupled to at least one of the first DBM substrate and the second DBM substrate, in which a connection terminal from the plurality of terminals can extend through an opening from the plurality of openings of the housing member.
    Type: Application
    Filed: May 30, 2018
    Publication date: November 14, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol PRAJUCKAMOL, Chee Hiong CHEW, Yushuang YAO
  • Patent number: 10319659
    Abstract: Implementations of semiconductor packages may include: a substrate comprising a first side and a second side and a hole in the substrate. The hole extending from the first side to the second side of the substrate and positioned in a center of the substrate. The semiconductor packages may also include a bushing around the hole to the first side of the substrate. The semiconductor packages may also include a plurality of pin holders arranged and coupled on the substrate. The semiconductor package may also include a molding compound at least partially encapsulating the substrate, encapsulating a side surface of the bushing, and encapsulating a plurality of side surfaces of the plurality of pin holders.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: June 11, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol Prajuckamol, C H Chew, Yushuang Yao
  • Publication number: 20190173215
    Abstract: Implementations of pins for semiconductor packages may include: an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver; a lower portion having a vertical stop and at least two curved legs; a horizontal base coupled directly to the at least two curved legs and configured to be soldered to a substrate to mechanically and electrically couple the pin to the substrate, the horizontal base having an upper contact surface, and; a gap between a bottom contact surface of the vertical stop and the upper contact surface of the horizontal base; wherein the at least two curved legs are configured to flex to allow the bottom contact surface of the vertical stop to move toward the upper contact surface of the horizontal base in response to a pressure applied to the pin along a direction collinear with a longest length of the pin toward the upper contact surface, and; wherein the vertical stop is configured to stop movement of the pin when the bottom contact s
    Type: Application
    Filed: January 16, 2019
    Publication date: June 6, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Chee Hiong CHEW, Atapol PRAJUCKAMOL
  • Publication number: 20190116669
    Abstract: One illustrative method embodiment includes: providing a direct bonded copper (DBC) substrate including a plurality of copper traces; providing a guide plate having protrusions on a surface of the guide plate; mounting hollow bush rings onto the protrusions; mounting the bush rings onto the copper traces by aligning the protrusions of the guide plate with solder units on said copper traces; attaching the bush rings and one or more dies to the copper traces by simultaneously reflowing said solder units and other solder units positioned between the dies and the copper traces; and after said simultaneous reflow, removing the protrusions from the bush rings.
    Type: Application
    Filed: December 12, 2018
    Publication date: April 18, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Atapol PRAJUCKAMOL, Chee Hiong CHEW, Francis J. CARNEY, Yusheng LIN
  • Publication number: 20190115275
    Abstract: Implementations of semiconductor packages may include: a substrate comprising a first side and a second side and a hole in the substrate. The hole extending from the first side to the second side of the substrate and positioned in a center of the substrate. The semiconductor packages may also include a bushing around the hole to the first side of the substrate. The semiconductor packages may also include a plurality of pin holders arranged and coupled on the substrate. The semiconductor package may also include a molding compound at least partially encapsulating the substrate, encapsulating a side surface of the bushing, and encapsulating a plurality of side surfaces of the plurality of pin holders.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 18, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol PRAJUCKAMOL, CH Chew, Yushuang YAO
  • Patent number: 10231340
    Abstract: A method, in some embodiments, comprises: providing a direct bonded copper (DBC) substrate including a plurality of copper traces; providing a guide plate having protrusions on a surface of the guide plate; mounting hollow bush rings onto the protrusions; mounting the bush rings onto the copper traces by aligning the protrusions of the guide plate with solder units on said copper traces; attaching the bush rings and one or more dies to the copper traces by simultaneously reflowing said solder units and other solder units positioned between the dies and the copper traces; and after said simultaneous reflow, removing the protrusions from the bush rings.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: March 12, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang Yao, Atapol Prajuckamol, Chee Hiong Chew, Francis J. Carney, Yusheng Lin
  • Patent number: 10224655
    Abstract: Implementations of pins for semiconductor packages may include: an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver; a lower portion having a vertical stop and at least two curved legs; a horizontal base coupled directly to the at least two curved legs and configured to be soldered to a substrate to mechanically and electrically couple the pin to the substrate, the horizontal base having an upper contact surface, and; a gap between a bottom contact surface of the vertical stop and the upper contact surface of the horizontal base; wherein the at least two curved legs are configured to flex to allow the bottom contact surface of the vertical stop to move toward the upper contact surface of the horizontal base in response to a pressure applied to the pin along a direction collinear with a longest length of the pin toward the upper contact surface, and; wherein the vertical stop is configured to stop movement of the pin when the bottom contact s
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: March 5, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang Yao, Chee Hiong Chew, Atapol Prajuckamol
  • Patent number: 10121763
    Abstract: Implementations of a clip for a semiconductor package may include: an electrically conductive clip having a first end and a second end and a middle section between the first end and the second end. The first end may be configured to couple to a first die through a bonding material. The second end may be configured to couple to a second die through a bonding material. The middle section may be configured to couple to an emitter structure through a bonding material. The clip may include an integrally formed electrically conductive material and include an M-shape. A middle of the M-shape may be coupled to the emitter structure.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: November 6, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chee Hiong Chew, Atapol Prajuckamol, Yushuang Yao
  • Publication number: 20180228041
    Abstract: In one embodiment, a semiconductor package may be formed having a first side and a second side that is substantially opposite to the first side. An embodiment may include forming an attachment clip extending substantially laterally between the first and second sides wherein the attachment clip is positioned near a distal end of the first and second sides. An embodiment may also include forming the attachment clip to have a flexible main portion that can bend away from a plane of the main portion toward a bottom side of the semiconductor package.
    Type: Application
    Filed: April 4, 2018
    Publication date: August 9, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol PRAJUCKAMOL, Chee Hiong CHEW, Yushuang YAO
  • Publication number: 20180197836
    Abstract: Implementations of a clip for a semiconductor package may include: an electrically conductive clip having a first end and a second end and a middle section between the first end and the second end. The first end may be configured to couple to a first die through a bonding material. The second end may be configured to couple to a second die through a bonding material. The middle section may be configured to couple to an emitter structure through a bonding material. The clip may include an integrally formed electrically conductive material and include an M-shape. A middle of the M-shape may be coupled to the emitter structure.
    Type: Application
    Filed: March 5, 2018
    Publication date: July 12, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chee Hiong CHEW, Atapol PRAJUCKAMOL, Yushuang YAO
  • Patent number: 9967986
    Abstract: In one embodiment, a semiconductor package may be formed having a first side and a second side that is substantially opposite to the first side. An embodiment may include forming an attachment clip extending substantially laterally between the first and second sides wherein the attachment clip is positioned near a distal end of the first and second sides. An embodiment may also include forming the attachment clip to have a flexible main portion that can bend away from a plane of the main portion toward a bottom side of the semiconductor package.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: May 8, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol Prajuckamol, Chee Hiong Chew, Yushuang Yao
  • Patent number: 9911712
    Abstract: A clip for a semiconductor package. Implementations may include: an electrically conductive clip having a first end and a second end and a middle section between the first end and the second end. The first end may be configured to couple to a first die through a bonding material. The second end may be configured to couple to a second die through a bonding material. The middle section may be configured to couple to an emitter structure through a bonding material. The clip may include an integrally formed electrically conductive material and include an M-shape. A middle of the M-shape may be coupled to the emitter structure.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: March 6, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chee Hiong Chew, Atapol Prajuckamol, Yushuang Yao
  • Publication number: 20170347456
    Abstract: A method, in some embodiments, comprises: providing a direct bonded copper (DBC) substrate including a plurality of copper traces; providing a guide plate having protrusions on a surface of the guide plate; mounting hollow bush rings onto the protrusions; mounting the bush rings onto the copper traces by aligning the protrusions of the guide plate with solder units on said copper traces; attaching the bush rings and one or more dies to the copper traces by simultaneously reflowing said solder units and other solder units positioned between the dies and the copper traces; and after said simultaneous reflow, removing the protrusions from the bush rings.
    Type: Application
    Filed: May 26, 2016
    Publication date: November 30, 2017
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Atapol PRAJUCKAMOL, Chee Hiong CHEW, Francis J. CARNEY, Yusheng LIN
  • Publication number: 20170170083
    Abstract: Implementations of a semiconductor package may include: a substrate, a case coupled to the substrate and a plurality of press-fit pins. The press-fit pins are molded into and fixedly coupled with the case. The pins are also electrically and mechanically coupled to the substrate.
    Type: Application
    Filed: April 22, 2016
    Publication date: June 15, 2017
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang Yao, Chee Hiong Chew, Atapol Prajuckamol
  • Publication number: 20170170582
    Abstract: Implementations of pins for semiconductor packages may include: an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver; a lower portion having a vertical stop and at least two curved legs; a horizontal base coupled directly to the at least two curved legs and configured to be soldered to a substrate to mechanically and electrically couple the pin to the substrate, the horizontal base having an upper contact surface, and; a gap between a bottom contact surface of the vertical stop and the upper contact surface of the horizontal base; wherein the at least two curved legs are configured to flex to allow the bottom contact surface of the vertical stop to move toward the upper contact surface of the horizontal base in response to a pressure applied to the pin along a direction collinear with a longest length of the pin toward the upper contact surface, and; wherein the vertical stop is configured to stop movement of the pin when the bottom contact s
    Type: Application
    Filed: February 27, 2017
    Publication date: June 15, 2017
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Chee Hiong CHEW, Atapol PRAJUCKAMOL
  • Publication number: 20170170084
    Abstract: Implementations of a semiconductor package may include: a substrate, a case coupled to the substrate, and a plurality of press-fit pins. The plurality of press-fit pins may be fixedly coupled with the case. The plurality of press-fit pins may have at least one locking portion that extends from a side of the plurality of press-fit pins into the case and the plurality of press-fit pins may be electrically and mechanically coupled to the substrate.
    Type: Application
    Filed: November 2, 2016
    Publication date: June 15, 2017
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang YAO, Chee Hiong CHEW, Atapol PRAJUCKAMOL
  • Publication number: 20170117211
    Abstract: A clip for a semiconductor package. Implementations may include: an electrically conductive clip having a first end and a second end and a middle section between the first end and the second end. The first end may be configured to couple to a first die through a bonding material. The second end may be configured to couple to a second die through a bonding material. The middle section may be configured to couple to an emitter structure through a bonding material. The clip may include an integrally formed electrically conductive material and include an M-shape. A middle of the M-shape may be coupled to the emitter structure.
    Type: Application
    Filed: April 8, 2016
    Publication date: April 27, 2017
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chee Hiong CHEW, Atapol PRAJUCKAMOL, Yushuang YAO
  • Patent number: 9620877
    Abstract: A pin for a semiconductor package includes an upper contact portion having a contact surface configured to mechanically and electrically couple with a pin receiver. A lower portion of the pin is configured to flex to allow an upper portion of the pin to move towards an upper contact surface of a horizontal base of the pin in response to a pressure applied along a direction collinear with a longest length of the pin towards the upper contact surface of the horizontal base when the pin is inserted into a pin receiver. Some implementations of pins include a vertical stop to stop movement of the pin when a surface of the vertical stop contacts the upper contact surface of the horizontal base. Varying implementations of pins include: two curved legs and one vertical stop; two partially curved legs and no vertical stop, and; a single leg bent into an N-shape.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: April 11, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Yushuang Yao, Chee Hiong Chew, Atapol Prajuckamol
  • Patent number: D755741
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: May 10, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Atapol Prajuckamol, Chee Hiong Chew, Yushuang Yao