Abstract: A photoelectric conversion apparatus includes first and second signal lines, first and second circuits, and a switch. Signals based on electric charges generated in first and second photoelectric conversion portions are to be read out to the first and second signal lines, respectively. The first circuit includes a first input unit to which the first signal line is connected. The first circuit is configured to perform processing of a signal input to the first input unit, with a first gain. The second circuit includes a second input unit to which the second signal line is connected. The second circuit is configured to perform processing of a signal input to the second input unit. The switch is configured to perform switching between a connected state and a disconnected state between the first signal line and the second signal line.

Abstract: To provide a light emitting device with high upward emission efficiency. The light emitting device is manufactured by sequentially performing: a step of disposing a phosphor-containing layer on a top face of a light emitting element that is mounted on a substrate; a step of disposing a frame at a position separated from a lateral face of the phosphor-containing layer, on the substrate; a step of pushing a plate-like elastic body against top faces of the phosphor-containing layer and the frame so as to come into contact therewith, and filling, in a state where a lower face of the elastic body is pushed up by the phosphor-containing layer and the frame, a reflection material having fluidity in an uncured state in surroundings of the light emitting element and the phosphor-containing layer so as to be along the lower face of the elastic body; and a step of curing the reflection material to form a reflection member.

Abstract: A switching element may include a SiC substrate including an off-angle; a trench provided in an upper surface of the SiC substrate and extending along an off-direction of the SiC substrate in a plan view of the upper surface; a gate insulating film; and a gate electrode. The SiC substrate may include a source region of n-type; a contact region of p-type; a body region of p-type being in contact with the gate insulating film below the source region; a drift region of n-type being in contact with the gate insulating film below the body region; and low lifetime regions located in a range between the drift region and at least one of the source region and the contact region. The low lifetime regions may be arranged along the off-direction with intervals, and at least a part of the body region may be provided in the intervals.

Abstract: A switching element may include a semiconductor substrate, a trench, a gate insulating film, and a gate electrode. A drift region may be in contact with the gate insulating film below the body region. A bottom region may be in contact with the gate insulating film at a bottom surface of the trench. A connection region may be in contact with the gate insulating film at a side surface of the trench and connect the body region and the bottom region. The side surface of the trench may include a first side surface and a second side surface positioned below the first side surface. An inclination angle of the second side surface may be larger than an inclination angle of the first side surface. An interface between the body region and the drift region may be in contact with the gate insulating film at the first side surface.

Abstract: Visual observation of morphological features of a cell group or individual cells acquired in 3D image data is facilitated, thus improving observation accuracy. Provided is an image processing device that generates, on the basis of a plurality of 2D images acquired by a microscope at different focus positions on a cell clump, 3D images of respective cells constituting the cell clump, that processes the generated 3D images and analyzes feature amounts on the basis of at least one measurement parameter, that displays analysis results in a graph, that allows a user to select a region of interest on the displayed graph, and that generates, from the 3D images that correspond to the plurality of cells that are included in the selected region of interest, 2D display images each in a plane with reference to an axis that is determined on the basis of a shape feature of the corresponding cell and displays the 2D display images in a list.

Abstract: The electric storage device includes an electrode assembly having a positive electrode and a negative electrode, a case for housing the electrode assembly, a pressure relief valve, and positive and negative electrode conductive members that are electrically connected to the respective corresponding electrodes. The case has a wall in which the pressure relief valve is disposed. At least one of the positive and negative electrode conductive members includes an interposing portion located between the inner surface of the wall and an end face of the electrode assembly facing the inner surface, and a shielding portion located closer to the end face of the electrode assembly than the interposing portion. The shielding portion covers the pressure release valve from a side of the wall where the electrode assembly is located.

Abstract: A method of manufacturing a semiconductor device includes: forming a trench on a surface of a semiconductor substrate; forming an oxide film on side surfaces and a bottom surface of the trench; removing at least a part of the oxide film by dry etching from the bottom surface of the trench; and ion-implanting conductive impurities into the semiconductor substrate through the bottom surface of the trench after the dry etching. The dry etching is reactive ion etching in which etching gas including fluorocarbon based gas having a carbon atom ring structure, oxygen gas, and argon gas is used.

Abstract: A switching element including: a bottom insulating layer disposed at a bottom of a trench; a side surface insulating film covering a side surface of the trench; and a gate electrode disposed inside the trench and insulated from a semiconductor substrate. The semiconductor substrate has a bottom region and a connection region. The bottom region is in contact with the bottom insulating layer. The connection region is in contact with the bottom insulating layer and the side surface insulating film, and connects a body region to the bottom region. An area of the connection region in which the bottom insulating layer contacts to the connection region includes an area with lower a second conductivity-type impurity concentration than a minimum value of the second conductivity-type impurity concentration in an area of the connection region in which the side surface insulating film contacts the connection region.

Abstract: A fixed region at an outer periphery or an inner periphery of a sample that has a three-dimensional structure is selectively analyzed with accuracy. Provided is an observation system including a CPU that recognizes the 3D shape of an observation target, such as a spheroid, from a 3D image of cells, that sets a 3D mask of which the radial distance from a circumscribed surface of the recognized 3D shape is fixed over the entire region of the circumscribed surface and of which the shape is similar to the circumscribed surface, and that identifies a cell contained inside the set 3D mask.

Abstract: An image processing technique that enables accurate detection of a flicker component even when applied to an image pickup device capable of changing a driving method on a region basis within a frame. A flicker detection section detects a flicker component of an image pixel signal read out from the image pickup device having a pixel region for detecting a phase difference. When the driving method is changed to one for performing phase difference detection, the flicker detection section detects a flicker component such that the period of the flicker component in a region used for phase difference detection within the frame coincides with a period of the flicker component in a region not used for phase difference detection.

Abstract: A method of manufacturing a switching element is provided. The method including: preparing a semiconductor substrate which includes an n-type drain region, a p-type body region, and a trench penetrating the body region and reaching the drain region; and forming a lateral surface p-type region extending along a lateral surface of the trench below the body region by heating the semiconductor substrate so as to make a part of the body region flow into the trench. The switching element includes: a gate insulating layer covering an inner surface of the trench; a bottom p-type region in contact with the gate insulating layer at a bottom surface of the trench and connected to the lateral surface p-type region; an n-type source region; and a gate electrode provided in the trench.

Abstract: A method for manufacturing a compound semiconductor device includes: providing a semiconductor substrate that includes a foundation layer; forming a deep trench in the foundation layer; and filling the deep trench with a deep layer having a second conductive type and a limiting layer having the first conductive type. In the filling the deep trench, growth of the deep layer from a bottom of the deep trench toward an opening inlet of the deep trench and growth of the limiting layer from a side face of the deep trench are achieved by: dominant epitaxial growth of a second conductive type layer over a first conductive type layer on the bottom of the deep trench; and dominant epitaxial growth of the first conductive type layer over the second conductive type layer on the side face of the deep trench, based on plane orientation dependency of the compound semiconductor during epitaxial growth.

Abstract: A method for manufacturing a compound semiconductor device includes: providing a semiconductor substrate including a foundation layer having a first conductivity type; forming a deep trench in the foundation layer; and forming a deep layer having a second conductivity type by introducing material gas of the compound semiconductor while introducing dopant gas into an epitaxial growth equipment to cause epitaxial growth of the deep layer in the deep trench. A period in which a temperature in the epitaxial growth equipment is increased to a temperature of the epitaxial growth of the deep layer is defined as a temperature increasing period. In the forming the deep layer, the deep layer is further formed in a bottom corner portion of the deep trench by starting the introducing of the dopant gas during the temperature increasing period and starting the introducing of the material gas after the temperature increasing period.

Abstract: A method for manufacturing a compound semiconductor device includes causing epitaxial growth of a p-type impurity layer containing a compound semiconductor on a foundation layer containing the compound semiconductor. The causing the epitaxial growth includes performing pre-doping to preliminarily introduce dopant gas before introducing material gas for the epitaxial growth of the compound semiconductor. The dopant gas contains an organic metal material providing dopant of p-type impurities. An impurity concentration profile of the p-type impurity layer is controlled by controlling a time of the pre-doping.

Abstract: Methods for the removal of ionic contaminants from a hydrophilic organic solvent by a mixed bed of ion exchange resins are described. A mixed bed of ion exchange resins with gel-type strong-acid cationic ion exchange resin with a specific moisture holding capacity and gel-type anionic ion exchange resin is used in some embodiments of such methods.

Abstract: Methods for the removal of ionic contaminants from hydrolysable organic solvent by ion exchange resins are described. A mixed bed of ion exchange resin with cationic ion exchange resin and weak-base anionic ion exchange resin is used in such methods.

Abstract: Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction.

Abstract: Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction.

Abstract: A semiconductor device includes a semiconductor substrate of silicon carbide, and a temperature sensor portion. The semiconductor substrate includes a portion in which an n-type drift region and a p-type body region are laminated. The temperature sensor portion is disposed in the semiconductor substrate and is separated from the drift region by the body region. The temperature sensor portion includes an n-type cathode region being in contact with the body region, and a p-type anode region separated from the body region by the cathode region.

Abstract: A switching device includes a semiconductor substrate; first and second trenches; gate insulating layers; and gate electrodes. The semiconductor substrate includes a first semiconductor region of a first conductivity type, a body region of a second conductivity type, a second semiconductor region of the first conductivity type, first and second bottom semiconductor regions of the second conductivity type disposed in areas extending to bottom surfaces of the first and second trenches, and a connection semiconductor region of the second conductivity type extending from the first trench to reach the second trench in a depth range from a depth of a lower end of the body region to a depth of the bottom surfaces of the first and second trenches, the connection semiconductor region contacting the second semiconductor region, and being connected to the body region, and the first and second bottom semiconductor regions.