Patents by Inventor Yusuke Yamashita

Yusuke Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220045172
    Abstract: A silicon carbide semiconductor device includes a substrate, a drift layer disposed above the substrate, a base region disposed above the drift layer, a source region disposed above the base region, a gate trench formed deeper than the base region from a surface of the source region, a gate insulating film covering an inner wall surface of the gate trench, a gate electrode disposed on the gate insulating film, an interlayer insulating film covering the gate electrode and the gate insulating film and having a contact hole, a source electrode brought in ohmic contact with the source region through the contact hole, and a drain electrode disposed to a rear surface of the substrate. The source region has a lower impurity concentration on a side close to the base region than on a surface side brought in ohmic contact with the source region.
    Type: Application
    Filed: October 26, 2021
    Publication date: February 10, 2022
    Inventors: Aiko KAJI, Yuichi TAKEUCHI, Shuhei MITANI, Ryota SUZUKI, Yusuke YAMASHITA
  • Publication number: 20220045211
    Abstract: A semiconductor device including a semiconductor element is provided. The semiconductor element includes a saturation current suppression layer formed above a drift layer and including electric field block layers arranged in a stripe manner and JFET portions arranged in a stripe manner. The electric field block layers and the JFET portions are alternately arranged. The semiconductor element includes trench gate structures. A longer direction of the trench gate structure intersects with a longer direction of the electric field block layer and a longer direction of JFET portion. The JFET portion includes a first layer having a first conductivity type impurity concentration larger than the drift layer and a second layer formed above the first layer and having a first conductivity type impurity concentration smaller than the first layer.
    Type: Application
    Filed: October 26, 2021
    Publication date: February 10, 2022
    Inventors: Yuichi TAKEUCHI, Yasuhiro EBIHARA, Masahiro SUGIMOTO, Yusuke YAMASHITA
  • Publication number: 20220009254
    Abstract: An image forming apparatus includes an image forming portion that forms an image on a medium, a casing that houses the image forming portion, a power operating portion for use in switching on and off the main power source of the image forming apparatus, and a touch operation portion for use in inputting operations on the image forming apparatus. Assuming that a direction in which the casing faces a user when the touch operation portion is used is a front-to-back direction, the power operating portion is disposed at a one side in a lateral direction crossing the front-to-back direction at a front of the casing in the front-to-back direction, and the touch operation portion is disposed at an other side at the front of the casing in the front-to-back direction.
    Type: Application
    Filed: July 6, 2021
    Publication date: January 13, 2022
    Inventor: Yusuke YAMASHITA
  • Publication number: 20220013666
    Abstract: A semiconductor device includes a cell section having a plurality of gate structures, and an outer peripheral section surrounding the cell section. The cell section includes a semiconductor substrate, the plurality of gate structures, a first electrode and a second electrode. The cell section and the outer peripheral section includes a protective film made of a material having a thermal conductivity lower than that of the first electrode. The protective film extends from the outer peripheral section to an outer edge portion of the cell section adjacent to the outer peripheral section and covers a portion of the first electrode adjacent to the outer peripheral section.
    Type: Application
    Filed: September 23, 2021
    Publication date: January 13, 2022
    Inventors: Yasushi URAKAMI, Jun SAITO, Yusuke YAMASHITA
  • Patent number: 11211668
    Abstract: A power storage apparatus has a case accommodating an electrode assembly, and a release valve present in the wall of the case. The electrode assembly includes electrodes. A shielding member is arranged between the inner surface of the wall and the end surface of the electrode assembly. A point located in a center of the case in a front view of the case taken in the stacking direction of the electrodes and located in a center of a dimension of the electrode assembly in the stacking direction is a center point, and a region surrounded by a plane connecting the center point and a contour of the pressure release valve at a shortest distance is a three-dimensional region. The shielding member includes a shielding portion that entirely covers a cross section of the three-dimensional region along the end face of the electrode assembly.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: December 28, 2021
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Tomohiro Nakamura, Takayuki Hirose, Yusuke Yamashita, Masato Ogasawara, Shinji Suzuki, Yasuaki Takenaka, Ryuji Oide, Mikiya Kurita, Atsushi Minagata
  • Patent number: 11202024
    Abstract: An imaging apparatus having a wide dynamic range and a stable black level without decreasing frame rate comprises a pixel unit including pixels, a read out unit for reading out the noise signal from each pixel and to amplify the noise signal by a first gain to generate a first noise signal, reads out the pixel signal and amplifies the pixel signal by the first gain and a second gain to generate a first and a second pixel signal, a first memory unit for storing a second noise signal generated by amplifying, by the second gain, the noise signal read out from a pixel of a predetermined row, and a subtraction unit for subtracting the first noise signal from the first pixel signal and to subtract the second noise signal stored in the first memory unit from the second pixel signal, while sequentially reading out signals from each pixel.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: December 14, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takenori Kobuse, Yusuke Yamashita
  • Patent number: 11201239
    Abstract: A semiconductor device including a semiconductor element is provided. The semiconductor element includes a saturation current suppression layer formed above a drift layer and including electric field block layers arranged in a stripe manner and JFET portions arranged in a stripe manner. The electric field block layers and the JFET portions are alternately arranged. The semiconductor element includes trench gate structures. A longer direction of the trench gate structure intersects with a longer direction of the electric field block layer and a longer direction of JFET portion. The JFET portion includes a first layer having a first conductivity type impurity concentration larger than the drift layer and a second layer formed above the first layer and having a first conductivity type impurity concentration smaller than the first layer.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: December 14, 2021
    Assignee: DENSO CORPORATION
    Inventors: Yuichi Takeuchi, Yasuhiro Ebihara, Masahiro Sugimoto, Yusuke Yamashita
  • Patent number: 11201216
    Abstract: A silicon carbide semiconductor device includes a substrate, a drift layer disposed above the substrate, a base region disposed above the drift layer, a source region disposed above the base region, a gate trench formed deeper than the base region from a surface of the source region, a gate insulating film covering an inner wall surface of the gate trench, a gate electrode disposed on the gate insulating film, an interlayer insulating film covering the gate electrode and the gate insulating film and having a contact hole, a source electrode brought in ohmic contact with the source region through the contact hole, and a drain electrode disposed to a rear surface of the substrate. The source region has a lower impurity concentration on a side close to the base region than on a surface side brought in ohmic contact with the source region.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: December 14, 2021
    Assignee: DENSO CORPORATION
    Inventors: Aiko Kaji, Yuichi Takeuchi, Shuhei Mitani, Ryota Suzuki, Yusuke Yamashita
  • Publication number: 20210384343
    Abstract: A semiconductor device includes a semiconductor element having a substrate, a drift layer, a base region, a source region, trench gate structures, an interlayer insulating film, a source electrode, and a drain electrode. The substrate is made of silicon carbide. The drift layer is disposed on the substrate and has an impurity concentration lower than the substrate. The base region is made of silicon carbide and disposed on the drift layer. The source region is made of silicon carbide having an impurity concentration higher than the drift layer. Each trench gate structure has a gate trench, a gate insulating film, and a gate electrode. The interlayer insulating film covers the gate electrode and the gate insulating film. The source electrode is in ohmic-contact with the source region. The drain electrode is disposed on a rear surface of the substrate.
    Type: Application
    Filed: August 24, 2021
    Publication date: December 9, 2021
    Inventors: YUICHI TAKEUCHI, KATSUMI SUZUKI, YUSUKE YAMASHITA, TAKEHIRO KATO
  • Publication number: 20210366959
    Abstract: An image sensor comprises: a pixel region including a plurality of microlenses arranged in a matrix, and a plurality of photoelectric conversion portions provided for each of the microlenses; a plurality of amplifiers that apply a plurality of different gains to signals output from the pixel region; and a scanning circuit that scans the pixel region so that a partial signal and an added signal are read out, the partial signal being a signal from some of the plurality of photoelectric conversion portions, and the added signal being a signal obtained by adding the signals from the plurality of photoelectric conversion portions.
    Type: Application
    Filed: August 4, 2021
    Publication date: November 25, 2021
    Inventors: Yusuke Yamashita, Koki Nakamura
  • Publication number: 20210306571
    Abstract: In order to improve linearity characteristics in synthesis processing for expanding a dynamic range, an image pickup apparatus comprising an AD conversion unit for performing AD conversion of input signals by comparing a first ramp signal or a second ramp signal; a first synthesis unit for synthesizing a first signal AD converted using the first ramp signal and a second signal AD converted using the second ramp signal; a first correction unit for correcting a level difference between the first signal and the second signal when the first signal and the second signal are synthesized; an amplifier for amplifying pixel signals by different gains; a second synthesis unit for synthesizing the signals amplified by the different gains; and a second correction unit for correcting a level difference between the signals amplified by the different gains when the signals amplified by the different gains are synthesized.
    Type: Application
    Filed: March 19, 2021
    Publication date: September 30, 2021
    Inventors: Yusuke Yamashita, Yasuhiro Itoh
  • Patent number: 11133339
    Abstract: An image sensor comprises: a pixel region including a plurality of microlenses arranged in a matrix, and a plurality of photoelectric conversion portions provided for each of the microlenses; a plurality of amplifiers that apply a plurality of different gains to signals output from the pixel region; and a scanning circuit that scans the pixel region so that a partial signal and an added signal are read out, the partial signal being a signal from some of the plurality of photoelectric conversion portions, and the added signal being a signal obtained by adding the signals from the plurality of photoelectric conversion portions.
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: September 28, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yusuke Yamashita, Koki Nakamura
  • Publication number: 20210280618
    Abstract: An image pickup apparatus that enables to quickly capture an image from which a predetermined reflected light component is removed with desired sensitivity. A polarizing filter two-dimensionally arranges a plurality of sets each of which includes polarizing filter elements having different polarization directions. A first image sensor has pixels that respectively correspond to polarizing filter elements of the polarizing filter. A polarization calculation unit detects a polarized component of light that enters into a region in which one set of polarizing filter elements are arranged based on signals output from pixels in the region of the first image sensor for each region. A correction unit corrects a pixel signal output from a pixel of a second image sensor corresponding to the region based on a calculation result by the polarization calculation unit for each pixel of the second image sensor.
    Type: Application
    Filed: February 16, 2021
    Publication date: September 9, 2021
    Inventors: Yusuke Yamashita, Tokuro Nishida, Kazuya Kitamura, Hiroyuki Hasegawa, Takenori Kobuse, Yoshikazu Ishikawa, Takayuki Kimura
  • Patent number: 11107911
    Abstract: A semiconductor device includes an inversion type semiconductor element, which has: a substrate; a drift layer; a saturation current suppression layer; a current dispersion layer; a base region; a source region; a connection layer; a plurality of trench gate structures; an interlayer insulation film; a source electrode; and a drain electrode. A channel region is provided in a portion of the base region in contact with each trench gate structure by applying a gate voltage to the gate electrode and applying a normal operation voltage as a drain voltage to the drain electrode; and a current flows between the source electrode and the drain electrode through the source region and the JFET portion.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: August 31, 2021
    Assignee: DENSO CORPORATION
    Inventors: Yuichi Takeuchi, Shuhei Mitani, Yasuhiro Ebihara, Yusuke Yamashita, Tadashi Misumi
  • Publication number: 20210266444
    Abstract: An image capturing apparatus that has an image capturing device including polarization elements and sets a proper frame rate according to a situation when acquiring a video using polarization information. The image capturing device an image capturing device including polarization pixels that detect polarization information of a plurality of different directions. The polarization information of the polarization pixels is determined by performing first polarization calculation or second polarization calculation which is smaller in calculation load than the first polarization calculation, on video signals output from the polarization pixels. A polarization-processed image is generated by using the polarization information. The first polarization calculation and the second polarization calculation are switched according to a predetermined timing, a mode, or a result of detecting a predetermined state.
    Type: Application
    Filed: February 10, 2021
    Publication date: August 26, 2021
    Inventors: Kazuya KITAMURA, Tokuro NISHIDA, Hiroyuki HASEGAWA, Takenori KOBUSE, Yusuke YAMASHITA, Yoshikazu ISHIKAWA, Takayuki KIMURA
  • Publication number: 20210252576
    Abstract: A multiple-winding pipe forming device for forming a wound pipe, the multiple-winding pipe forming device comprising: a plurality of pairs of forming rollers curling a metal sheet and winding the metal sheet into a roll shape; and a mandrel fabricated of metal, the mandrel including: a shaft disposed inside the metal sheet wound in the roll shape, one end side of the shaft being retained, which one end side is disposed upstream in a feeding direction of the metal sheet, and a working portion including a taper portion that increases in diameter from upstream to downstream in the feeding direction, wherein the taper portion is disposed at a position at which the metal sheet wound in the roll shape is sandwiched by, of the plurality of pairs of forming rollers, a pair of the forming rollers that is disposed at a downstream side in the feeding direction.
    Type: Application
    Filed: April 26, 2019
    Publication date: August 19, 2021
    Inventors: Eiju Kobayashi, Hiroyuki Takayasu, Jun Negishi, Masatoshi Tsurumi, Hiroyuki limura, Yusuke Yamashita, Michihiro Tsuda, Yosuke Nimura, Naoyuki Terunuma
  • Publication number: 20210195080
    Abstract: An electronic device acquires polarization information of a subject based on a plurality of pieces of image data based on a first signal output from a first sensor. The first sensor can capture an optical image of the subject acquired via a polarizing filter provided with areas having different polarization angles. The device further acquires an evaluation value for controlling brightness of an image at the time of capturing the optical image of the subject, based on the plurality of pieces of image data. The plurality of pieces of image data have different polarization angles, by respectively being acquired via areas of the polarizing filter having the plurality of different polarization angles. A degree of weighting to be assigned to the plurality of pieces of image data at the time of acquiring the evaluation value based on the polarization information.
    Type: Application
    Filed: December 14, 2020
    Publication date: June 24, 2021
    Inventors: Takenori Kobuse, Yoshikazu Ishikawa, Takayuki Kimura, Yusuke Yamashita, Tokuro Nishida
  • Publication number: 20210184031
    Abstract: A SiC semiconductor device includes a main cell region and sense cell region being electrically isolated by an element isolation portion. The SiC semiconductor device includes a substrate, a first impurity region, a first current dispersion layer, first deep layers, a second current dispersion layer, a second deep layer, a base region, a trench gate structure, a second impurity region, first electrodes and a second electrode. The second impurity region, the first electrodes, and the second electrode are disposed at the main cell region and the sense cell region to form a vertical semiconductor element. The vertical semiconductor element allows a current flowing between the first electrode and the second electrode through a voltage applied to the gate electrode. The spacing interval between the deep layers at the element isolation portion is shorter than or equal to a spacing interval between the deep layers at the main cell region.
    Type: Application
    Filed: December 10, 2020
    Publication date: June 17, 2021
    Inventors: Tsuyoshi YAMAMOTO, Ryota SUZUKI, Yusuke YAMASHITA
  • Patent number: 11004765
    Abstract: A semiconductor device may include a semiconductor substrate, an insulator film covering a part of an upper surface of the substrate, and a gate electrode opposing the upper surface via the insulator film. In the semiconductor substrate, a drift layer extending through a body layer to the upper surface opposes the gate electrode via the insulator film. The insulator film extends from the upper surface of the semiconductor substrate to an upper surface of the gate electrode by passing between the gate electrode and an upper electrode, and defines an opening at the upper surface of the gate electrode. A side surface of the opening of the insulator film is entirely located outside a volume space consisting of all straight lines that passes through the opposing surface of the drift layer at angle of 45 degrees to the opposing surface.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: May 11, 2021
    Assignee: DENSO CORPORATION
    Inventors: Jun Saito, Yusuke Yamashita, Yasushi Urakami
  • Patent number: 10985241
    Abstract: A semiconductor device includes a semiconductor substrate, which includes an element region and an outer-periphery voltage withstanding region. The outer-periphery voltage withstanding region includes a plurality of p-type guard rings surrounding the element region in a multiple manner. Each of the guard rings includes a high concentration region and a low concentration region. A low concentration region of an outermost guard ring includes a first part positioned on an outer peripheral side of its high concentration region. Respective low concentration regions of the guard rings include respective second parts, each positioned in a range sandwiched between corresponding two adjacent high concentration regions among a plurality of concentration regions. A width of the first part on a front surface is wider than widths of the second parts on the front surface.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: April 20, 2021
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Hiromichi Kinpara, Yusuke Yamashita, Yasushi Urakami