Abstract: The present disclosure provides a display backplane including an array substrate including at least one pixel unit each including at least one TFT; a planarization layer covering the array substrate; a pad layer including pads on the planarization layer, surface of the pad away from the planarization layer being first surface, each pixel unit being provided with one pad electrically coupled to a driving thin film transistor in a corresponding pixel unit through via hole penetrating through the planarization layer; a passivation layer covering the pad layer and including through holes, each pad corresponding to one through hole, such that the first surface of each pad is exposed through corresponding through hole, and area of top opening of through hole is smaller than area of bottom opening thereof. The present disclosure further provides a fabrication method of the display backplane, a display panel and a fabrication method thereof.

Abstract: The present disclosure relates to a backplane, a backlight source, a display device, and a manufacturing method of the backplane. The backplane includes: a substrate; a plurality of barriers disposed on a surface of the substrate; and a first metal layer disposed on the surface of the substrate and including a plurality of metal patterns spaced apart by the plurality of barriers, wherein the barrier and the metal pattern are connected by a concave-convex mating structure.

Abstract: An array substrate is provided. The array substrate includes a display area having a first array of subpixels; and a partially transparent area having a second array of subpixels. The partially transparent area includes a plurality of light emitting regions spaced apart from each other by a substantially transparent non-light emitting region. The second array of subpixels is limited in the plurality of light emitting regions. The array substrate further includes a plurality of photosensors and a plurality of first thin film transistors in the substantially transparent non-light emitting region. A respective one of the plurality of photosensors includes a first polarity semiconductor layer, a second polarity semiconductor layer, and an intrinsic semiconductor layer connecting the first polarity semiconductor layer and the second polarity semiconductor layer.

Abstract: The present disclosure provides an array substrate and a manufacturing method thereof, a display panel and a backlight module. The manufacturing method of the array substrate includes: providing a base substrate; forming a metal wiring layer on a side of the base substrate, the metal wiring layer including a first copper metal layer; forming a planarization layer on a side of the metal wiring layer away from the base substrate; forming a drive lead layer on a side of the planarization layer away from the base substrate, the drive lead layer being electrically connected to the metal wiring layer, the drive lead layer including a second copper metal layer with a thickness larger than that of the first copper metal layer; forming a functional device layer on a side of the drive lead layer away from the base substrate.

Abstract: A substrate includes: a base substrate; an organic layer on the base substrate with openings defined through the organic layer; a first metal layer including first metal patterns, where the first metal pattern is in the opening, and includes a first portion parallel to a bottom of the opening and a second portion parallel to a lateral wall of the opening; a second metal layer having a thickness greater than a thickness of the first metal layer; where the second metal layer includes second metal patterns, the second metal pattern is located in the opening and is in contact with the first metal layer; and, a distance from a surface of the first metal layer away from the base substrate to a plane where the base substrate is located is smaller than a distance from a surface of the organic layer away from the base substrate to the plane.

Abstract: A display substrate is provided, which includes a base substrate and a plurality of sub-pixels disposed on the base substrate. At least one sub-pixel includes a light transmittance region and a display region. The display region includes a circuit structure layer and a light-emitting element which are disposed on a base substrate, and the light-emitting element is connected with the circuit structure layer. The display substrate further includes a plurality of insulating layers disposed on the base substrate, and at least one insulating layer is hollowed out in the light transmittance region.

Abstract: The present application discloses an array substrate and a splicing screen. The array substrate provided by an embodiment of the present application includes: a flexible base, wherein the flexible base includes a display region, a first region and a second region, the display region and at least one of the first region and the second region are located in different planes, and the first region is located between the display region and the second region; a plurality of signal lines, arranged on the display region and the first region; a plurality of fan-out lines, arranged on the second region and connected with the plurality of signal lines in a one-to-one correspondence; and a buffer cushion, arranged on the first region, wherein an orthographic projection of the buffer cushion on the flexible base does not overlap with orthographic projections of the signal lines on the flexible base.

Abstract: A semiconductor apparatus and a method for manufacturing the semiconductor apparatus are provided. The semiconductor apparatus includes: a base substrate; a plurality of chips arranged on the base substrate each including a chip main body and a plurality of terminals arranged thereon; a plurality of fixed connection portions arranged on the base substrate, and adjacent to the plurality of chips; a terminal expansion layer arranged on the base substrate; and a plurality of expansion wires in the terminal expansion layer and configured to electrically connect the chips, wherein an expansion wire configured to electrically connect two chips includes at least a first wire segment and a second wire segment, and the first wire segment is configured to electrically connect a terminal of a chip and a fixed connection portion adjacent to the chip, and the second wire segment is configured to connect two fixed connection portions between the two chips.

Abstract: A semiconductor apparatus and a method for manufacturing the semiconductor apparatus are provided. The semiconductor apparatus includes: a base substrate; a chip arranged on the base substrate, wherein the chip includes a chip main body and a plurality of terminals arranged on the chip main body; a terminal expansion layer arranged on the base substrate, the terminal expansion layer including a conductive material, and the terminal expansion layer and at least one terminal are located on a same side of the chip main body; and a plurality of expansion wires in the terminal expansion layer, wherein the plurality of expansion wires are electrically connected to the plurality of terminals, respectively, to lead out the plurality of terminals, wherein an orthographic projection of at least one expansion wire on the base substrate completely covers an orthographic projection of a terminal electrically connected to the expansion wire on the base substrate.

Abstract: The present disclosure discloses a mass transfer method and system for micro light emitting diodes, wherein the mass transfer method includes: providing a component substrate on which a plurality of micro light emitting diodes are formed; picking up the micro light emitting diodes on the component substrate at least once by a plurality of bonding structures on a first medium load substrate, and transferring micro light emitting diodes picked up every time to a second medium load substrate; and transferring the micro light emitting diodes on the second medium load substrate into corresponding sub-pixels on a target substrate at one time, wherein one of the micro light emitting diodes on the second medium load substrate corresponds to one of the sub-pixels on the target substrate.

Abstract: Provided are a display structure and a preparation method thereof, and a display apparatus. The display structure includes a flexible back plate and a display substrate which are stacked, the flexible back plate including a bonding electrode for bonding to an integrated circuit chip, and the flexible back plate being bent to form a bent portion on which the bonding electrode is located.

Abstract: Disclosed are a connecting substrate and a fabrication method, a splicing screen, and a display apparatus. The connecting substrate has panel areas (10) and connecting areas (30) connecting every two adjacent panel areas (10), each panel area including a display area (20) surrounded by the connecting areas (30). The connecting substrate includes, in connecting area: a base (101); connecting wirings (102) on the base (101); an insulating layer (103) covering the plurality of connecting wirings (102) and defining a groove (106) for accommodating a display panel (107) to be spliced; through holes (105) penetrating the insulating layer (103); and connecting electrodes (104) respectively provided in the through holes (105) and coupled to the connecting wirings (102) in one-to-one correspondence. The connecting electrodes (104) are coupled to first pads (P1) on light-emitting surface of the display panel (107) to be spliced in one-to-one correspondence.

Abstract: The present disclosure provides a driving substrate, including: a flexible substrate including a display region and a bendable region; a first conductive layer on the flexible substrate and including a first wire in the display region, and a connection wire at least partially in the bendable region; a flexible insulating layer including a first insulation pattern in the display region, and a second insulation pattern in the bendable region; a second conductive layer at a side of the flexible insulating layer far away from the flexible substrate; and a planarization layer at a side of the second conductive layer far away from the flexible substrate and having a hollow structure in the bendable region, wherein a thickness of a portion of the second insulating pattern covering the connection wire is d2, a thickness of the flexible substrate is d3, and d2?2 ?m and |d2?d3|?3 ?m.

Abstract: A LED chip, including: substrate; LEDs on side of the substrate, each including first semiconductor pattern, light emission pattern, second semiconductor pattern sequentially stacked, the first semiconductor patterns of at least two LEDs being formed as single piece to constitute first semiconductor layer; at least one first electrode on side of first semiconductor layer away from the substrate and electrically coupled to first semiconductor layer; second electrodes on side of the second semiconductor patterns away from the substrate, each being electrically coupled to second semiconductor pattern of corresponding LED; pixel defining layer on side of the substrate away from LED, and having pixel openings in one-to-one correspondence with LEDs; and a color conversion pattern within at least two pixel openings, and converting light of first color emitted by the light emission pattern into light of target color other than the first color. The LED chip is Mini-LED or Micro-LED chip.

Abstract: The present disclosure provides an air drying device including: a base including opposing top and bottom portions, the top portion including at least one first bearing surface; and at least one bearing plate disposed at the top portion of the base. The bearing plate includes a second bearing surface, and the first bearing surface is inclined relative to the second bearing surface.

Abstract: A method of manufacturing a driving backplane for display includes: forming a first conductive pattern layer including first conductive lines on a base; and forming a second conductive pattern layer including electrode groups and second conductive lines on a side of the first conductive pattern layer away from the base. The first conductive lines and the second conductive lines cross and are insulated from each other; an electrode group includes a first electrode and a second electrode electrically connected to a corresponding second conductive line. Orthogonal projections, on the base, of the first electrode and a corresponding first conductive line have an overlapping region, and a portion of the first electrode, whose orthogonal projection on the base is located in the overlapping region, is in contact with a portion of the first conductive line, whose orthogonal projection on the base is located in the overlapping region.

Abstract: Disclosed herein is a photoelectric sensor, display panel and their manufacturing method. The photoelectric sensor may comprise a photodeformable unit and a piezoelectric unit in contact with the photodeformable unit.

Abstract: A shift register unit includes an input sub-circuit, a pull-down node driving sub-circuit and an output sub-circuit. The pull-down node driving sub-circuit includes a first connection unit, a first voltage-reduction unit and a second connection unit, and configured to: under the control of the first voltage signal terminal and the pull-up node, transmit a first voltage signal from the first voltage signal terminal to the first pull-down node via the first connection unit, and reduce a voltage applied to the second connection unit via the first voltage-reduction unit; and transmit a second voltage signal from the second voltage signal terminal to the first pull-down node via the second connection unit under the control of the pull-up node.

Abstract: An array substrate including a display area having a plurality of subpixels is provided. The plurality of subpixels includes a plurality of first subpixels in a display-bonding sub-area and a plurality of second subpixels in a regular display sub-area. The array substrate includes a plurality of thin film transistors on a first side of the base substrate and respectively in the plurality of subpixels. A respective one of the plurality of first subpixels includes a bonding pad on a second side of a base substrate; a lead line electrically connecting a respective one of a plurality of thin film transistors to the bonding pad; and a via extending through the base substrate. The lead line is unexposed in the array substrate. The lead line extends from the first side to the second side of the base substrate through the via, to connect to the bonding pad.

Abstract: Embodiments of the present disclosure provide an intermediate substrate, including: a first substrate; a black photoresist layer on a side of the first substrate; and a plurality of light emitting devices on a side of the black photoresist layer away from the first substrate. Each of the plurality of light emitting devices has a light-exiting side for emergence of light emitted by the light emitting device, the light-exiting side is in contact with the black photoresist layer, and the light emitting device includes a driving electrode for introducing a driving signal.