Abstract: Disclosed are an array substrate, and a display device, and a method for manufacturing the same. The array substrate includes: a base substrate, and a thin film transistor, a planarization pattern, a bonding pattern, and a conductive structure that are disposed on the base substrate. The thin film transistor, the planarization pattern, and the bonding pattern are laminated in a direction going distally from the base substrate. The planarization pattern is provided with a via and a groove, the conductive structure is disposed in the via, wherein the bonding pattern is conductive and is electrically connected to the thin film transistor by the conductive structure, an orthographic projection of the bonding pattern on the base substrate falls outside an orthographic projection of the groove on the base substrate, and the groove is configured to accommodate an adhesive.

Abstract: A thin film transistor, a manufacturing method thereof, an array substrate, a display panel, and a display device are disclosed. The present disclosure is directed to the field of display technologies. The thin film transistor comprises a drain electrode and a source electrode. At least one of the drain electrode and the source electrode are an yttrium-doped first metal film, and a surface of the first metal film is yttrium-copper complex oxide formed by annealing.

Abstract: The present disclosure relates to a method of manufacturing an array substrate. The method of manufacturing an array substrate may include forming a main via hole in a substrate, filling a first conductive material in the main via hole, and forming a pixel circuit layer on a first surface of the substrate. The pixel circuit layer may include a first via hole. An orthographic projection of the first via hole on the substrate may at least partially overlap the corresponding main via hole.

Abstract: An array substrate, a method for manufacturing the same, a display panel, and a display device are provided. The array substrate comprises a substrate, a light shielding layer on the substrate, and a transistor arranged at a side of the light shielding layer away from the substrate, the transistor including an active layer.

Abstract: The present disclosure provides a display backplane and a method for manufacturing the same, a display panel, and a display device. The display backplane includes: a substrate; a first thin film transistor located on one side of the substrate; and a second thin film transistor located on the one side of the substrate, wherein: the first thin film transistor comprises a first active layer, the second thin film transistor comprises a second active layer, wherein the first active layer and the second active layer are located in a same layer, and a material of the first active layer is different from that of the second active layer.

Abstract: Embodiments of the present disclosure provide an array substrate, a display device, a method for manufacturing an array substrate, a method for manufacturing a display device, and a spliced display device. The array substrate includes: a base substrate in which a through hole is provided; a filling portion disposed in the through hole, including a recessed structure and made from a flexible material; an electrically conductive pattern disposed on the filling portion and at least partially located in the recessed structure; and a film layer disposed on a side of the electrically conductive pattern facing away from the base substrate.

Abstract: The present disclosure provides a method for manufacturing an LTPS thin film transistor which includes: forming a light shielding pattern and an active layer of the LTPS thin film transistor on a base substrate through one single patterning process, in which an orthogonal projection of the active layer on the base substrate falls within an orthogonal projection of the light shielding pattern on the base substrate, and the light shielding pattern is made of a semiconductor material.

Abstract: An array substrate, a method of manufacturing the array substrate, and a display apparatus are disclosed. The array substrate includes: a base substrate; a plurality of sensing elements disposed on a first side of the base substrate and each configured to convert at least one of a light signal and an acoustic wave signal into an electrical signal; and a plurality of switching devices disposed on a second side of the base substrate opposite to the first side. The plurality of switching devices include a plurality of first switching elements, and each of the plurality of first switching elements is electrically connected to a corresponding one of the plurality of sensing elements to transmit the electrical signal.

Abstract: A micro LED display panel and a method for fabricating the same are disclosed, and the micro LED display panel includes a TFT back panel, and a micro LED fixed on the TFT back panel, wherein the TFT back panel includes a substrate, and a first insulation layer and a second insulation layer stacked over the substrate in that order, wherein the first insulation layer includes a groove filled with the second insulation layer, and a normal projection of the groove onto the substrate does not overlap with a normal projection of a TFT area in the TFT back panel onto the substrate, wherein the rigidity of the second insulation layer is lower than the rigidity of the first insulation layer.

Abstract: The present disclosure provides an OLED substrate and a display device. The OLED substrate includes a base substrate, and a thin-film transistor, a first electrode, and a light-emitting layer arranged in sequence on the base substrate, in which the OLED substrate further includes a light-shielding layer arranged between an active layer of the thin-film transistor and the first electrode.

Abstract: An oxide thin film transistor, an array substrate, and preparation methods thereof are disclosed. The method for preparing an oxide thin film transistor comprises a step of forming a pattern comprising an oxide semiconductor active layer on a substrate, wherein the step comprises: forming an amorphous oxide semiconductor thin film on the substrate; performing an excimer laser annealing, at least at a position in the amorphous oxide semiconductor thin film corresponding to a channel region of oxide semiconductor active layer to be formed, such that the amorphous oxide semiconductor material at the laser-annealed position is crystallized, to form a crystalline oxide semiconductor material; and forming the pattern comprising the oxide semiconductor active layer.

Abstract: The present disclosure provides a polarizing device and a method for preparing the same, a display substrate, and a display device. The polarizing device includes: a base substrate, a metal wire grid, and an anti-reflection layer, in which the metal wire grid is arranged on the base substrate, the anti-reflection layer is arranged on the surface of the metal wire grid away from the base substrate, and the anti-reflection layer is a carbon film layer.

Abstract: The present application provides an array substrate. The array substrate includes a base substrate; a light shielding layer on the base substrate; a metal oxide layer on a side of the light shielding layer distal to the base substrate; and an active layer on a side of the metal oxide layer distal to the base substrate. The metal oxide layer includes a metal oxide material. The light shielding layer includes amorphous silicon. An orthographic projection of the light shielding layer on the base substrate substantially overlaps with an orthographic projection of the active layer on the base substrate, and substantially overlaps with an orthographic projection of the metal oxide layer on the base substrate.

Abstract: A conductive pattern and a method for manufacturing the same, a thin film transistor, a display substrate and a display device are provided. The method includes: step A, forming a metal layer on a base substrate; step B, forming a first conductive buffer layer on the metal layer; step C, patterning the metal layer and the first conductive buffer layer to form a conductive sub-pattern; and performing steps A to C repeatedly for N times to form N conductive sub-patterns that are stacked on the base substrate. The conductive pattern comprises the N conductive sub-patterns, and N is a positive integer greater than 1.

Abstract: The present disclosure relates to a photoetching parameter adjustment method, apparatus and mask plate, in the field of photoetching technology. The method comprises: forming a photoresist pattern on a first substrate by a photoetching process, wherein the photoresist pattern comprises a photoetching detection pattern; judging whether photoetching parameters of the photoetching process need to be adjusted or not in accordance with the photoetching detection pattern; and adjusting the photoetching parameters when the photoetching parameters need to be adjusted. The present disclosure solves the problem that the reliability of the photoetching parameters is low and improves the reliability of the photoetching parameters. The present disclosure is used for adjusting photoetching parameters.

Abstract: A feature recognition structure provided by the embodiments of the present disclosure comprises: a plurality of first electrodes and a plurality of second electrodes disposed on a base substrate, wherein orthogonal projections of the plurality of first electrodes and of the plurality of second electrodes on the base substrate intersect each other to form a plurality of overlap regions; and a plurality of functional patterns disposed between one or more of the plurality of first electrodes and corresponding one or more of the plurality of second electrodes, wherein an orthogonal projection of each of the plurality of functional patterns on the base substrate is located in a corresponding one of the plurality of overlap regions; the functional patterns comprise at least one piezoelectric material, and have at least two types of sub-patterns, and different types of the sub-patterns have substantially different piezoelectric coefficients.

Abstract: The present application discloses a thin film transistor, a method of fabricating the same, an array substrate, and a display device. The thin film transistor comprises: a thin film transistor comprising: a light shielding layer; an active layer; a first insulating layer disposed between the light shielding layer and the active layer; a gate; a second insulating layer disposed between the gate and the active layer; a source electrode coupled to a source region of the active layer; a drain electrode coupled to a drain region of the active layer; and at least one conductive connecting member for connecting the light shielding layer to at least one of the source region and the drain region or at least one of the source electrode and the drain electrode, respectively.

Abstract: A switch element, an array substrate, a display panel, and a display device are disclosed. The switch element includes: a first electrode, an insulation layer, where the first electrode is located on a first side of the insulation layer; a second electrode and a third electrode arranged spaced from each other, both of which are located on a second side of the insulation layer away from the first electrode; and a first oil ink located between the second electrode and the third electrode, where the first oil ink is electrically conductive, and configured to connect or disconnect the second electrode with or from the third electrode under control of the first electrode.

Abstract: Provided in an embodiment of the present invention are a manufacturing method of an electrode pattern, a thin film transistor and a manufacturing method thereof, and a display panel. The manufacturing method of an electrode pattern includes: forming a metal thin film; performing processing on the metal thin film to form a partner layer over a surface of the metal thin film, the partner layer being configured to react with a photoresist to form a hydrogen bond; and performing patterning to form an electrode.

Abstract: The present disclosure provides an array substrate, a fabricating method thereof, and a display device. The array substrate includes a base substrate which has a first region and a second region respectively provided with a first transistor and a second transistor. The first transistor has a first active layer of low-temperature polysilicon, and the second transistor has a second active layer of metal oxide semiconductor. The first active layer, an interlayer dielectric layer and the second active layer are sequentially disposed on the base substrate, and a barrier layer is disposed between the interlayer dielectric layer and the second active layer.