Abstract: Embodiments of the present disclosures provide methods and apparatus for manufacturing semiconductor devices such as transistors used for amplifying or switching electronic signals. Specifically, embodiments of the present disclosure generally relate to a semiconductor device having a film stack including an interlayer of semiconductor material and a buffer layer of semiconductor material underneath an active device layer. In various embodiments, the interlayer may include group III-V semiconductor materials formed between a first surface of a silicon-based substrate and the buffer layer. In certain embodiments the buffer layer may comprise group IV semiconductor materials. The interlayer may have a lattice constant designed to mitigate lattice mismatch between the group IV buffer layer and the silicon-based substrate. The buffer layer may provide improved integration of the active device layer to improve the performance of the resulting device.

Abstract: A device comprising Si:As source and drain extensions and Si:As or Si:P source and drain features formed using selective epitaxial growth and a method of forming the same is provided. The epitaxial layers used for the source and drain extensions and the source and drain features herein are deposited by simultaneous film formation and film etching, wherein the deposited material on the monocrystalline layer is etched at a slower rate than deposition material deposited on non-monocrystalline location of a substrate. As a result, an epitaxial layer is deposited on the monocrystalline surfaces, and a layer is not deposited on non-monocrystalline surfaces of the same base material, such as silicon.

Abstract: A device comprising Si:As source and drain extensions and Si:As or Si:P source and drain features formed using selective epitaxial growth and a method of forming the same is provided. The epitaxial layers used for the source and drain extensions and the source and drain features herein are deposited by simultaneous film formation and film etching, wherein the deposited material on the monocrystalline layer is etched at a slower rate than deposition material deposited on non-monocrystalline location of a substrate. As a result, an epitaxial layer is deposited on the monocrystalline surfaces, and a layer is not deposited on non-monocrystalline surfaces of the same base material, such as silicon.

Abstract: Methods of sub-10 nm fin formation are disclosed. One method includes patterning a first dielectric layer on a substrate to form one or more projections and a first plurality of spaces, and depositing a first plurality of columns in the first plurality of spaces. The first plurality of columns are separated by a second plurality of spaces. The method also includes depositing a second dielectric layer in the second plurality of spaces to form a plurality of dummy fins, removing the first plurality of columns to form a third plurality of spaces, depositing a second plurality of columns in the third plurality of spaces, removing the one or more projections and the plurality of dummy fins to form a fourth plurality of spaces, and depositing a plurality of fins in the fourth plurality of spaces. The plurality of fins have a width between 5-10 nm.

Abstract: A semiconductor device is disclosed that has a semiconductor substrate having a crystal structure with a <1,0,0> plane and a <1,1,0> plane and a surface that forms an angle of about 0.3 degrees to about 0.7 degrees with the <1,0,0> plane in the direction of the <1,1,0> plane; and a compound semiconductor layer formed on the semiconductor substrate. The compound semiconductor layer is free of antiphase boundaries, and has a thickness between about 200 nm and about 1,000 nm.

Abstract: In one embodiment, a susceptor for thermal processing is provided. The susceptor includes an outer rim surrounding and coupled to an inner dish, the outer rim having an inner edge and an outer edge. The susceptor further includes one or more structures for reducing a contacting surface area between a substrate and the susceptor when the substrate is supported by the susceptor. At least one of the one or more structures is coupled to the inner dish proximate the inner edge of the outer rim.

Abstract: Embodiments of the present disclosure generally relate to a film stack including layers of group III-V semiconductor materials. The film stack includes a phosphorous containing layer deposited over a silicon substrate, a GaAs containing layer deposited on the phosphorous containing layer, and an aluminum containing layer deposited on the GaAs containing layer. The GaAs containing layer between the phosphorous containing layer and the aluminum containing layer improves the surface smoothness of the aluminum containing layer.

Abstract: Embodiments described herein generally relate to a substrate processing system, such as an etch processing system. In one embodiment, a method of processing a substrate is disclosed herein. The method includes removing a native oxide from a surface of the substrate, baking the substrate in a pre-treatment thermal chamber such that double atomic steps are formed on the surface of the substrate, and forming an epitaxial layer on the substrate after the substrate is baked.

Abstract: Apparatus for processing a substrate in a process chamber are provided here. In some embodiments, a gas injector for use in a process chamber includes a first set of outlet ports that provide an angled injection of a first process gas at an angle to a planar surface, and a second set of outlet ports proximate the first set of outlet ports that provide a pressurized laminar flow of a second process gas substantially along the planar surface, the planar surface extending normal to the second set of outlet ports.

Abstract: Methods for conditioning interior surfaces of a process chamber are provided herein. In one embodiment a method of conditioning interior surfaces of a process chamber is provided. The method comprises maintaining a process chamber at a first pressure and at a first temperature of less than about 800 degrees Celsius, providing a process gas to the process chamber at the first pressure and the first temperature, wherein the process gas comprises chlorine (Cl2) and high IR absorption gas, and exposing the process gas to radiant energy to remove residue disposed on interior surfaces of the process chamber.

Abstract: A device comprising Si:As source and drain extensions and Si:As or Si:P source and drain features formed using selective epitaxial growth and a method of forming the same is provided. The epitaxial layers used for the source and drain extensions and the source and drain features herein are deposited by simultaneous film formation and film etching, wherein the deposited material on the monocrystalline layer is etched at a slower rate than deposition material deposited on non-monocrystalline location of a substrate. As a result, an epitaxial layer is deposited on the monocrystalline surfaces, and a layer is not deposited on non-monocrystalline surfaces of the same base material, such as silicon.

Abstract: Embodiments provided herein generally relate to an apparatus for delivering gas to a semiconductor processing chamber. An upper quartz dome of an epitaxial semiconductor processing chamber has a plurality of holes formed therein and precursor gases are provided into a processing volume of the chamber through the holes of the upper dome. Gas delivery tubes extend from the holes in the dome to a flange plate where the tubes are coupled to gas delivery lines. The gas delivery apparatus enables gases to be delivered to the processing volume above a substrate through the quartz upper dome.

Abstract: Embodiments of the present invention generally relates to apparatus for use in film depositions. The apparatus generally include pre-heat rings adapted to be positioned in a processing chamber. In one embodiment, a pre-heat ring includes a ring having an inner edge and an outer edge. The outer edge has a constant radius. The inner edge is oblong-shaped and may have a first portion having a constant radius measured from a center of a circle defined by an outer circumference of the ring. A second portion may have a constant radius measured from a location other than the center of the outer circumference. In another embodiment, a processing chamber includes a pre-heat ring positioned around the periphery of a substrate support. The pre-heat ring includes an inner edge having a first portion, a second portion, and one or more linear portions positioned between the first portion and the second portion.

Abstract: Embodiments disclosed herein generally related to a processing chamber, and more specifically a heat modulator assembly for use in a processing chamber. The heat modulator assembly includes a heat modulator housing and a plurality of heat modulators. The heat modulator housing includes a housing member defining a housing plane, a sidewall, and an annular extension. The sidewall extends perpendicular to the housing plane. The annular extension extends outward from the sidewall. The plurality of heat modulators is positioned in the housing member.

Abstract: The present disclosure generally relate to methods for forming an epitaxial layer on a semiconductor device, including a method of forming a tensile-stressed silicon antimony layer. The method includes heating a substrate disposed within a processing chamber, wherein the substrate comprises silicon, and exposing a surface of the substrate to a gas mixture comprising a silicon-containing precursor and an antimony-containing precursor to form a silicon antimony alloy having an antimony concentration of 5×1020 to 5×1021 atoms per cubic centimeter or greater on the surface.

Abstract: Mass flow verification systems and apparatus may verify mass flow rates of mass flow controllers (MFCs) based on choked flow principles. These systems and apparatus may include a plurality of differently-sized flow restrictors coupled in parallel. A wide range of flow rates may be verified via selection of a flow path through one of the flow restrictors based on an MFC's set point. Mass flow rates may be determined via pressure and temperature measurements upstream of the flow restrictors under choked flow conditions. Methods of verifying a mass flow rate based on choked flow principles are also provided, as are other aspects.

Abstract: Embodiments provided herein generally relate to an apparatus for delivering gas to a semiconductor processing chamber. An upper quartz dome of an epitaxial semiconductor processing chamber has a plurality of holes formed therein and precursor gases are provided into a processing volume of the chamber through the holes of the upper dome. Gas delivery tubes extend from the holes in the dome to a flange plate where the tubes are coupled to gas delivery lines. The gas delivery apparatus enables gases to be delivered to the processing volume above a substrate through the quartz upper dome.

Abstract: Embodiments of the present disclosures provide methods and apparatus for manufacturing semiconductor devices such as transistors used for amplifying or switching electronic signals. Specifically, embodiments of the present disclosure generally relate to a semiconductor device having a film stack including an interlayer of semiconductor material and a buffer layer of semiconductor material underneath an active device layer. In various embodiments, the interlayer may include group III-V semiconductor materials formed between a first surface of a silicon-based substrate and the buffer layer. In certain embodiments the buffer layer may comprise group IV semiconductor materials. The interlayer may have a lattice constant designed to mitigate lattice mismatch between the group IV buffer layer and the silicon-based substrate. The buffer layer may provide improved integration of the active device layer to improve the performance of the resulting device.

Abstract: Methods and apparatus for deposition processes are provided herein. In some embodiments, an apparatus may include a substrate support comprising a susceptor plate having a pocket disposed in an upper surface of the susceptor plate and having a lip formed in the upper surface and circumscribing the pocket, the lip configured to support a substrate on the lip; and a plurality of vents extending from the pocket to the upper surface of the susceptor plate to exhaust gases trapped between the backside of the substrate and the pocket when a substrate is disposed on the lip. Methods of utilizing the inventive apparatus for depositing a layer on a substrate are also disclosed.

Abstract: A method for forming a conformal group III/V layer on a silicon substrate and the resulting substrate with the group III/V layers formed thereon. The method includes removing the native oxide from the substrate, positioning a substrate within a processing chamber, heating the substrate to a first temperature, cooling the substrate to a second temperature, flowing a group III precursor into the processing chamber, maintaining the second temperature while flowing a group III precursor and a group V precursor into the processing chamber until a conformal layer is formed, heating the processing chamber to an annealing temperature, while stopping the flow of the group III precursor, and cooling the processing chamber to the second temperature. Deposition of the III/V layer may be made selective through the use of halide gas etching which preferentially etches dielectric regions.