Packaging method for wafers

A new and improved method for packaging substrates for shipping or transport. The method of the invention comprises a primary packaging structure in which the substrates are placed in a suitable substrate container; a secondary packaging structure in which the substrate container of the primary packaging structure is vacuum-sealed in an anti-static bag; a tertiary packaging structure in which the secondary packaging structure is fitted with a resilient cushion; and a quaternary or final packaging structure in which the tertiary packaging structure is sealed in a shipping carton.

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Description
FIELD OF THE INVENTION

[0001] The present invention relates to packaging of semiconductor wafers for transport or shipping. More particularly, the present invention relates to a new and improved method of packaging semiconductor wafers to prevent wafer damage and particle generation during transit.

BACKGROUND OF THE INVENTION

[0002] In the semiconductor production industry, various processing steps are used to fabricate integrated circuits on a semiconductor wafer. These steps include the deposition of layers of different materials including metallization layers, passivation layers and insulation layers on the wafer substrate, as well as photoresist stripping and sidewall passivation polymer layer removal. In modern memory devices, for example, multiple layers of metal conductors are required for providing a multi-layer metal interconnection structure in defining a circuit on the wafer. Chemical vapor deposition (CVD) processes are widely used to form layers of materials on a semiconductor wafer. Other processing steps in the fabrication of the circuits include formation of a photoresist or other mask such as titanium oxide or silicon oxide, in the form of the desired metal interconnection pattern, using standard lithographic techniques; subjecting the wafer substrate to a dry etching process to remove the conducting layer from the areas not covered by the mask, thereby leaving the metal layer in the form of the masked pattern; removing the mask layer using reactive plasma and chlorine gas, thereby exposing the top surface of the metal interconnect layer; cooling and drying the wafer substrate by applying water and nitrogen gas to the wafer substrate; and removing or stripping polymer residues from the wafer substrate.

[0003] After the devices are fabricated on the wafer surface, the wafers may be transported to a separate facility which is remote from the fabrication facility for packaging or other processing. The integrated circuits on the wafer are prone to damage due to mechanical shock during transit from the fabrication facility to the packaging or other facility. In addition to mechanical shock, integrated circuits are susceptible to damage by electrostatic discharges (ESD) and electrical overstress (EOS). As USLI technology continues downscaling of device features, the wafer size becomes correspondingly larger for economical production of the integrated circuits. Accordingly, the wafers become increasingly expensive with increased size. For example, the cost of a 12″ wafer is about 2.5 times the cost of an 8″ wafer. One production lot (25 wafers) of 8″ wafers costs about $40,000. Thus, protection of the wafers during shipping is of utmost importance.

[0004] Typically, wafers having completed ICs are stacked horizontally in a suitable container, such as a front-opening shipping box (FOSB) or a front-opening unified pod (FOUP), for shipping. Current packaging techniques provide free-fall wafer protection capability for heights of up to only 1 meter and are conveniently suitable for use with only one or a few different types of FOSBs or FOUPs. Furthermore, the current packaging techniques fall below the standards for preventing particle generation. Up to 12.5 hours are required to inspect one lot of 300 mm wafers for damage or particle contamination after shipping. The existing packaging techniques are therefore inconvenient, risky and require time-consuming inspection for damage to the wafers after shipping. Clearly, suppliers of semiconductor wafers would, if possible, like to avoid or reduce as much as possible the potential wafer damage, inconvenience and quality control issues which are associated with traditional methods of packaging wafers for transport.

[0005] Accordingly, an object of the present invention is to provide a new and improved method of packaging substrates for transport.

[0006] Another object of the present invention is to provide a new and improved method of packaging substrates, which method provides enhanced protection from mechanical shock to the substrates.

[0007] Still another object of the present invention is to provide a new and improved packaging method which is suitable for packaging 300 mm wafers for long-distance shipping or short-distance transport.

[0008] Another object of the present invention is to provide a new and improved shipping and transport package for wafers.

[0009] Yet another object of the present invention is to provide a new and improved packaging method which protects integrated circuits on wafers from both mechanical shock and electrostatic discharges.

[0010] A still further object of the present invention is to provide a new and improved packaging method which can utilize a variety of different types of front-opening shipping boxes (FOSBs) and front-opening unified pods (FOUPs).

[0011] Another object of the present invention is to provide a new and improved packaging method which provides enhanced protection to integrated circuits from potential circuit-contaminating particles during shipping or transport of substrates.

[0012] Yet another object of the present invention is to provide a test method for examining the protective capability of shipping packaging for substrates.

SUMMARY OF THE INVENTION

[0013] In accordance with these and other objects and advantages, the present invention comprises a new and improved method for packaging substrates for shipping or transport. The method of the invention comprises a primary packaging structure in which the substrates are placed in a suitable substrate container; a secondary packaging structure in which the substrate container of the primary packaging structure is vacuum-sealed in an anti-static bag; a tertiary packaging structure in which the secondary packaging structure is fitted with a resilient cushion; and a quaternary or final packaging structure in which the tertiary packaging structure is sealed in a shipping carton.

[0014] The present invention may further comprise subjecting the final packaging structure to a test method to verify the protective capability of the packaging. The test method typically includes a free fall test, in which the packaging is subjected to a series of drops from a height of 1.5 meters; a vibration test, in which the packaging is vibrated along X, Y and Z axes for a period of typically 1 hour per axis; and a transportation test. In all three tests, the packaging method of the present invention was verified to provide superior protection from mechanical shock and particle contamination as compared to traditional packaging methods and materials. The presence of particles was nearly zero under 0.16 &mgr;m conditions.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The invention will now be described, by way of example, with reference to the accompanying drawings, in which:

[0016] FIG. 1A is a schematic flow diagram illustrating placement of multiple substrates in a substrate container to form a primary packaging structure according to a first packaging step of the present invention;

[0017] FIG. 1B is a schematic view illustrating placement of the substrate container in an anti-static bag to form a secondary packaging structure according to a second packaging step of the present invention;

[0018] FIG. 1C is a schematic view illustrating placement of a resilient cushion on the anti-static bag containing the wafer container to form a tertiary packaging structure according to a third packaging step of the present invention;

[0019] FIG. 1D is a schematic view illustrating placement of the cushioned tertiary packaging structure in a shipping carton to form a final packaging structure according to a fourth packaging step of the present invention;

[0020] FIG. 2A is a top view of a cushion component used according to the method of the present invention;

[0021] FIG. 2B is a side view of the cushion of FIG. 2A;

[0022] FIG. 2C is an end view of the cushion;

[0023] FIG. 2D is a bottom view of the cushion;

[0024] FIG. 3 is a schematic view illustrating a drop test for the final packaging structure of the present invention;

[0025] FIG. 4 is a graph illustrating vibration conditions of a vibration test applied to the final packaging structure; and

[0026] FIG. 5 is a schematic view further illustrating a drop test in accordance with the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] The present invention has particularly beneficial utility in the packaging of semiconductor wafers for transport or shipping. However, the invention is not so limited in application, and while references may be made to such semiconductor wafers, the invention may be more generally applicable to transporting or shipping articles in a variety of industrial and mechanical applications.

[0028] In a first step according to the packaging method of the present invention, shown in FIG. 1A, a lot of wafers 12, typically consisting of 25 of the wafers 12 each having integrated circuits (not shown) fabricated thereon, is initially placed in a wafer container 11 suitable for transporting or shipping the wafers 12, to define a primary packaging structure 10. The wafer container 11 may be a standard or conventional FOSB (front-opening shipping box), such as a KT-3002D FOSB or SEP FOSB MW300F, for example, available from Kakizaki Mfg. Co., Ltd. Alternatively, the wafer container 11 may be a standard or conventional FOUP (front-opening unified pod) known by those skilled in the art. The wafer container 11 is preferably capable of holding 300 mm wafers.

[0029] In a second step according to the invention, shown in FIG. 1B, the primary packaging structure 10, which includes the wafer container 11 containing the wafers 12, is placed in an anti-static bag 15, which is then vacuum-sealed according to the knowledge of those skilled in the art to define a secondary packaging structure 14. The anti-static bag 15 may be any type of anti-static bag known by those skilled in the art and suitable for the purpose, such as a taipei-pack anti-static bag, and is typically constructed of a metal foil. The anti-static bag 15 prevents electrostatic discharges (ESD) on the wafers 12.

[0030] In a third step according to the invention, shown in FIG. 1C, the secondary packaging structure 14 is fitted with a pair of resilient, upper and lower cushion sections 18 to define a tertiary packaging structure 17. Each of the cushion sections 18 is typically constructed of injection-molded plastic foam, such as expanded polypropylene (EPP), for example, according to the knowledge of those skilled in the art. As shown in FIGS. 2A-2D, each cushion section 18 includes a rectangular cushion panel 19 having parallel cushion side walls 21 and parallel cushion end walls 23 which collectively define a cushion depression 25, as shown in FIG. 2D. A pair of side extensions 22 projects from each cushion side wall 21, and a pair of end extensions 24 likewise projects from each cushion end wall 23. At least one and preferably multiple, typically four, cushion feet 20 extend from the exterior surface of the cushion panel 19, opposite the cushion depression 25. A cushion opening 20a extends through each cushion foot 20, as shown in FIGS. 2A and 2D.

[0031] The upper cushion section 18 is fitted on the secondary packaging structure 14 by inserting the cushion side walls 21 and cushion end walls 23 over the upper end of the secondary packaging structure 14. In like manner, the lower cushion section 18 is fitted on the secondary packaging structure 14 by inserting the cushion side walls 21 and cushion end walls 23 thereof over the lower end of the secondary packaging structure 14.

[0032] In a fourth step according to the invention, shown in FIG. 1D, the tertiary packaging structure 17 is placed in a TMH shipping carton 28, which is then sealed to define a tertiary or final packaging structure 27 for shipping or transport. The shipping carton 28 may be constructed of cardboard or any other suitable material. As shown in phantom in FIG. 1D, the shipping carton 28 is sized in such a manner that the planar extensions 20, the side extensions 22 and the end extensions 24 of the respective upper and lower cushion sections 18 tightly engage the interior surfaces of the shipping carton 28 to prevent or minimize movement of the tertiary packaging structure 17 in the shipping carton 28.

[0033] In accordance with the present invention, and referring to FIGS. 3 and 5, the final packaging structure 27 was subjected to a series of tests in order to verify or examine the protective capability of the packaging. Accordingly, the final packaging structure 27 was initially subjected to a series of drops onto a hard strike surface 33 from a height of typically about 150 cm., as shown in FIG. 5. The test apparatus used included a LAB AccuDrop-160 Drop tester and A&D 3525 FFT Analyze. The payload capacity was 160 lbs. (72.6 kg). Drop height range was from 11-60 inches (28-152 cm). The final packaging structure 27 was dropped onto the strike surface 33 for a total of ten drops. During the respective drops, one corner 30, three edges 31, and all six faces 29 of the shipping carton 28 each initially struck the strike surface 33. An acceleration sensor 32 (FIG. 5) was attached to the wafer container 11 to measure the acceleration responses of the wafer container 11. The drops were carried out under conditions of 24° C. to 25° C., at a relative humidity of 59%-62%. After all ten drops, no damage resulted to the wafer container 11 or wafers 12 contained therein.

[0034] Table I below presents the various g values measured for the various regions of the wafer container 11. 1 TABLE I Position Front Back Left Right Top Bottom g value 51.8 49.7 29.8 32.8 30.8 30.5

[0035] Referring next to FIG. 4, the final packaging structure 27 was further subjected to a vibration test, in which the final packaging structure 27 was vibrated along each of the x, y and z axes for an hour per axis. The vibration test apparatus used was a Ling Electronics 2016 vibrator and DACTRON-LASER shaker control system. Test conditions included a temperature of 24° C. to 25° C. and a relative humidity of 59%-62%. After the vibration test was completed, no damage to the wafer container 11 or wafers 12 was observed.

[0036] The final packaging structure 27 was further subjected to a transportation test, in which the final packaging structure 27 was transferred from Taiwan Semiconductor Manufacturing Co., Ltd. (TSMC) in Hsin-Chu, Taiwan, to the Wafertech Co. in Camus, Wash. Gross weight of the final packaging structure 27 was 10.5 kg. After transportation, the wafer container 11 and wafers 12 were examined for damage, and no damage was observed to either.

[0037] While the preferred embodiments of the invention have been described above, it will be recognized and understood that various modifications can be made in the invention and the appended claims are intended to cover all such modifications which may fall within the spirit and scope of the invention.

Claims

1. A wafer packing material for use in at least one type of front open shipping box container and preventing wafers from damage when dropped, comprising:

a first cushion section for engaging the container, at least one cushion foot having a cushion opening extending from a first surface of said first cushion section, and a depression area provided in a second surface of said first cushion section; and
a second cushion section for engaging the container, at least one cushion foot having a cushion opening extending from a first surface of said second cushion section, and a depression area provided in a second surface of said second cushion section for facing said depression area of said first cushion section when engaging the container.

2. The wafer packing material of claim 1 wherein said container comprises a front-opening shipping box.

3. The wafer packing material of claim 1 wherein said first cushion section and said second cushion section each comprises a plastic foam material.

4. The wafer packing material of claim 3 wherein said container comprises a front-opening shipping box.

5. The wafer packing material of claim 1 wherein said first cushion section comprises a first cushion panel and said at least one cushion foot of said first cushion section extends from said first cushion panel; and wherein said second cushion section comprises a second cushion panel and said at least one cushion foot of said second cushion section extends from said second cushion panel.

6. The wafer packing material of claim 5 wherein said container comprises a front-opening shipping box.

7. The wafer packing material of claim 5 wherein said first cushion section and said second cushion section each comprises a plastic foam material.

8. The wafer packing material of claim 7 wherein said container comprises a front-opening shipping box.

9. The wafer packing material of claim 5 further comprising a pair of cushion side walls and a pair of cushion end walls extending from each of said first cushion panel and said second cushion panel and at least one side extension extending from each of said pair of cushion side walls and at least one end extension extending from each of said pair of cushion end walls.

10. The wafer packing material of claim 9 wherein said container comprises a front-opening shipping box.

11. The wafer packing material of claim 9 wherein said first cushion section and said second cushion section each comprises a plastic foam material.

12. The wafer packing material of claim 11 wherein said container comprises a front-opening shipping box.

13. A shipping and transport package for substrates, comprising:

a container for containing the substrates in a primary packaging structure;
an anti-static bag containing said primary packaging structure in a secondary packaging structure;
a pair of cushion sections fitted on said secondary packaging structure in a tertiary packaging structure, said pair of cushion sections each comprising at least one foot extending from a first surface, a depression area provided in a second surface for receiving said secondary packaging structure and a cushion opening provided in said at least one foot; and
a carton containing said tertiary packaging structure in a final packaging structure.

14. The package of claim 13 wherein said container comprises a front-opening shipping box.

15. The package of claim 13 wherein said pair of cushion sections each comprises a plastic foam material.

16. The package of claim 13 wherein said pair of cushion sections each comprises a cushion panel having said first surface and said second surface and a plurality of side extensions carried by said cushion panel for engaging said carton.

17. The package of claim 16 wherein said cushion panel further comprises a pair of cushion side walls and a pair of cushion end walls extending from said cushion panel and wherein said plurality of side extensions extends from each of said pair of cushion side walls.

18. A method of forming a package for transporting substrates and testing said package for protection capability, comprising the steps of:

providing a container; an anti-static bag; a pair of cushion sections each having at least one foot extending from a first surface, a depression area provided in a second surface and a cushion opening provided in said at least one foot; and a carton;
placing the substrates in said container to define a primary packaging structure;
placing said primary packaging structure in said anti-static bag to define a secondary packaging structure;
placing said pair of cushion sections on said secondary packaging structure to define a tertiary packaging structure;
placing said tertiary packaging structure in said carton to define a final packaging structure; and
subjecting said final packaging structure to a free fall test, a vibration test and a transportation test.

19. The method of claim 18 wherein said free fall test comprises the steps of providing a strike surface and repeatedly positioning said final packaging structure about 150 cm above said strike surface and dropping said final packaging structure onto said strike surface.

20. The method of claim 18 wherein said vibration test comprises vibrating said final packaging structure along x, y and z axes for about an hour for each axis.

Patent History
Publication number: 20040098949
Type: Application
Filed: Nov 21, 2002
Publication Date: May 27, 2004
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
Inventors: Shen-Yau Huang (Hemei Jen), Ming-Chen Tai (Hsin-Chu City), Ming-Tsong Wang (Taipei), Tai-Yau Shen (Hsinchu)
Application Number: 10302284
Classifications
Current U.S. Class: Plural Covers (053/449); With Protective Media (e.g., Shock Absorbing) (053/472)
International Classification: B65B011/58; B65B023/00;