MESA SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
The invention provides a mesa semiconductor device and a method of manufacturing the same which minimize the manufacturing cost and prevents contamination and physical damage of the device. An N− type semiconductor layer is formed on a front surface of a semiconductor substrate, and a P type semiconductor layer is formed thereon. An anode electrode is further formed on the P type semiconductor layer so as to be connected to the P type semiconductor layer, and a mesa groove is formed from the front surface of the P type semiconductor layer deeper than the N− type semiconductor layer so as to surround the anode electrode. Then, a second insulation film is formed from inside the mesa groove onto the end portion of the anode electrode. The second insulation film is made of an organic insulator such as polyimide type resin or the like. The lamination body made of the semiconductor substrate and the layers laminated thereon is then diced along a scribe line.
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This application claims priority from Japanese Patent Application No. 2007-330329, the content of which is incorporated herein by reference in its entirety.
BACKGROUND OF THE INVENTION1. Field of the Invention
The invention relates to a mesa semiconductor device having a mesa groove and a method of manufacturing the same.
2. Description of the Related Art
A high power mesa diode is conventionally known as one of mesa semiconductor devices. A conventional mesa diode will be described referring to
An N− type semiconductor layer 11 is formed on a front surface of an N+ type semiconductor substrate 10. A P type semiconductor layer 12 is formed on the front surface of the N− type semiconductor layer 11, and a first insulation film 23 is formed on the P type semiconductor layer 12. An anode electrode 14 electrically connected to the P type semiconductor layer 12 is further formed. A cathode electrode 15 is formed on the back surface of the semiconductor substrate 10.
A mesa groove 26 is formed from the front surface of the P type semiconductor layer 12 to the N+ type semiconductor substrate 10. The mesa groove 26 is formed deeper than the N− type semiconductor layer 11, of which the bottom is located in the N+ type semiconductor substrate 10. A second insulation film 47 fills the mesa groove 26 so as to cover the sidewall thereof including the PN junction JC of the N− type semiconductor layer 11 and the P type semiconductor layer 12 which are in contact. The mesa diode is surrounded by this mesa groove 26, forming a mesa structure. The scribe line DL of this mesa diode surrounds the mesa groove 26 on its outside.
A mesa semiconductor device is described in Japanese Patent Application Publication No. 2003-347306, for example.
In the conventional example described above, however, since the anode electrode 14 is exposed, water or the like enters the mesa diode from a gap between the anode electrode 14 and the first insulation film 23 to contaminate the mesa diode. Furthermore, the mesa diode is easily damaged physically.
For solving this problem, it is conceivable that a passivation film is further formed from the mesa groove 26 onto the end portion of the anode electrode 14 in addition to the second insulation film 47. In this case, however, the manufacturing process becomes complex by adding a process of forming the passivation film, and the manufacturing cost increases.
SUMMARY OF THE INVENTIONThe invention provides a mesa semiconductor device that includes a semiconductor substrate having a first semiconductor layer of a first general conductive type and a second semiconductor layer of a second general conductive type formed on the front surface of the first semiconductor layer so as to have a PN junction between the first and second semiconductor layers, a first insulation film covering the front surface of the second semiconductor layer and having an opening, an electrode formed on the front surface of the second semiconductor layer so as to be in contact with the second semiconductor layer through the opening of the first insulation film, a mesa groove formed in the semiconductor substrate from the front surface of the second semiconductor layer to define a mesa on top of which the electrode is disposed, and a second insulation film filling the mesa groove and extending onto the front surface of the second semiconductor layer so as to cover the first insulation film and the end portion of the electrode.
The invention also provides a method of manufacturing a mesa semiconductor device. The method includes providing a semiconductor substrate having a first semiconductor layer of a first general conductive type and a second semiconductor layer of a second general conductive type formed on the front surface of the first semiconductor layer so as to have a PN junction between the first and second semiconductor layers, forming a first insulation film on the front surface of the second semiconductor layer so as to have an opening exposing the front surface of the second semiconductor layer, forming an electrode on the exposed front surface of the second semiconductor layer through the opening of the first insulation film, forming a mesa groove in the semiconductor substrate from the front surface of the second semiconductor layer to define a mesa on top of which the electrode is disposed, and forming a second insulation film so as to fill the mesa groove and extend onto the front surface of the second semiconductor layer to cover the first insulation film and the end portion of the electrode.
A mesa semiconductor device of an embodiment of this invention and a method of manufacturing that device will be described using a mesa diode as an example.
The method of manufacturing the mesa diode described below is conducted to a semiconductor wafer where a plurality of mesa diodes is to be disposed in a matrix as shown in
As shown in
It is noted that conductivity types such as N+, N and N− belong in one general conductivity type, and conductivity types such as P+, P and P− belong in another general conductivity type.
Then, as shown in
Then, an anode electrode 14 connected to the P type semiconductor layer 12 through the first opening 23A of the first insulation film 23 is formed. The anode electrode 14 is made of a conductive material such as aluminum and formed by a sputtering method, a vapor deposition method or the like. A cathode electrode 15 made of a conductive material such as aluminum is formed on the back surface of the semiconductor substrate 10 by the same method as the method of forming the anode electrode 14.
Then, as shown in
The mesa diode having such a mesa groove 26 has a high breakdown voltage when a reverse bias is applied, i.e., when a high voltage is applied from the cathode electrode 15 to the anode electrode 14 and a reverse bias is applied to the PN junction JC.
Then, the resist layer PR is removed as shown in
The second insulation film 27 is made of an organic insulator having, during its application to the substrate 10, a viscosity such that it fills the second opening 23B and the mesa groove 26 and continuously extends onto the anode electrode 14 therefrom. For example, a viscosity of 100 to 150 Pa·s during the application is good enough to achieve an appropriate coverage. After this application, the second insulation film 27 is cured, i.e., becomes more rigid. The second insulation film 27 contains polyimide type resin or epoxy type resin, for example. Alternatively, instead of the organic insulator described above, glass paste made by mixing lead or zinc type glass powder and resin may be used as the second insulation film 27 as long as it has the same viscosity as described above. The second insulation film 27 is formed by a screen printing method, a dispensing method or a spin coating method, for example, and patterned by a photolithography process or the like according to needs.
Then, as shown in
Since the mesa diode completed in this manner is covered by the second insulation film 27 from inside the mesa groove 26 onto the end portion of the anode electrode 14 continuously, contamination of the inside of the mesa diode due to water entering it or the like and physical damage of the mesa diode are prevented without an additional passivation film. This eliminates a process of forming the additional passivation film, thereby minimizing the manufacturing cost.
Furthermore, since the second insulation film 27 fills the mesa groove 26 deeper than the N− type semiconductor layer 11, reaching the inside of the semiconductor substrate 10, it functions as a guard ring for preventing water entering the active region of the mesa diode.
The invention is not limited to the embodiment described above and modifications are possible within the scope of the invention. For example, in the above embodiment, the first insulation film 23 is not necessarily formed in the region on the outside of the mesa groove 26. In this case, in the region on the outside of the mesa groove 26, the second insulation film 27 is formed on the front surface of the P type semiconductor layer 12.
Furthermore, the N+ type semiconductor substrate 10, the N− type semiconductor layer 11 and the P type semiconductor layer 12 in the embodiment described above may be of opposite conductive types, respectively. Furthermore, the P type semiconductor layer may be formed directly on the N type semiconductor substrate. Furthermore, although the description is given using the mesa diode as an example in the embodiment described above, the invention may be applied to other mesa semiconductor devices. For example, the invention may also be applied to a mesa bipolar transistor, a mesa MOSFET, a mesa IGBT, a mesa thyristor or the like. In the case of the mesa bipolar transistor, for example, an NPN type bipolar transistor structure is obtained by further providing an N type semiconductor layer on the front surface of the P type semiconductor layer 12. Thus, with this structure, the second insulation film extending from the mesa groove covers a part of the electrode, thereby preventing contamination of the mesa semiconductor device due to water entering it or the like and physical damage of the mesa semiconductor device without an additional passivation film. Furthermore, this eliminates a process of forming the additional passivation film, thereby reducing the manufacturing cost.
Claims
1. A mesa semiconductor device comprising:
- a semiconductor substrate comprising a first semiconductor layer of a first general conductive type and a second semiconductor layer of a second general conductive type formed on a front surface of the first semiconductor layer so as to have a PN junction between the first and second semiconductor layers;
- a first insulation film covering a front surface of the second semiconductor layer and having an opening;
- an electrode formed on the front surface of the second semiconductor layer so as to be in contact with the second semiconductor layer through the opening of the first insulation film;
- a mesa groove formed in the semiconductor substrate from the front surface of the second semiconductor layer to define a mesa on top of which the electrode is disposed; and
- a second insulation film filling the mesa groove and extending onto the front surface of the second semiconductor layer so as to cover the first insulation film and an end portion of the electrode.
2. The mesa semiconductor device of claim 1, wherein the second insulation film comprises an organic insulator.
3. The mesa semiconductor device of claim 2, wherein the organic insulator comprises a polyimide or an epoxy resin.
4. The mesa semiconductor device of claim 1, wherein the mesa groove extends beyond the PN junction to reach the first semiconductor layer.
5. The mesa semiconductor device of claim 1, wherein the first semiconductor layer comprises a first layer and a second layer formed on a front surface of the first layer and having a lower concentration than the first layer, and the second layer is in contact with the second semiconductor layer.
6. The mesa semiconductor device of claim 5, wherein the mesa groove extends beyond the PN junction to reach the first layer of the first semiconductor layer.
7. A method of manufacturing a mesa semiconductor device, comprising:
- providing a semiconductor substrate comprising a first semiconductor layer of a first general conductive type and a second semiconductor layer of a second general conductive type formed on a front surface of the first semiconductor layer so as to have a PN junction between the first and second semiconductor layers; forming a first insulation film on a front surface of the second semiconductor layer so as to have an opening exposing the front surface of the second semiconductor layer; forming an electrode on the exposed front surface of the second semiconductor layer through the opening of the first insulation film; forming a mesa groove in the semiconductor substrate from the front surface of the second semiconductor layer to define a mesa on top of which the electrode is disposed; and forming a second insulation film so as to fill the mesa groove and extend onto the front surface of the second semiconductor layer to cover the first insulation film and an end portion of the electrode.
8. The method of claim 7, wherein the second insulation film comprises an organic insulator.
9. The method of claim 8, wherein the organic insulator comprises a polyimide or an epoxy resin.
10. The method of claim 7, wherein the mesa groove extends beyond the PN junction to reach the first semiconductor layer.
11. The method of claim 7, wherein the first semiconductor layer comprises a first layer and a second layer formed on a front surface of the first layer and having a lower concentration than the first layer, and the second layer is in contact with the second semiconductor layer.
12. The method of claim 11, wherein the mesa groove extends beyond the PN junction to reach the first layer of the first semiconductor layer.
Type: Application
Filed: Dec 18, 2008
Publication Date: Jun 25, 2009
Patent Grant number: 8362595
Applicants: SANYO Electric Co., Ltd. (Moriguchi-Shi), SANYO Semiconductor Co., Ltd. (Ora-Gun), SANYO Semiconductor Manufacturing Co., Ltd. (Ojiya-shi)
Inventors: Akira Suzuki (Ota-shi), Katsuyuki Seki (Ojiya-shi), Keita Odajima (Fukaya-shi)
Application Number: 12/338,686
International Classification: H01L 29/06 (20060101); H01L 21/441 (20060101);