INTEGRATED TRENCH MOSFET AND JUNCTION BARRIER SCHOTTKY RECTIFIER WITH TRENCH CONTACT STRUCTURES
A trench MOSFET in parallel with trench junction barrier Schottky rectifier with trench contact structures is formed in single chip. The present invention solves the drawback brought by some prior arts, for example, the large area occupied by planar contact structure and high gate-source capacitance. As the electronic devices become more miniaturized, the trench contact structures of this invention are able to be shrunk to achieve low specific on-resistance of Trench MOSFET, and low Vf and reverse leakage current of the Schottky Rectifier.
Latest FORCE MOS TECHNOLOGY CO. LTD. Patents:
- TRENCH-GATE FIELD EFFECT TRANSISTOR
- Metal-oxide semiconductor module and light-emitting diode display device including the same
- Metal-oxide-semiconductor device
- METAL-OXIDE SEMICONDUCTOR MODULE AND LIGHT-EMITTING DIODE DISPLAY DEVICE INCLUDING THE SAME
- Shielded gate MOSFET and fabricating method thereof
1. Field of the Invention
This invention relates generally to the cell structure, device configuration and fabrication process of power semiconductor devices. More particularly, this invention relates to an improved cell configuration and processes to manufacture trench MOSFET device with junction barrier Schottky rectifier in the same cell so that integrated cells with spacing savings and lower capacitance and higher performance are achieved.
2. The Prior Arts
Normally for high efficiency DC/DC application, a Schottky rectifier is externally added in parallel with a MOSFET device.
In U.S. Pat. No. 6,351,018, a trenched MOSFET device integrated with trench Schottky diodes with common trench gates is disclosed as that shown in
In U.S. Pat. No. 6,433,396, a trench MOSFET device with a planar Schottky diode is disclosed as that shown in
In U.S. Pat. No. 6,998,678 discloses another trench semiconductor arrangement as shown in
Therefore, there is still a need in the art of the semiconductor device fabrication, particularly for design and fabrication of the trenched power device, to provide a novel cell structure, device configuration and fabrication process that would resolve these difficulties and design limitations. Specifically, it is desirable to provide more integrated trench MOSFET with embedded Schottky diode that can accomplish space saving, process simplification and capacitance reduction such that the above discussed technical limitations can be resolved.
SUMMARY OF THE INVENTIONIt is therefore an aspect of the present invention to provide improved semiconductor power device configuration and manufacture processes for providing semiconductor power devices with trench junction barrier Schottky rectifier in single chip with trench Schottky contact instead of planar contact as shown in above prior arts so that space occupied which is one of the major technical limitations discussed above can be reduced.
Another aspect of the present invention is to provide improved semiconductor power device configuration and manufacture processes for providing semiconductor power devices with trench junction barrier Schottky rectifier in single chip wherein no additional mask is required to integrated the trench junction barrier Schottky rectifier with trench MOSFET compared with the planar Schottky contact and that leads to a cost-down of the production.
Another aspect of the present invention is to provide improved semiconductor power device configuration and manufacture processes for providing semiconductor power devices with trench junction barrier Schottky rectifier in single chip so that the devices with trench contact are able to be shrunk to achieve low specific on-resistance for trench MOSFET, and low Vf and reverse leakage current for trench junction barrier Schottky rectifier.
Briefly, in a preferred embodiment, the present invention discloses a semiconductor power device comprising a trenched MOSFET and a trenched junction barrier Schottky rectifier in single chip. Wherein the trench MOSFET device comprises a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The semiconductor power device further includes an insulation layer covering the trenched semiconductor power device with a source-body contact trench opened through and extending into the source and body regions and filled with Tungsten plugs therein. Said Tungsten plugs contact all said source region with a metal of Aluminum alloy or Copper serving as source metal by a layer of Ti, or Ti/TiN deposited along top surface of the insulator layer. A region underneath said contact trench is more heavily doped than the body region to reduce the resistance between said trench contact metal plug and said body region. The trenched junction barrier Schottky rectifier further includes junction barrier Schottky contact trench and more heavily doped region at the bottom of each contact filled with a layer of Ti silicide/TiN or Co silicide/TiN along each trench contact sidewall and Tungsten plug connected to said source metal serving as anode of said Schottky rectifier; other contact trenches formed in the P-body adjacent to said junction barrier Schottky contact trench for said P-body contact to said source metal.
In an exemplary embodiment, the structure disclosed is the same as the structure mentioned in the first embodiment except that there is no heavily doped region underneath junction barrier Schottky trench contact.
In an exemplary embodiment, the structure disclosed is the same as the structure mentioned in the first embodiment except that the trench MOSFET has double gate oxides with thick oxide on trench bottom to reduce the gate charge for power saving.
In an exemplary embodiment, the structure disclosed is the same as the structure mentioned in the second embodiment except that the trench MOSFET has double gate oxides to reduce the gate charge for power saving.
In an exemplary embodiment, the structure disclosed is the same as the structure mentioned in the first embodiment except that there is another N2 doped epitaxial layer above the N1 drift region according to the doping concentration relationship N2<N1 and said junction barrier Schottky trench contact is formed in the N2 doped epitaxial layer to optimize a trade-off between Vf and Ir.
In an exemplary embodiment, the structure disclosed is the same as the structure mentioned in the fifths embodiment except that there is no heavily doped region underneath junction barrier Schottky trench contact.
These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiment, which is illustrated in the various drawing figures.
Please refer to
For the purpose of further reduction of the gate charge for power saving, a double gate oxide structure is used, as shown in
In
In
Although the present invention has been described in terms of the presently preferred embodiments, it is to be understood that such disclosure is not to be interpreted as limiting. Various alternations and modifications will no doubt become apparent to those skilled in the art after reading the above disclosure. Accordingly, it is intended that the appended claims be interpreted as covering all alternations and modifications as fall within the true spirit and scope of the invention.
Claims
1. An Integrated Circuit having a plurality of trench MOSFET and a plurality of Junction Barrier Schottky rectifier comprising:
- a substrate of the first conductivity type;
- an epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower doping than said substrate;
- a trenched MOSFET comprising a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate, wherein said trench MOSFET further comprising: an insulation layer covering said integrity circuit with a source-body contact trench opened there through said source and extended into body regions and filled with contact metal plug therein, wherein a gate oxide lining said trench gate and a doped polysilicon within said trenches and overlying the gate oxide. and
- a junction barrier Schottky rectifier extending into said epitaxial layer and having a barrier layer lined in trench contact filled with contact metal plug and between a pair of adjacent P-bodies.
2. The epitaxial layer is single or double epitaxial layers with doping concentration of top epitaxial layer less than bottom epitaxial layer.
3. The gate oxide in claim 1 is single gate oxide or double gate oxides with thicker gate oxide on trench bottom.
4. The barrier layer lines said contact trench in claim 1 is Ti/TiN or Co/TiN.
5. The contact metal plug overlying the barrier layers in claim 4 is Tungsten.
6. The Schottky barrier in claim 1 comprises TiSi2 (Ti Silicide) or CoSi2 (Co Silicide).
7. The Schottky barrier in claim 6 lines along contact trench sidewall and bottom, or only sidewall.
8. The source/anode metal is Aluminum alloys or Copper on top of Ti or Ti/TiN layer.
Type: Application
Filed: Jun 23, 2008
Publication Date: Dec 24, 2009
Applicant: FORCE MOS TECHNOLOGY CO. LTD. (HsinChu City)
Inventor: Fu-Yuan Hsieh (Hsingchu)
Application Number: 12/213,629
International Classification: H01L 27/06 (20060101);