LOWER CHAMBER HEATERS FOR IMPROVED ETCH PROCESSES
A method of improving a plasma etch chamber by installing heaters on outer surfaces. A method of improving STI etch. A method of improving STI etch in a Hitachi M700 series etcher.
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This application claims the benefit of priority under U.S.C. §119(e) of U.S. Provisional Application 61/249,387 (Texas Instruments docket number TI-68259, filed Oct. 7, 2009.
FIELD OF THE INVENTIONThis invention relates generally to an etching process chamber and more particularly to a temperature control assembly for use in etching processes.
BACKGROUND OF THE INVENTIONPlasma etching of semiconductor materials is typically performed in a plasma etching chamber that has gas inlet ports, gas exhaust ports, a mechanism for transporting wafers into and out of the etching chamber, and a pedestal on which the wafer rests while being etched. Typically to accelerate the etching rate, portions of the etching chamber may be heated. Gaseous reactants typically contain carbon. Products of the etching reaction that are in the plasma may further react to form a polymeric material that may deposit on the sidewalls of the semiconductor geometries being etched and may also deposit on interior surfaces of the etching chamber. This polymeric deposition maybe used to control the sidewall profile geometries being etched. Etch product deposition on the walls of the chamber may build up and start delaminating causing particulates. These particulates may deposit on the wafer during etch causing blocked etch defects and may deposit on the wafer post etch causing defects that later result in circuit failure during electrical test. Running additional chamber cleaning cycles and opening the chamber to perform preventative maintenance (PM) to remove the deposition reduces machine availability and increases manufacturing cost. Particle defects reduce yield also increasing manufacturing cost.
Additionally, build up of deposition within the etch chamber may change the performance of the etching as more wafers are etched resulting in more variability in the critical dimension, CD, or sidewall profile of the geometry being formed.
SUMMARY OF THE INVENTIONThe following presents a simplified summary in order to provide a basic understanding of one or more aspects of the invention. This summary is not an extensive overview of the invention, and is neither intended to identify key or critical elements of the invention, nor to delineate the scope thereof. Rather, the primary purpose of the summary is to present some concepts of the invention in a simplified form as a prelude to a more detailed description that is presented later.
Heating devices are added to the cooler portions of a Hitachi plasma etching chamber, to the gate valve, and to the wafer transport tunnel.
The present invention is described with reference to the attached figures, wherein like reference numerals are used throughout the figures to designate similar or equivalent elements. The figures are not drawn to scale and they are provided merely to illustrate the invention. Several aspects of the invention are described below with reference to example applications for illustration. It should be understood that numerous specific details, relationships, and methods are set forth to provide an understanding of the invention. One skilled in the relevant art, however, will readily recognize that the invention can be practiced without one or more of the specific details or with other methods. In other instances, well-known structures or operations are not shown in detail to avoid obscuring the invention. The present invention is not limited by the illustrated ordering of acts or events, as some acts may occur in different orders and/or concurrently with other acts or events. Furthermore, not all illustrated acts or events are required to implement a methodology in accordance with the present invention.
Polymer or process deposition occurs in a number of plasma etches performed in Hitachi etchers such as the shallow trench isolation (STI) etch and aluminum metal etch. This deposition may occur on the inside walls of the etch chamber, especially in the cooler regions. This deposition may build up and delaminate depositing particulates onto the wafer during or post etch which result in defects that may limit yield. In addition, build up of the deposition on the inside walls of the chamber may change the etch performance resulting in increased variability in the critical dimension, CD, of the geometry being formed.
Although STI etch in a Hitachi M-712 is used as an embodiment to illustrate the instant invention, any etch process that deposits polymer or process films on the inner walls of a Hitachi etch chamber may also be used.
A cross sectional diagram of a Hitachi M-712 STI etch chamber is shown in
As shown in
In
As mention before, the deposition buildup in the chamber may change the performance of the etch over time as more and more wafers are processed.
Particles per wafer vs time between wet cleans is shown in
The STI etch may consist of a series of etching steps to etch through a bottom antireflective coating (BARC), 5008, a silicon nitride layer, 5008, a pad oxide layer, 5004, and silicon substrate, 5002. As shown in
While the STI etch in a Hitachi M-712 is used to illustrate an embodiment of the instant invention, other etching chambers that experience deposition on chamber inside walls during etch such as aluminum metal etch may also benefit.
While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only and not limitation. Numerous changes to the disclosed embodiments can be made in accordance with the disclosure herein without departing from the spirit or scope of the invention. Thus, the breadth and scope of the present invention should not be limited by any of the above described embodiments. Rather, the scope of the invention should be defined in accordance with the following claims and their equivalents.
Claims
1. A plasma etching chamber, comprising:
- heaters coupled to a lower portion of said plasma etching chamber; and
- heaters coupled to a wafer tunnel of said plasma etching chamber.
2. The plasma etching chamber of claim 1 where said heaters are blanket resistance heaters.
3. The plasma etching chamber of claim 2 where said blanket resistance heaters are manufactured by TGM company.
4. The plasma etching chamber of claim 1 where said plasma etching chamber is a Hitachi M700 series etch chamber.
5. The plasma etching chamber of claim 1 where said plasma etching chamber is a Hitachi aluminum metal etching chamber.
6. A method for improving the performance of a plasma etch, comprising:
- installing heaters on a lower outside surface of a plasma etching chamber; and
- heating said lower outside surface of said plasma etching chamber to a temperature of at least 35 C.
7. The method of claim 6 where said plasma etch is an STI etch and where said plasma etching chamber is a Hitachi M700 series etch chamber.
8. The method of claim 6 where said heaters are blanket resistance heaters.
9. The method of claim 8 where said blanket resistance heaters are manufactured by TGM company.
10. The method of claim 6 where said temperature is about 65 C.
11. The method of claim 7 where said lower outside surface includes a lower outside surface of said etching chamber and an outside surface of a wafer tunnel.
12. The method of claim 6 where said plasma etch is an aluminum etch in a Hitachi etching chamber.
13. A method for improving an STI etch, comprising:
- installing heaters on an outside surface of an STI etching chamber; and
- heating said outside surface of said STI etching chamber to a temperature of at least 35 C.
14. The method of claim 13 where said STI etching chamber is a Hitachi M700 series etch chamber.
15. The method of claim 13 where said heaters are blanket resistance heaters.
16. The method of claim 15 where said blanket resistance heaters are manufactured by TGM company.
17. The method of claim 13 where said temperature is about 65 C.
18. The method of claim 13 where said outside surface includes an outside surface of said etching chamber and an outside surface of a wafer tunnel.
19. The method of claim 14 where said outside surface includes a lower outside surface of said etching chamber and an outside surface of a wafer tunnel.
Type: Application
Filed: Oct 7, 2010
Publication Date: Apr 7, 2011
Applicant: Texas Instruments Incorporated (Dallas, TX)
Inventors: John Christopher Shriner (Allen, TX), Kyran Morris (Dallas, TX), Esequiel Torres (Garland, TX)
Application Number: 12/900,355
International Classification: C23F 1/08 (20060101); C23F 1/00 (20060101);