Abstract: A plasma processing apparatus includes a chamber and a substrate support provided in the chamber. A power supply unit is connected to a lower electrode of the substrate support. The power supply unit applies a first DC voltage to the lower electrode during generation of plasma from an etching gas in the chamber. The first DC voltage is a positive DC voltage. The power supply unit applies a second DC voltage to the lower electrode during the generation of plasma from the etching gas in the chamber, to etch the substrate placed on the substrate support. The second DC voltage is a negative DC voltage. The DC voltage output by the power supply unit is continuously switched from the first DC voltage to the second DC voltage.

Abstract: An atomic layer etching method using a ligand exchange reaction may include a substrate providing step of putting a substrate with a thin film formed thereon into a reaction chamber, a halogenated thin film forming step of forming a halogenated thin film on a surface of the thin film by infusing a halogenated gas into the reaction chamber, and an etching step of etching the halogenated thin film by infusing a ligand without a metal or metal precursor into the reaction chamber with the substrate with the halogenated thin film.

Abstract: A plasma processing method includes generating a plasma within a processing chamber using source power to ignite a glow phase of the plasma, generating low-energy ions at a substrate supported by a substrate holder in the processing chamber from the plasma using lower-frequency radio frequency bias power applied during the glow phase, and generating high-energy ions at the substrate using higher-frequency radio frequency bias power applied during an afterglow phase of the plasma. The frequency of the higher-frequency radio frequency bias power is greater than the frequency of the lower-frequency radio frequency bias power.

Abstract: Methods and systems for uniformly cooling a dome within a plasma treatment system are disclosed. The methods and systems utilize a diffuser including a perforated plate and a cone. The perforated plate includes a center portion and multiple arrays of holes with each array being located circumferentially at a different distance from the center. The cone extends away from the center. The diffuser spreads cooling gas more uniformly across the surface of the dome.

Abstract: Exemplary methods of semiconductor processing may include treating a surface of a substrate with a hydrogen-containing precursor. The substrate may be disposed within a processing region of a semiconductor processing chamber. The methods may include contacting the substrate with a tungsten-containing precursor. The methods may include forming an initiation layer comprising tungsten on the substrate. The methods may include treating the initiation layer with a hydrogen-containing precursor. The methods may include forming a plasma of the tungsten-containing precursor and a carbon-containing precursor. Hydrogen in the plasma may be limited to hydrogen included in the carbon-containing precursor. The methods may include forming a tungsten-containing hardmask layer on the initiation layer.

Abstract: Systems and methods for reverse pulsing are described. One of the systems includes a controller, first and second source radio frequency (RF) generators, and first and second bias RF generators. The controller controls the first source RF generator to generate a first source pulsed signal, and controls the second source RF generator to generate a second source pulsed signal. The system includes a first match circuit that receives the first and second source pulsed signals and combines the first and second source pulsed signals. The controller controls the first bias RF generator to generate a first bias pulsed signal, and controls the second bias RF generator to generate a second bias pulsed signal. The system includes a second match circuit that receives the first and second bias pulsed signals and combines the first and second bias pulsed signals into a combined bias signal.

Abstract: Provided is a transparent substrate, a plurality of protrusions protruding from the first surface of the transparent substrate; and an antireflection film laminated on the second surface opposite to the first surface of the transparent substrate, wherein the plurality of protrusions are periodically arranged at a pitch shorter than a wavelength of light in a use band, each of the protrusions extends in in a first direction and includes a reflective layer, a dielectric layer, and an absorption layer in order from the first direction, the antireflection film has high refractive index layers and low refractive index layers that are alternately laminated, and the antireflection film is an ion beam assisted vapor deposition film or an ion beam sputtering film.

Abstract: Provided is a SiC chemical vapor deposition apparatus including: a furnace body inside of which a growth space is formed; and a placement table which is positioned in the growth space and has a placement surface on which a SiC wafer is placed, in which the furnace body comprises a first hole which is positioned on an upper portion which faces the placement surface and through which a raw material gas is introduced into the growth space, a second hole which is positioned on a side wall of the furnace body and through which a purge gas flows into the growth space, a third hole which is positioned on the side wall of the furnace body at a lower position than the second hole and discharges the gases in the growth space, and a protrusion which is protrudes towards the growth space from a lower end of the second hole to adjust a flow of the raw material gas.

Abstract: Disclosure is a method for manufacturing a semiconductor device. The method includes forming a source electrode and a drain electrode on a nitride semiconductor layer formed on a main surface of a SiC substrate, forming a gate electrode having a laminated structure including a Ni layer and an Au layer on the Ni layer between the source electrode and the drain electrode on the nitride semiconductor layer and forming a first metal film having the same laminated structure as the gate electrode in a region adjacent to the source electrode with an interval therebetween, forming a second metal film to contact with the source electrode and the first metal film, forming a hole being continuous with the first metal film from a back surface of the SiC substrate, and forming a metal via being continuous with the first metal film from the back surface in the hole.

Abstract: A method of fabricating a semiconductor structure includes forming a GaN-based semiconductor layer on a substrate, forming a silicon-containing insulating layer on the GaN-based semiconductor layer, forming a recess in the silicon-containing insulating layer in a first etching step, wherein the first etching step is performed by using a fluorine-containing etchant and applying a first bias power, and enlarging the recess to extend into the GaN-based semiconductor layer in a second etching step, wherein the second etching step is performed by using the same fluorine-containing etchant as the first etching step and applying a second bias power that is greater than the first bias power. In addition, a method of fabricating a high electron mobility transistor is provided.

Abstract: A system and method to modify surface tension at atmosphere across a hydrophobic, anti-fouling, and oleophobic coated substrate. The substrate has a hydrophobic surface defined by a surface friction. The system modifies the surface tension, or smoothness, across the hydrophobic surface. The modification in surface tension is accomplished by generating power through an ion source to create an ion cloud. The ion cloud is generated in proximity to the substrate. The ions interact with the hydrophobic surface to create a modification of surface tension. A gas carrier device introduces an inert carrier gas through the ion cloud to increase density of the ions, which in turn increases surface friction. The system is variable, selectively increasing and decreasing surface tension by: varying the duration that the hydrophobic surface is exposed to the ion cloud; varying power applied to ion source; and varying distance between the ion cloud and the hydrophobic surface.

Abstract: A substrate support is provided in a chamber of a plasma processing apparatus according to an exemplary embodiment. The substrate support has a lower electrode and an electrostatic chuck. A matching circuit is connected between a power source and the lower electrode. A first electrical path connects the matching circuit and the lower electrode to each other. A second electrical path different from the lower electrode is provided to supply electric power from the matching circuit to a focus ring. A sheath adjuster is configured to adjust a position of an upper end of a sheath on/above the focus ring. A variable impedance circuit is provided on the first or second electrical path.

Abstract: An etching method includes preparing a substrate having an etching target portion formed on a silicon-containing portion, plasma-etching the etching target portion of the substrate into a predetermined pattern by plasma of a processing gas containing a CF-based gas, and removing a damage layer formed due to implantation of C and F into the silicon-containing portion exposed at a bottom of the predetermined pattern by the plasma etching. The removing of the damage layer includes forming an oxide of the damage layer by supplying oxygen-containing radicals and fluorine-containing radicals and oxidizing the damage layer with the oxygen-containing radicals while etching the damage layer with the fluorine-containing radicals, and removing the oxide by a radical treatment or a chemical treatment with a gas.

Abstract: In order to implement a plasma etching method for improving a tapered shape, a plasma processing apparatus includes: a processing chamber in which a sample is subjected to plasma processing; a first radio frequency power source that supplies radio frequency power for generating a plasma; a sample stage on which the sample is placed; a second radio frequency power source that supplies radio frequency power to the sample stage; and a control unit that controls the first radio frequency power source and the second radio frequency power source so as to etch a stacked film formed by alternately stacking a silicon oxide film and a polycrystalline silicon, or a stacked film formed by alternately stacking a silicon oxide film and a silicon nitride film, by using a plasma generated by a mixed gas of a hydrogen bromide gas, a hydrofluorocarbon gas and a nitrogen element-containing gas.

Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a photoresist layer over a substrate; performing an infiltration process to introduce a metallic compound into the photoresist to enhance a sensitivity of the photoresist layer to an extreme ultraviolet (EUV) radiation; performing an exposing process to the photoresist layer using the EUV radiation; and performing a developing process to the photoresist layer to form a patterned resist layer.

Abstract: A semiconductor processing apparatus is disclosed. The apparatus may include, a reaction chamber and a susceptor dispose in the reaction chamber configured for supporting a substrate thereon, the susceptor comprising a plurality of through-holes in an axial direction of the susceptor. The apparatus may also include, a plurality of lift pins, each of the lift pins being disposed within a respective through-hole, and at least one gas transmitting channel comprising one or more gas channel outlets, the one or more gas channel outlets being disposed proximate to the through-holes. Methods for processing a substrate within a reaction chamber are also disclosed.

Abstract: In one example, a method of processing a substrate includes loading the substrate in a process chamber, where the substrate includes a metal oxide containing film to be etched. The method further includes performing of an atomic layer etching including a plurality of cyclic processes, each of the plurality of cyclic processes including exposing the metal oxide containing film to a first gas stream including boron trichloride (BCl3), and exposing the metal oxide containing film to a second gas stream including borane, amine, alcohol, carboxylic acid, carboxamide, or beta-diketone reagent.

Abstract: A method includes: forming an n-type diffusion layer as a second-conductivity-type semiconductor layer on a first-conductivity-type crystalline semiconductor substrate; and forming an anti-reflective film by a CVD method to extend from a light receiving surface side to a side surface of the semiconductor substrate, by placing the semiconductor substrate on a mount in a film forming chamber with a back surface brought into contact with the mount, evacuating and decompressing the film forming chamber, and supplying source gas into the film forming chamber. In the film formation, a tray has a through hole, and the anti-reflective film is formed on the surface of the semiconductor substrate excluding the contact surface by bringing the semiconductor substrate into close contact with the contact surface by causing the through hole to have a negative pressure relative to the pressure in the film forming chamber by the evacuation.

Abstract: A method for forming an etching mask includes forming a mask layer containing an organic material on a layer to be patterned using the etching mask in a subsequent etching process, processing the mask layer to form a pattern including an opening, forming a filling layer in the opening, impregnating the mask layer with a metal material, and removing the filling layer. The organic material in the mask layer includes reaction sites that react with the metal material, and the filling layer has fewer the reaction sites per the unit volume than the mask layer.

Abstract: A dry etching gas composition is used which contains a saturated or unsaturated hydrofluorocarbon compound (excluding 1,2,2,3-pentafluorocyclobutane and 1,1,2,2-tetrafluorocyclobutane) represented by a general formula (1): CxHyFz (where x, y, and z are integers that satisfy 2?x?4, y+z?2x+2, and 0.5<z/y<2). Use of the etching gas composition containing the above-described hydrofluorocarbon makes it possible to selectively etch a nitrogen-containing silicon-based film (b1) with respect to a silicon oxide film, a non-silicon-based mask material, or a polycrystalline silicon film.

Abstract: A pulsed radio frequency inductive plasma source and method are provided. The source may generate plasma at gas pressures from 1 torr to 2000 torr. By utilizing high power RF generation from fast solid state switches such as Insulated-Gate Bipolar Transistor (IGBT) combined with the resonance circuit, large inductive voltages can be applied to RF antennas to allow rapid gas breakdown from 1-100 ?s. After initial breakdown, the same set of switches or an additional rf pulsed power systems are utilized to deliver large amount of rf power, between 10 kW to 10 MW, to the plasmas during the pulse duration of 10 ?s-10 ms. In addition, several methods and apparatus for controlling the pulse power delivery, timing gas and materials supply, constructing reactor and substrate structure, and operating pumping system and plasma activated reactive materials delivery system will be disclosed.

Abstract: In one example, a method of processing a substrate includes receiving a substrate in a processing chamber, the substrate having an etch mask positioned over an underlying layer to be etched, where the underlying layer is a silicon-containing layer. The method includes executing a first etch process that includes forming a first plasma from a first process gas that includes hydrogen bromide or chlorine and etching the underlying layer using products of the first plasma. The method includes executing a second etch process that includes forming a second plasma from a second process gas that includes fluorine and etching the substrate using products from the second plasma. The method may include alternating between the first etch process and the second etch process.

Abstract: A method of forming a semiconductor device includes the following steps. First of all, a substrate is provided, and a dielectric layer is formed on the substrate. Then, at least one trench is formed in the dielectric layer, to partially expose a top surface of the substrate. The trench includes a discontinuous sidewall having a turning portion. Next, a first deposition process is performed, to deposit a first semiconductor layer to fill up the trench and to further cover on the top surface of the dielectric layer. Following these, the first semiconductor layer is laterally etched, to partially remove the first semiconductor layer till exposing the turning portion of the trench. Finally, a second deposition is performed, to deposit a second semiconductor layer to fill up the trench.

Abstract: An electrostatic chuck includes a chuck base having a first hole, an upper plate provided on the chuck base, the upper plate having a second hole aligned with the first hole, and an adhesive layer attaching the upper plate to the chuck base, the adhesive layer having a thickness that is less than a diameter of the first hole and equal to a diameter of the second hole.

Abstract: A cleaning method for dry cleaning a susceptor disposed in a process chamber of a film deposition apparatus is provided. In the method, a protective member is placed on a substrate receiving region provided in the susceptor. A cleaning gas is supplied to the susceptor having the protective member placed on the substrate receiving region, thereby removing a film deposited on a surface of the susceptor by etching.

Abstract: A plasma processing method, including: a trenched substrate preparation process of preparing a trenched substrate having trenches having a bottom exposing an oxide film; and an oxide film removal process of exposing the trenched substrate to a plasma, to remove the oxide film. The oxide film removal process includes a plurality of cycles, each cycle including: an oxide film etching step of etching the oxide film; and a cleaning step of removing an attached matter on inner walls of the trenches, after the oxide film etching step.

Abstract: A plasma etching method for plasma-etching an object including an etching target film and a patterned mask. The plasma etching method includes a first step of plasma-etching the etching target film using the mask, and a second step of depositing a silicon-containing film using plasma of a silicon-containing gas on at least a part of a side wall of the etching target film etched by the first step.

Abstract: A process of realizing a silicon micropattern having a large aspect ratio in a semiconductor-manufacturing process, and a novel wet etching method that includes treating an organic carbon film layer so that a hydrofluoric-acid-resistant material is selectively attached to the organic carbon film layer and then wet etching the same using an aqueous solution containing hydrofluoric acid, thus forming a pattern, are proposed. In the method of forming the pattern by wet etching, etching is performed so that an active region having a depth of several ?m in an object to be etched is not damaged when a pattern having a small CD is formed, thereby exhibiting an effect of providing a method of forming a micropattern.

Abstract: A process flow for forming magnetic tunnel junction (MTJ) nanopillars with minimal sidewall residue and minimal sidewall damage is disclosed wherein a pattern is first formed in a hard mask that is an uppermost MTJ layer. Thereafter, the hard mask sidewall is etch transferred through the remaining MTJ layers including a reference layer, free layer, and tunnel barrier between the free layer and reference layer. The etch transfer may be completed in a single RIE step that features a physical component involving inert gas ions or plasma, and a chemical component comprised of ions or plasma generated from one or more of methanol, ethanol, ammonia, and CO. In other embodiments, a chemical treatment with one of the aforementioned chemicals, and a volatilization at 50° C. to 450° C. may follow an etch transfer through the MTJ stack with an ion beam etch or plasma etch involving inert gas ions.

Abstract: Disclosed are semiconductor devices including through vias and methods of fabricating the same. The methods may include forming a first structure including a metal pattern and a second structure on the first structure. The metal pattern includes an upper surface facing the second structure. The methods may also include etching the second structure to form a via hole exposing the metal pattern, oxidizing a first etch residue in the via hole to convert the first etch residue into an oxidized first etch residue, and removing the oxidized first etch residue. After removing the oxidized first etch residue, the upper surface of the metal pattern may include a first portion that includes a recess and has a first surface roughness and a second portion that is different from the first portion and has a second surface roughness. The first surface roughness may be greater than the second surface roughness.

Abstract: According to one or more embodiments, a method for forming an etching mask includes forming a mask layer including a first organic material on a processing object, processing the mask layer to form a pattern including an opening, exposing the mask layer to a first oxidizing gas containing a first metal material such that the first metal material penetrates into the mask layer, and then exposing the mask layer to a first oxidizing gas including hydrogen peroxide or ozone to oxidize the first metal material.

Abstract: There is provided a cleaning method of a substrate processing apparatus comprising cleaning an inside of an exhaust pipe through which a gas of an inside of a processing container is exhausted. The cleaning the inside of the exhaust pipe includes: removing a deposit on a downstream side of an opening/closing valve in the exhaust pipe by supplying a first exhaust pipe cleaning gas containing fluorine to the downstream side of the opening/closing valve in the exhaust pipe in a state in which the opening/closing valve provided in a middle of the exhaust pipe is closed; and removing a deposit on an upstream side of the opening/closing valve in the exhaust pipe by supplying a second exhaust pipe cleaning gas not containing fluorine as a gas constituent element to the inside of the processing container in a state in which the opening/closing valve is opened.

Abstract: A workpiece holding mechanism, a process system and a manufacturing method of a semiconductor structure are provided. The workpiece holding mechanism is used in a vacuum chamber, and includes a stage, a platen and a workpiece clamper. The platen is disposed over the stage, and configured to support a workpiece. The workpiece clamper is standing on the stage, and configured to clamp the workpiece from above the workpiece. The workpiece clamper includes a plurality of supporting elements and an elevated structure. The supporting elements are connected between the stage and the elevated structure. The platen is surrounded by the supporting elements. The elevated structure is configured to physically contact a peripheral region of the workpiece from above the workpiece.

Abstract: A method for controlling an electrostatic attractor, which attracts an electrode to a gas plate provided in an upper portion of a plasma processing apparatus, includes, among a plasma generation period in which plasma is generated by the plasma processing apparatus and an idle period in which no plasma is generated by the plasma processing apparatus, applying voltages having polarities different from each other to first and second electrodes of the electrostatic attractor in at least the idle period.

Abstract: Embodiments of three-dimensional (3D) memory devices with a 3D NAND memory array having a plurality of pages and an on-die data buffer coupled to the memory array on a same chip and configured to buffer a plurality of batches of program data between a host and the memory array. The on-die data buffer may include SRAM cells. The 3D memory device also includes a controller coupled to the on-die data buffer on the same chip. The controller may be configured to receive control instructions for performing a first pass program and a second pass program on memory cells in a page. The controller may also be configured to buffer, in the on-die data buffer, first program data for a first pass program and second program data for a second pass program from a host and retrieve the first program data from the on-die data buffer.

Abstract: A method for forming a semiconductor arrangement includes forming a first gate structure over a first active region. The first gate structure includes a first conductive layer. An etch process is performed using a process gas mixture to recess the first gate structure and define a recess. The etch process comprises a first phase to form a polymer layer over the first conductive layer and to modify a portion of the first conductive layer to form a modified portion of the first conductive layer and a second phase to remove the polymer layer and to remove the modified portion of the first conductive layer.

Abstract: An etching method including: (a) providing a workpiece including a first region made of a first material and a second region made of a second material defining a recess, the first region filling the recess of the second region while covering the second region; (b) generating plasma of a first fluorocarbon gas to etch the first region until before exposing the second region; (c) generating plasma of a second fluorocarbon gas to form fluorocarbon deposits on the first region; (d) generating plasma of an inert gas to etch the first region by fluorocarbon radicals contained in the fluorocarbon deposits; and (e) repeating step (c) and step (d) one or more times until after exposing the second region. An etching rate of the first material of the first region is higher than that of the second material of the second region with respect to the second fluorocarbon gas.

Abstract: A support assembly includes an electrostatic chuck, a lower electrode, one or more conductive members and a ring-shaped insulating member. The lower electrode has a chuck support surface which supports the electrostatic chuck and a ring support surface which supports an edge ring and surrounds the chuck support surface. A contact electrode is formed on the ring support surface. The conductive members electrically connect the contact electrode and the edge ring. The insulating member is interposed between the ring support surface of the lower electrode and the edge ring while enclosing the conductive members.

Abstract: Provided are a display panel, a plasma etching method and a system. After patterning a metal film layer on a substrate with a chlorine-containing gas, a post-treatment for suppressing corrosion is implemented by using plasma containing an oxygen-containing gas and a hydrogen-fluoride-containing gas. Thus, the surface of the metal film layer is an aluminum ion-containing crystal, which solves the technical problem of corrosion of the aluminum layer in the plasma etching technology of the prior art.

Abstract: A plasma etching apparatus includes a processing vessel, a stage, a gas supply, a first high frequency power supply, a second high frequency power supply and a control device. The stage is provided and configured to place thereon a substrate. The gas supply is configured to supply a processing gas. The first high frequency power supply is configured to supply a first high frequency power. The second high frequency power supply is configured to supply a second high frequency power to the stage. The control device controls a supply and a stop of the supply of each of the first and the second high frequency powers at every preset cycle. The first and the second high frequency powers are supplied exclusively. A ratio of a supply time with respect to a single cycle of the first high frequency power is lower than that of the second high frequency power.

Abstract: A system and method to increase surface friction across a hydrophobic, anti-fouling, and oleophobic coated substrate. The substrate has a hydrophobic surface defined by a surface friction. The system works to increases the surface friction, or roughness, across the hydrophobic surface. The increase in surface friction is accomplished by generating power through an ion source to create an ion cloud. The ion cloud is generated in proximity to the substrate. The ions interact with the hydrophobic surface to create a roughing effect thereon. A gas carrier device introduces an inert carrier gas through the ion cloud to increase density of the ions, which in turn increases surface friction. The system is variable, selectively increasing and decreasing surface friction by: varying the duration that the hydrophobic surface is exposed to the ion cloud; varying power applied to ion source; and varying distance between the ion cloud and the hydrophobic surface.

Abstract: The present invention provides a plasma processing apparatus and a plasma processing method which improve the uniformity and accordingly the yield in an etching treatment of a sample.

Abstract: A microwave plasma source that generates a microwave plasma in a processing space in which a target substrate is processed, includes: a microwave generation part for generating microwave; a waveguide through which the microwave generated by the microwave generation part propagates; an antenna part including a slot antenna having a predetermined pattern of slots formed therein and being configured to radiate the microwave propagating through the waveguide into the processing space and a microwave-transmitting plate being made of a dielectric material and being configured to transmit the microwave radiated from the slots therethrough and supply the microwave into the processing space; a temperature detector for detecting a temperature at a predetermined position in a microwave propagation path leading to the slot antenna; and an abnormality detection part for receiving the temperature detected by the temperature detector and detect an abnormality in the microwave propagation path based on the detected temperatu

Abstract: A method for forming a FinFET device is described. The method includes the following steps. A substrate is patterned to form fins. Dummy gate stack is formed on the substrate and over the fins, wherein the dummy gate stack may be formed by the following steps: a dummy layer is formed; a first etching step is performed on the dummy layer with a bromine containing etching gas to form a dummy strip; a second etching step is performed on the dummy strip with a chlorine containing etching gas to form the dummy gate stack. The dummy gate stack is replaced with a gate stack.

Abstract: A method of etching silicon-containing film formed on an electrode layer of a floating potential is provided. The etching is performed in a processing vessel while supplying gas, a first high frequency electric power of a first frequency, and a second high frequency electric power of a second frequency less than the first frequency. The method includes a step of supplying, during etching of the silicon-containing film, the first high frequency electric power as a continuous wave and the second high frequency electric power as a pulse wave having a duty cycle of 20% or less, upon a distance from the electrode layer to a bottom of an etching pattern formed on the silicon-containing film becoming not more than a predetermined distance.

Abstract: A method of plasma processing includes generating a first sequence of source power pulses, generating a second sequence of bias power pulses, combining the bias power pulses of the second sequence with the source power pulses of the first sequence to form a combined sequence of alternating source power pulses and bias power pulses, and, using the combined sequence, generating a plasma comprising ions and processing a substrate by delivering the ions to a major surface of the substrate.

Abstract: A method for surface planarization of an object using a light source of a specific wavelength according to an embodiment includes: providing an object in a main chamber; injecting an etching gas into the main chamber; inputting the light source of a specific wavelength onto a surface of the object; and controlling a temperature of the object. According to the method, it is possible to minimize the side effects such as scratches or contamination of the sample that occur in a conventional chemical-mechanical planarization process. In addition, it is possible to allow precise planarization in nanometers (nm) and simultaneously perform planarization to a side surface of a device as well as a large-sized surface, thereby reducing cost and time required for the planarization process. Moreover, since the surface roughness and the electrical conductivity are improved, it is possible to increase the efficiency and output of the LED device.

Abstract: Embodiments of the present disclosure provide methods and apparatus for forming and patterning features in a film stack disposed on a substrate. In one embodiment, a method for patterning a conductive layer on a substrate includes supplying a gas mixture comprising a chlorine containing gas at a first flow rate to etch a first conductive layer disposed on the substrate, lowing the chlorine containing gas in the first gas mixture to a second flow rate lower than the first flow rate to continue etching the first conductive layer, and increasing the chlorine containing gas in the first gas mixture to a third flow rate greater than the second flow rate to remove the first conductive layer from the substrate.

Abstract: Shrouds and substrate treating systems including the same are provided. Substrate treating systems may include a process chamber, a supporter, and a plasma source that is spaced apart from the supporter in a vertical direction. The substrate treating systems may also include a shroud configured to contain the plasma therein. The shroud may include a sidewall portion and a first flange portion extending horizontally from the sidewall portion and including a plurality of first slits that extend through a thickness of the first flange portion. The first flange portion may define a first opening, and a portion of the supporter may extend through the first opening. The sidewall portion may include a plurality of second slits, and each of the plurality of second slits may extend through a thickness of the sidewall portion and may extend from one of the plurality of first slits toward the plasma source.

Abstract: In an embodiment, a system includes: a base with a bore hole, wherein the base is configured to secure a wafer at a first position on the base; a pin extending through the bore hole; a focus ring horizontally surrounding the wafer at the first position and extending upwardly from the base, wherein the wafer is configured to be moved vertically between the first position and a second position above the focus ring via the pin; and a slit valve above the focus ring, wherein the wafer is configured to be moved horizontally between the second position and the slit valve via a robotic arm.