VIA STUB ELIMINATION
An enhanced mechanism is disclosed for via stub elimination in printed wiring boards (PWBs) and other substrates. In one embodiment, the substrate includes a plurality of insulator layers and internal conductive traces. First and second through-holes extend completely through the substrate and respectively pass through first and second ones of the internal conductive traces, which are at different depths within the substrate. Photolithographic techniques are used to generate plated-through-hole (PTH) plugs of controlled, variable depth in the through-holes before first and second conductive vias are respectively plated onto the first and second through-holes. The depth of these PTH plugs is controlled (e.g., using a photomask and/or variable laser power) to prevent the first and second conductive vias from extending substantially beyond the first and second internal conductive traces, respectively, and thereby prevent via stubs from being formed in the first place.
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This patent application is a divisional application of pending U.S. patent application Ser. No. 12/193,837 (docket no. ROC920070524US1), filed Aug. 19, 2008, entitled “VIA STUB ELIMINATION”, which is hereby incorporated herein by reference in its entirety.
This patent application is related to pending U.S. patent application Ser. No. 12/193,842 (docket no. ROC920080237US1), filed Aug. 19, 2008, entitled “HORIZONTALLY SPLIT VIAS”, which is assigned to the assignee of the instant application, and which is hereby incorporated herein by reference in its entirety.
BACKGROUND OF THE INVENTION1. Field of Invention
The present invention relates in general to the electrical connector field. More particularly, the present invention relates to a method and apparatus for eliminating a via stub in printed wiring boards (PWBs) and other substrates, such as interconnect substrates.
2. Background Art
Electrical connectors are in widespread use in the electronics industry. In many computer and other electronic circuit structures, an electronic module such as a central processor unit (CPU), memory module, application-specific integrated circuit (ASIC) or other integrated circuit, must be connected to a printed wiring board (PWB). Printed wiring boards are also known as printed circuit boards (PCBs). When populated with one or more electronic components, a printed wiring board is often referred to as a printed wiring board assembly (PWBA) or a printed circuit board assembly (PCBA). In connecting an electronic module to a PWB, individual electrical contacts on the base of the electronic module must be connected to a plurality of corresponding individual electrical contacts on the PWB. This set of contacts on the PWB dedicated to contacting the electronic module contacts is known as a land grid array (LGA) site when a LGA connector is used to connect the electronic module to the PWB.
Typically, the PWB contains a plurality of vias, each electrically connecting a conductive trace on one layer of the PWB to one or more conductive traces on one or more other layers of the PWB. The vias may be at the LGA site, for example, or elsewhere on the PWB.
As mentioned above, PTH vias possess via stubs that can significantly distort high speed digital signals that pass through PTH vias. This distortion is often severe and generally increases as the data rate increases.
A conventional technique known as backdrilling can be used to remove the via stub 212, which serves no useful function in this circuit. Backdrilling uses controlled depth drilling techniques to remove the undesired conductive plating in the via stub region. Typically, the via stub region is removed using a drill bit slightly larger in diameter than the drill bit that was used to create the original via hole. See, for example, the discussion of backdrilling via stubs in the publication of Franz Gisin & Alex Stepinski, “Overview of Backdrilling”, Sanmina-SCI Corp., San Jose, Calif., http://www.sanmina.com/Solutions/pdfs/pcbres/Backdrilling.pdf. An exemplary conventional backdrilled PTH via 220 having a backdrilled region 222 is illustrated in
It should therefore be apparent that a need exists for an enhanced mechanism for via stub elimination in PWBs and other substrates, such as interconnect substrates.
SUMMARY OF THE INVENTIONAccording to the preferred embodiments of the present invention, a substrate (e.g. a printed wiring board or other substrate, such as an interconnect substrate) includes a plurality of insulator layers and internal conductive traces. First and second through-holes extend completely through the substrate and respectively pass through first and second ones of the internal conductive traces, which are at different depths within the substrate. Photolithographic techniques are used to generate plated-through-hole (PTH) plugs of controlled, variable depth in the through-holes before first and second conductive vias are respectively plated onto the first and second through-holes. The depth of these PTH plugs is controlled (e.g., using a photomask and/or variable laser power) to prevent the first and second conductive vias from extending substantially beyond the first and second internal conductive traces, respectively, and thereby prevent via stubs from being formed in the first place. This advantageously eliminates the costly and time consuming process of via stub backdrilling.
The foregoing and other features and advantages of the present invention will be apparent from the following more particular description of the preferred embodiments of the present invention, as illustrated in the accompanying drawings.
The preferred exemplary embodiments of the present invention will hereinafter be described in conjunction with the appended drawings, where like designations denote like elements.
1.0 Overview
In accordance with the preferred embodiments of the present invention, a substrate (e.g. a printed wiring board or other substrate, such as an interconnect substrate) includes a plurality of insulator layers and internal conductive traces. First and second through-holes extend completely through the substrate and respectively pass through first and second ones of the internal conductive traces, which are at different depths within the substrate. Photolithographic techniques are used to generate plated-through-hole (PTH) plugs of controlled, variable depth in the through-holes before first and second conductive vias are respectively plated onto the first and second through-holes. The depth of these PTH plugs is controlled to prevent the first and second conductive vias from extending substantially beyond the first and second internal conductive traces, respectively, and thereby prevent via stubs from being formed in the first place. This advantageously eliminates the costly and time consuming process of via stub backdrilling.
In one embodiment, the depth of the PTH plugs is controlled through the use of a photomask in combination with a liquid, positive tone photoresist with which the through-holes are filled. Exposure attenuation elements of a variable neutral density pattern of the photomask are registered and control exposure depth on a hole-by-hole basis.
In another embodiment, the depth of the PTH plugs is controlled through the use of variable laser power in combination with the use a liquid, negative tone photoresist with which the through-holes are filled. Exposure depth is controlled on a hole-by-hole basis by varying the laser power directed toward the through-holes.
2.0 Detailed Description
With reference to the figures and in particular
One skilled in the art will appreciate that the PWB 300 shown in
In the exemplary PWB 300 shown in
Hence, the “top-side” exposure of the liquid, positive tone photoresist 316 through the exposure attenuation element 322 is greater than through the exposure attenuation element 324 and, consequently, the liquid, positive tone photoresist 316 in the through-hole 302 is exposed to a greater depth than the liquid, positive tone photoresist 316 in the through-hole 304. Preferably, the liquid, positive tone photoresist 316 in the through-hole 302 is exposed to a depth substantially corresponding to or slightly beneath the internal conductive trace 308, while the liquid, positive tone photoresist 316 in the through-hole 304 is exposed to a depth substantially corresponding to or slightly beneath the internal conductive trace 310. Because the solubility of the liquid, positive tone photoresist 316 increases with light exposure, and because the liquid, positive tone photoresist 316 in the through-hole 302 is exposed to a greater depth than the liquid, positive tone photoresist 316 in the through-hole 304, after the photomask covered and photoresist laden PWB is exposed and developed, as described in more detail below with reference to
In general, top-side exposure of the liquid, positive tone photoresist 316 is only attenuated, to any significant extent, by the exposure attenuation elements in accordance with the preferred embodiments of the present invention. That is, portions of the upper photomask 318 that do not include the variable neutral density pattern's exposure attenuation elements do not significantly attenuate top-side exposure of the underlying liquid, positive tone photoresist 316.
Preferably, the width of each of the exposure attenuation elements (e.g., the exposure attenuation elements 322 and 324) is slightly greater than the width of the underlying through-hole (e.g., the through-holes 302 and 304) to substantially prevent unintended overexposure of the liquid, positive tone photoresist 316 in the underlying through-hole. This prevents light from entering the underlying through-hole at an angle from the edge of the exposure attenuation elements.
In accordance with the preferred embodiments of the present invention, the variable neutral density pattern of the upper photomask 318 does not include exposure attenuation elements for registration with through-holes, such as the through-hole 306, that require a conventional plated-through-hole (PTH). Hence, top-side exposure of the liquid, positive tone photoresist 316 in the through-hole 306 is not attenuated by the upper photomask 318. Ultimately, in accordance with the preferred embodiments of the present invention, electrical connection will be established in through-hole 306 between a contact pad on the surface 312 and a contact pad on the surface 314 of the PWB 300 by via 358, shown and described below with reference to
The lower photomask 320, which is preferably either glass or film, includes a neutral density pattern to substantially prevent “bottom-side” exposure of the liquid, positive tone photoresist 316 in through-holes, such as the through-holes 302 and 304, in which stub-less vias are to be provided in accordance with the preferred embodiment of the present invention. For example, the neutral density pattern of the lower photomask 320 includes a plurality of exposure blocking elements 326 and 328 that are respectively registered with through-holes 302 and 304.
In general, bottom-side exposure of the liquid, positive tone photoresist 316 is only attenuated, to any significant extent, by the exposure blocking elements in accordance with the preferred embodiments of the present invention. That is, portions of the lower photomask 320 that do not include the neutral density pattern's exposure blocking elements do not significantly attenuate bottom-side exposure of the underlying liquid, positive tone photoresist 316.
Preferably, the width of each of the exposure blocking elements (e.g., the exposure blocking elements 326 and 328) is substantially equal to the width of the underlying through-hole (e.g., the through-holes 302 and 304).
In accordance with the preferred embodiments of the present invention, the neutral density pattern of the lower photomask 320 does not include exposure blocking elements for registration with through-holes, such as the through-hole 306, that require a conventional plated-through-hole (PTH). Hence, bottom-side exposure of the liquid, positive tone photoresist 316 in the through-hole 306 is not attenuated by the lower photomask 320. Ultimately, as mentioned earlier, in accordance with the preferred embodiments of the present invention, electrical connection will be established in through-hole 306 between a contact pad on the surface 312 and a contact pad on the surface 314 of the PWB 300 by via 358, shown and described below with reference to
Preferably, the variable neutral density pattern of the upper photomask 318 and the neutral density pattern of the lower photomask 320 are each “neutral” with respect to wavelength of the exposure light. Photomasks suitable for use as the photomasks 318 and 320 are conventional. Typically, a (variable) neutral density pattern is printed on film or a glass plate. For example, “Transmission Step Wedges” available from Stouffer Industries, Inc., Mishawaka, Ind. are representative examples of a neutral density photomask.
Exposure renders the liquid, positive tone photoresist 316 soluble in the developer. The liquid, positive tone photoresist 316 is developed with a developer according to the photoresist manufacturer's instructions. Typically, the developer is an aqueous media, such as an aqueous alkaline solution. Depending on the degree of attenuation provided by the exposure attenuation elements, the PTH plugs of varying depths are formed in the through-holes by the liquid, positive tone photoresist 316 that remains insoluble in the developer. For example, the unexposed liquid, positive tone photoresist 316 remaining in the through-holes 302 and 304 will respectively form PTH plugs 330 and 332 at depths in the through-holes 302 and 304 corresponding to or slightly beneath the internal conductive trace 308 and the internal conductive trace 310, respectively.
The PTH plug 330 formed in the through-hole 302 extends from an upper end 334 thereof at or adjacent to (preferably, slightly beneath) the internal conductive trace 308 to a lower end 336 thereof at or adjacent to (preferably, slightly beneath) the surface 314 of the PWB 300. The PTH plug 332 formed in the through-hole 304 extends from an upper end 338 thereof at or adjacent to (preferably, slightly beneath) the internal conductive trace 310 to a lower end 340 thereof at or adjacent to (preferably, slightly beneath) the surface 314 of the PWB 300.
The seed photoresist is developed with a developer according to the photoresist manufacturer's instructions. Typically, the developer is an aqueous media.
As shown in
The seed photoresist must be removed to a sufficient extent from the critical surfaces of the PWB 300 (i.e., the walls of the through-holes 302, 304 and 306 at varying depths, the open regions 344, 346 and 348 on the surface 312, and the open region 350 on the surface 314) to provide for an effective subsequent application of the seed material (shown and described below with reference to
Conventional photolithographic techniques may be used to expose and develop the seed photoresist to open up the through-holes for subsequent seed material application (shown and described below with reference to
The critical surfaces of the PWB 300 (i.e., the walls of the through-holes 302, 304 and 306 at varying depths, the open regions 344, 346 and 348 on the surface 312, and the open region 350 on the surface 314) are activated, that is seeded, by contact with the seed material 352. The seed material 352 catalyzes the subsequent electroless copper deposition of vias to the critical surfaces of the PWB 300. For example, electroless copper deposition of vias 354, 356 and 358 (shown and described below with reference to
Alternatively, the vias 354, 356 and 358 may be electroplated onto the patterned seed material 352 using a conventional electrolytic deposition process in lieu of utilizing an electroless plating bath.
The plating process results in either a partially-plated-hole via (e.g., stub-less vias 354 and 356) or a completely-plated-hole via (e.g., PTH via 358). The stub-less via 354 extends from a contact-pad-portion on the surface 312 of the PWB 300 to and terminates in an edge substantially at the internal conductive trace 308. The stub-less via 356 extends from a contact-pad-portion on the surface 312 of the PWB 300 to and terminates in an edge substantially at the internal conductive trace 310. The PTH via 358 extends from a contact-pad-portion on the surface 312 of the PWB 300 to a contact-pad-portion on the surface 314 of the PWB 300.
With reference to the figures and in particular
One skilled in the art will appreciate that the PWB 400 shown in
In the exemplary PWB 400 shown in
The PWB 400 shown in
Preferably, the liquid, negative tone photoresist 416 is an SLA (stereolithography apparatus) resin. Stereolithography is an additive fabrication process that uses a liquid, negative tone photoresist (commonly referred to as an “SLA resin”) and a UV laser (commonly referred to as an “SLA laser”) to build parts layer-upon-layer. Stereolithography is typically used for either rapid prototyping or rapid manufacturing. The device that performs stereolithography is called an “SLA” or “stereolithography apparatus.” In the second exemplary method shown in
A suitable example of an SLA resin for use as the liquid, negative tone photoresist 416 is “RenShape SL 5530”, available from Huntsman Advanced Materials Americas Inc., Auburn Hills, Mich. Another suitable example of an SLA resin for use as the liquid, negative tone photoresist 416 is “WaterClear® Ultra 10122”, available from DSM Somos®, Elgin, Ill.
The “top-side” exposure of the liquid, negative tone photoresist 416 is controlled by varying the power of the SLA laser on a hole-by-hole basis and, consequently, the liquid, negative tone photoresist 416 in the through-hole 402 is exposed to a lesser depth (with respect to the surface 414) than the liquid, negative tone photoresist 416 in the through-hole 404. Preferably, the liquid, negative tone photoresist 416 in the through-hole 402 is exposed to a depth substantially corresponding to or slightly above the internal conductive trace 408, while the liquid, negative tone photoresist 416 in the through-hole 404 is exposed to a depth substantially corresponding to or slightly above the internal conductive trace 410. Because the solubility of the liquid, negative tone photoresist 416 decreases with light exposure, and because the liquid, negative tone photoresist 416 in the through-hole 402 is exposed to a shallower depth than the liquid, negative tone photoresist 416 in the through-hole 404, after the photoresist laden PWB is exposed and developed, as described in more detail below with reference to
In accordance with the preferred embodiments of the present invention, the SLA laser does not expose through-holes, such as the through-hole 406, that require a conventional plated-through-hole (PTH). Hence, the liquid, negative tone photoresist 416 in the through-hole 406 is unexposed to UV light from the SLA laser. Ultimately, in accordance with the preferred embodiments of the present invention, electrical connection will be established in through-hole 406 between a contact pad on the surface 412 and the surface 414 of the PWB 400 by via 458, shown and described below with reference to
Exposure renders the liquid, negative tone photoresist 416 insoluble in the developer. The liquid, negative tone photoresist 416 is developed with a developer according to the photoresist manufacturer's instructions. Typically, the developer is an aqueous media. Depending on the power of the SLA laser, the PTH plugs of varying depths are formed in the through-holes by the liquid, negative tone photoresist 416 that is exposed and becomes insoluble in the developer. For example, the exposed liquid, negative tone photoresist 416 remaining in the through-holes 402 and 404 will respectively form PTH plugs 430 and 432 at depths in the through-holes 402 and 404 corresponding to or slightly above the internal conductive trace 408 and the internal conductive trace 410, respectively.
The PTH plug 430 formed in the through-hole 402 extends from a lower end 434 thereof at or adjacent to (preferably, slightly above) the internal conductive trace 408 to an upper end 436 thereof at or adjacent to (preferably, slightly above) the surface 414 of the PWB 400. The PTH plug 432 formed in the through-hole 404 extends from a lower end 438 thereof at or adjacent to (preferably, slightly above) the internal conductive trace 410 to an upper end 440 thereof at or adjacent to (preferably, slightly above) the surface 414 of the PWB 400.
The seed photoresist is developed with a developer according to the photoresist manufacturer's instructions. Typically, the developer is an aqueous media.
As shown in
The seed photoresist must be removed to a sufficient extent from the critical surfaces of the PWB 400 (i.e., the walls of the through-holes 402, 404 and 406 at varying depths, the open regions 444, 446 and 448 on the surface 412, and the open region 450 on the surface 414) to provide for an effective subsequent application of the seed material (shown and described below with reference to
Conventional photolithographic techniques may be used to expose and develop the seed photoresist to open up the through-holes for subsequent seed material application (shown and described below with reference to
The critical surfaces of the PWB 400 (i.e., the walls of the through-holes 402, 404 and 406 at varying depths, the open regions 444, 446 and 448 on the surface 412, and the open region 450 on the surface 414) are activated, that is seeded, by contact with the seed material 452. The seed material 452 catalyzes the subsequent electroless copper deposition of vias to the critical surfaces of the PWB 400. For example, electroless copper deposition of vias 454, 456 and 458 (shown and described below with reference to
Alternatively, the vias 454, 456 and 458 may be electroplated onto the patterned seed material 452 using a conventional electrolytic deposition process in lieu of utilizing an electroless plating bath.
The plating process results in either a partially-plated-hole via (e.g., stub-less vias 454 and 456) or a completely-plated-hole via (e.g., PTH via 458). The stub-less via 454 extends from a contact-pad-portion on the surface 412 of the PWB 400 to and terminates in an edge substantially at the internal conductive trace 408. The stub-less via 456 extends from a contact-pad-portion on the surface 412 of the PWB 400 to and terminates in an edge substantially at the internal conductive trace 410. The PTH via 458 extends from a contact-pad-portion on the surface 412 of the PWB 400 to a contact-pad-portion on the surface 414 of the PWB 400.
A stub-less via fabricated in accordance with the preferred embodiments of the present invention (e.g., the stub-less vias 354 and 356 shown in
One skilled in the art will appreciate that many variations are possible within the scope of the present invention. For example, although the preferred embodiments of the present invention are described herein within the context of a printed wiring board (PWB), the present invention may be utilized in the context of other substrates, such as an interconnect substrate (e.g., an interposer or a module substrate) or a flex cable. In addition, although the preferred embodiments of the present invention are described herein within the context of forming one or more stub-less vias on a single side of a substrate, the present invention may be utilized in the context of forming a plurality of stub-less vias that have contact-pad-portions on alternate sides of a substrate. Thus, while the present invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that these and other changes in form and detail may be made therein without departing from the spirit and scope of the present invention.
Claims
1. An apparatus, comprising:
- a substrate having a plurality of insulator layers and one or more internal conductive traces, wherein a first through-hole extends completely through the substrate from a first surface of the substrate to a second surface of the substrate, and wherein the first through-hole passes through a first one of the one or more internal conductive traces;
- a first conductive via plated onto the first through-hole, wherein the first conductive via extends from the substrate's first surface to and terminates in a non-tooled edge substantially at the first internal conductive trace.
2. The apparatus as recited in claim 1, wherein a second through-hole extends completely through the substrate from the substrate's first surface to the substrate's second surface, wherein the second through-hole passes through a second one of the internal conductive traces, and wherein the second internal conductive trace lies deeper within the substrate with respect to the substrate's first surface than does the first internal conductive trace, the apparatus further comprising:
- a second conductive via plated onto the second through-hole, wherein the second conductive via extends from the substrate's first surface to and terminates in a non-tooled edge substantially at the second internal conductive trace.
3. The apparatus as recited in claim 2, wherein a third through-hole extends completely through the substrate from the substrate's first surface to the substrate's second surface, the apparatus further comprising:
- a third conductive via plated onto the third through-hole, wherein the third conductive via extends completely through the substrate from the substrate's first surface to the substrate's second surface.
4. The apparatus as recited in claim 1, wherein the substrate is an interconnect substrate.
5. The apparatus as recited in claim 1, wherein the substrate is a printed wiring board.
6. An apparatus, comprising:
- a substrate having a plurality of insulator layers and one or more internal conductive traces, wherein a first through-hole extends completely through the substrate from a first surface of the substrate to a second surface of the substrate, wherein the first through-hole passes through a first one of the one or more internal conductive traces, wherein a second through-hole extends completely through the substrate from the substrate's first surface to the substrate's second surface, wherein the second through-hole passes through a second one of the internal conductive traces, and wherein the second internal conductive trace lies deeper within the substrate with respect to the substrate's first surface than does the first internal conductive trace;
- a first conductive via plated onto the first through-hole, wherein the first conductive via extends from the substrate's first surface to and terminates in a non-tooled edge substantially at the first internal conductive trace;
- a second conductive via plated onto the second through-hole, wherein the second conductive via extends from the substrate's first surface to and terminates in a non-tooled edge substantially at the second internal conductive trace.
7. The apparatus as recited in claim 6, wherein a third through-hole extends completely through the substrate from the substrate's first surface to the substrate's second surface, the apparatus further comprising:
- a third conductive via plated onto the third through-hole, wherein the third conductive via extends completely through the substrate from the substrate's first surface to the substrate's second surface.
8. The apparatus as recited in claim 6, wherein the substrate is an interconnect substrate.
9. The apparatus as recited in claim 6, wherein the substrate is a printed wiring board.
10. An apparatus, comprising:
- a substrate having a plurality of insulator layers and one or more internal conductive traces, wherein a first through-hole extends completely through the substrate from a first surface of the substrate to a second surface of the substrate, and wherein the first through-hole passes through a first one of the one or more internal conductive traces;
- a first conductive via plated onto the first through-hole, wherein the first conductive via extends from the substrate's first surface to and terminates in a non-tooled edge substantially at the first internal conductive trace;
- wherein the apparatus is made by a method comprising the steps of: providing a substrate having a plurality of insulator layers and one or more internal conductive traces, wherein a first through-hole extends completely through the substrate from a first surface of the substrate to a second surface of the substrate, and wherein the first through-hole passes through a first one of the one or more internal conductive traces; providing a first plated-through-hole (PTH) plug in the first through-hole, wherein the first PTH plug extends from a second end thereof at or adjacent to the substrate's second surface to a first end thereof at or adjacent to the first internal conductive trace; providing a seed photoresist on portions of the substrate's first and second surfaces, wherein the seed photoresist has open regions in the vicinity of the first through-hole, and wherein the open regions of the seed photoresist expose a portion of the substrate's first surface adjacent the first through-hole, a portion of the first through-hole extending from the substrate's first surface to the first internal conductive trace, the first end of the first PTH plug, and the second end of the first PTH plug; applying seed material to the seed photoresist, the exposed portion of the substrate's first surface, the exposed portion of the first through-hole, the exposed first end of the first PTH plug, and the exposed second end of the first PTH plug; stripping the first PTH plug and the seed photoresist so that the seed material remains substantially only at a portion of the substrate's first surface adjacent the first through-hole and at a portion of the first through-hole extending from the substrate's first surface to the first internal conductive trace; plating a first conductive via plating onto the first through-hole so that the first conductive via plating extends from the substrate's first surface to and terminates substantially at the first internal conductive trace.
Type: Application
Filed: Mar 9, 2012
Publication Date: Aug 23, 2012
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION (Armonk, NY)
Inventors: Joseph Kuczynski (Rochester, MN), Kevin Albert Splittstoesser (Stewartville, MN), Timothy Jerome Tofil (Rochester, MN), Paul Alan Vermilyea (Rochester, MN)
Application Number: 13/417,023
International Classification: H05K 1/11 (20060101); H05K 3/00 (20060101);