Semiconductor device and display device
To provide a semiconductor device and a display device which include a circuit element capable of improving performances and a circuit element capable of increasing a withstand voltage on the same substrate and which can improve the reliability. The semiconductor device of the present invention includes a first circuit element and a second circuit element on a substrate, the first circuit element having a structure in which a first semiconductor layer, a first insulating film, a first conductive layer, and a third insulating film are stacked in this order, the second circuit element having a structure in which a second semiconductor layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second conductive layer are stacked in this order, wherein the first insulating film has a multilayer structure including a silicon nitride layer as the uppermost layer, the second insulating film has a lower part and an upper part, the lower part includes the multilayer structure of the first insulating film, and the upper part includes a structure of the third insulating film formed on the first conductive layer.
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This application is the U.S. national phase of International Application No. PCT/JP2006/317641 filed Sep. 6, 2006 which designated the U.S. and claims priority to Japanese Application No. 2006-005402 filed Jan. 12, 2006, the entire contents of each of which are hereby incorporated by reference.
TECHNICAL FIELDThe present invention relates to a semiconductor device, a production method thereof, and a display device. More specifically, the present invention relates to a semiconductor device such as an active matrix substrate, a production method thereof, and a display device.
BACKGROUND ARTA semiconductor device is an active element-including electronic device using electrical characteristics of a semiconductor. Such a semiconductor device has been widely used in an audio device, a communication device, a computer, an electric appliance and the like. Among these, a TFT array substrate has been known as a semiconductor device including a thin film transistor (hereinafter, also referred to as a “TFT”) on a substrate. Such a TFT array substrate has been used as a component of an active matrix driving liquid crystal display device and the like.
A system-on-glass technology in which a pixel circuit part and a driving circuit part are formed on the same substrate using polysilicon (hereinafter, also referred to as “p-Si”) as a semiconductor material for a TFT has been recently used in the active matrix driving liquid crystal display device. Due to this technology, a TFT in the pixel circuit part (hereinafter, also referred to as a “pixel switching TFT”) and a TFT in the driving circuit part (hereinafter, also referred to as a “driving circuit TFT) are integrally formed, which permits downsizing, a reduction in electric power consumption, and high reliability of the liquid crystal display device. However, different characteristics are needed between the pixel switching TFT and the driving circuit TFT. That is, for the pixel switching TFT, a low off-state current is needed to suppress a reduction in contrast ratio or uneven image qualities inside a panel, but for the driving circuit TFT, a reduction in threshold voltage (Vth), a reduction in variation of Vth, and a high on-state current are needed in order for the driving circuit to operate at a high speed. Accordingly, in order to satisfy these needed characteristics, the pixel switching TFT and the driving circuit TFT need to have different structures.
For such a need, a method of forming a gate insulating film of the pixel switching TFT to have a thickness larger than that of a gate insulating film of the driving circuit TFT has been known, for example. For example, a thin film semiconductor device in which a TFT in a matrix circuit part, including a gate insulating film having a two-layer structure between a semiconductor layer and a gate electrode (a pixel switching TFT) and a TFT in a peripheral circuit part, including a gate insulating film having a single-layer structure (a driving circuit TFT) are formed on the same substrate is disclosed (for example, refer to Patent Document 1). In this thin film semiconductor device, the gate insulating film of the TFT in the peripheral circuit part has a silicon oxide or silicon nitride single-layer structure. The gate insulating film of the TFT in the matrix circuit part includes a lower part having the same structure as in the gate insulating film of the TFT in the peripheral circuit part. Also, the gate insulating film of the TFT in the matrix circuit part includes an upper part having a silicon oxide or silicon nitride single-layer structure. However, according to this configuration, in the TFT in the matrix circuit part, it is impossible to continuously form the two layers, i.e., the upper part and the lower part of the gate insulating film, and on the interface between the upper part and the lower part, many traps exist. Therefore, if the lower part of the gate insulating film has a silicon oxide single-layer structure, the reliability of the TFT in the matrix circuit part is reduced. In such a point, this thin film semiconductor device has room for improvement. Further, the upper part of the gate insulating film is formed by a sputtering method or a plasma CVD method. Therefore, if the lower part of the gate insulating film has a silicon oxide single-layer structure, the lower part is plasma-damaged in the step of forming the upper part of the insulating film, which further reduces the reliability of the TFT in the matrix circuit part. In such a point, this thin film semiconductor device has room for improvement. In addition, if, in the TFT in the matrix circuit part, the lower part of the gate insulating film is a silicon nitride layer, it is impossible to form an excellent interface between the gate insulating film and the semiconductor layer (polysilicon layer), which fails to obtain excellent TFT characteristics. In such a point, this thin film semiconductor device has room for improvement.
Further, a production method of a semiconductor device, in which the first and second field-effect transistors including gate insulating films with different thicknesses are formed by forming an insulating film constituting a gate insulating film, and then selectively removing a specific region of the insulating film by etching, is disclosed (for example, refer to Patent Document 2). However, according to this production method, the insulating film to be etched has a single-layer structure. Therefore, if the above-mentioned etching is dry etching, the part formed after the etching is plasma-damaged, which might possibly reduce the reliability. In such a point, the method has room for improvement.
Accordingly, in the conventional production method, if the pixel switching TFT and the driving circuit TFT are formed on the same substrate, in either one TFT, the gate insulating film is deteriorated or damaged, and thereby the reliability is reduced. Therefore, mass production of such a semiconductor device has not been achieved yet.
- [Patent Document 1]
- Japanese Kokai Publication No. Hei-05-335573
- [Patent Document 2]
- Japanese Kokai Publication No. 2005-72461
The present invention has been made in view of the above-mentioned state of the art. The present invention has an object to provide a semiconductor device and a display device which include a circuit element capable of improving performances and a circuit element capable of increasing a withstand voltage on the same substrate and which can improve the reliability.
The present inventor made various investigations on a method for producing a semiconductor device including the first thin film transistor (the first circuit element) and the second thin film transistor (the second circuit element), the first thin film transistor having a structure in which the first semiconductor layer, the first gate insulating film (the first insulating film), the first gate electrode (the first conductive layer), and the third insulating film are stacked in this order, the second thin film transistor having a structure in which the second semiconductor layer, the second gate insulating film having a thickness larger than that of the first gate insulating film, and the second gate electrode (the second conductive layer) are stacked in this order. The inventor noted a method for forming the above-mentioned first and second gate insulating films.
Further, the inventor made various investigations on a method, as shown in
However, the inventor found that according to this method, the following problems are caused. In the step shown in
Further, the inventor found the following. As shown in
Then, the inventor noted the structures of the first gate insulating film 4a and the lower part 4c of the second gate insulating film 9. The inventor found that SiNx has a high resistance to plasma, and then the inventor made investigations on a method shown in
Further, the inventor found the following. SiNx also has an impurity diffusion-preventing (barrier) function. Therefore, the impurities adhering to the first gate insulating film 4a and the lower part 4c of the second gate insulating film 9 are trapped on the film surface. As a result, in the next annealing step and the like, the impurities can be suppressed from diffusing into the first semiconductor layer 15a and the second semiconductor layer 15c as well as the first gate insulating film 4a and the lower part 4c of the second gate insulating film 9. Therefore, a reduction in the reliability of the first TFT 50a and the second TFT 50c can suppressed. Further, the inventor also found the following. If the first gate insulating film 4a and the lower part 4c of the second gate insulating film 9 are formed to have a multilayer structure, a material for forming an excellent interface with the first semiconductor layer 15a and the second semiconductor layer 15c (for example, SiO2) other than SiNx can be selected as the material for the lowest layer 7a of the first gate insulating film 4a and the lowest layer 7c in the lower part 4c of the second gate insulating film 9. Therefore, the first TFT 50a and the second TFT 50c can secure excellent characteristics.
As mentioned above, the inventor found that the reliability of the first TFT 50a and the second TFT 50c is secured, and simultaneously an improvement in performances of the first TFT 50a and an increase in withstand voltage of the second TFT 50c are permitted, and as a result, mass production of a semiconductor device including these TFTs on the same substrate is permitted. The inventor also found that the present invention can be applied to any semiconductor devices including, in addition to a TFT having a top-gate structure, two or more of the followings: TFTs having a bottom-gate structure, TFTs having a dual-gate structure, and circuit elements such as a storage capacitor element, on a substrate. As a result, the above-mentioned problems had been admirably solved, leading to completion of the present invention.
That is, the present invention is a semiconductor device including a first circuit element and a second circuit element on a substrate, the first circuit element having a structure in which a first semiconductor layer, a first insulating film, a first conductive layer, and a third insulating film are stacked in this order, the second circuit element having a structure in which a second semiconductor layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second conductive layer are stacked in this order, wherein the first insulating film has a multilayer structure including a silicon nitride layer as the uppermost layer, the second insulating film has a lower part and an upper part, the lower part includes the multilayer structure of the first insulating film, and the upper part includes a structure of the third insulating film formed on the first conductive layer (hereinafter, also referred to as a “first semiconductor device”) (for example, refer to
The present invention is also a semiconductor device including a first circuit element and a second circuit element on a substrate, the first circuit element having a structure in which a first semiconductor layer, a first insulating film, and a first conductive layer are stacked in this order, and the second circuit element having a structure in which a second semiconductor layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second conductive layer are stacked in this order, wherein the second insulating film has a lower part and an upper part, the lower part includes a silicon nitride layer as the uppermost layer, and the upper part includes a structure of the first insulating film (hereinafter, also referred to as a “second semiconductor device”) (for example, refer to
The present invention is a semiconductor device including a first circuit element and a second circuit element on a substrate, the first circuit element having a structure in which a first conductive layer, a first insulating film, and a first semiconductor layer are stacked in this order, the second circuit element having a structure in which a second conductive layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second semiconductor layer are stacked in this order, wherein the first insulating film has a structure in which the lowest layer is a silicon nitride layer, the second insulating film has a lower part and an upper part, and the upper part has the structure of the first insulating film (hereinafter, also referred to as a “third semiconductor device”) (for example, refer to
The present invention is also a semiconductor device including a first circuit element and a second circuit element on a substrate, the first circuit element having a structure in which a first conductive layer, a first insulating film, and a first semiconductor layer are stacked in this order, the second circuit element having a structure in which a second conductive layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second semiconductor layer are stacked in this order, wherein the second insulating film includes a lower part and an upper part, the lower part has a structure of the first insulating film, and the upper part includes a silicon nitride layer as the lowest layer (hereinafter, also referred to as a “fourth semiconductor device”) (for example, refer to
The first semiconductor device of the present invention is mentioned in more detail below.
The first semiconductor device of the present invention includes the first circuit element and the second circuit element on the substrate. The first circuit element has a structure in which the first semiconductor layer, the first insulating film, the first conductive layer, and the third insulating film are stacked in this order. The second circuit element has a structure in which the second semiconductor layer, the second insulating film having a thickness larger than that of the first insulating film, and the second conductive layer are stacked in this order. As preferable embodiments of the above-mentioned first semiconductor device, for example, an embodiment (1) in which the first circuit element and the second circuit element are thin film transistors (TFTs), and an embodiment (2) in which the first circuit element is a TFT and the second circuit element is a storage capacitor element may be mentioned. According to the embodiment (1), when the first circuit element is the first TFT and the second circuit element is the second TFT, a gate insulating film (the first insulating film) of the first TFT has a thickness smaller than that of a gate insulating film (the second insulating film) of the second TFT. Therefore, the first circuit element can function as a high-performance TFT capable of operating at a higher speed in comparison to the second circuit element. The second circuit element can function as a TFT having a withstand voltage larger than that of the first circuit element. According to the embodiment (2), when the first circuit element is the third TFT and the second circuit element is a storage capacitor element, the first insulating film (the gate insulating film of the third TFT) has a thickness smaller than that of the second insulating film (the insulating film of the storage capacitor element). Therefore, the first circuit element can function as a high-performance TFT capable of operating at a high speed. The second circuit element can function as a storage capacitor element having a large withstand voltage.
A TFT having a top-gate structure, a TFT having a dual-gate structure, and the like may be mentioned as the TFTs in the above-mentioned first semiconductor device. In order to finely form the TFTs, the TFTs preferably have a top-gate structure.
The above-mentioned first insulating film has a multilayer structure in which the uppermost layer is a silicon nitride (SiNx) layer (for example, refer to
The above-mentioned second insulating film includes the lower part having the multilayer structure of the first insulating film and the upper part having a structure of the third insulating film formed on the first conductive layer (for example, refer to
Accordingly, the first semiconductor device of the present invention permits mass production of a semiconductor device which includes the circuit element capable of improving the performances and the circuit element capable of increasing a withstand voltage on the same substrate and which sufficiently secures the reliability.
Each of the above-mentioned first insulating film and the lower part of the second insulating film may have a structure including three or more layers as long as each has a multilayer structure, that is, a structure including two or more layers. The material for layers other than the SiNx layer of the first insulating film and the second insulating film is not especially limited. The following materials may be mentioned. Silicon oxide (SiO2); SiOF, SiOC, and the like, which are materials having a dielectric constant lower than that of SiO2; and titanium dioxide (TiO2), dialuminum trioxide (Al2O3), tantalum oxide such as ditantalum pentaoxide (Ta2O5), hafnium dioxide (HfO2), and zirconium dioxide (ZrO2), which are materials having a dielectric constant higher than that of SiO2. The above-mentioned first insulating film and the lower part of the second insulating film may include a (integrated) layer formed in the same step. It is preferable that all of the layers constituting the first insulating film and the layers constituting the lower part of the second insulating film are formed in the same steps, respectively.
In addition, the above-mentioned third insulating film and the upper part of the second insulating film may have a single-layer structure or a multilayer structure. Accordingly, the uppermost layer and the lowest layer mean the same layer in the single-layer structure, in addition to the case where the uppermost layer and the lowest layer mean the respective layers in the multilayer structure. Examples of the configuration of the upper part of the second insulating film include a configuration (1) in which the upper part of the second insulating film has a structure of the middle part of the third insulating film, a configuration (2) in which it has a structure of the lower part of the third insulating film, a configuration (3) in which it has a structure of the upper part of the third insulating film, and a configuration (4) in which it has the entire structure of the third insulating film. The configurations (2) and (3) are preferable and the configuration (4) is particularly preferable in order to reduce the patterning steps and the like performed when the third insulating film is formed. The middle part in the configuration (1) is not especially limited as long as at least the uppermost layer and the lowest layer are not included. The middle part may be composed of one layer or two or more layers. The lower part in the configuration (2) is not especially limited as long as at least the lowest layer of the third insulating film is included. The lower part may be composed of one layer or two or more layers. The upper part in the configuration (3) is not especially limited as long as at least the uppermost layer of the third insulating film is included. The upper part may be composed of one layer or two or more layers.
The following materials may be mentioned as the material for the above-mentioned third insulating film. Silicon oxide (SiO2); SiOF, SiOC, and the like, which are materials having a dielectric constant lower than that of SiO2; silicon nitride (SiNx), titanium dioxide (TiO2), dialuminum trioxide (Al2O3), and tantalum oxide such as ditantalum pentaoxide (Ta2O5), hafnium dioxide (HfO2), and zirconium dioxide (ZrO2), which are materials having a dielectric constant higher than that of SiO2.
The above-mentioned silicon nitride (SiNx) is not especially limited, and trisilicon tetranitride (Si3N4) and the like is preferably used. The SiNx layer formed by a plasma chemical vapor deposition method (CVD method) is preferable because it has a high resistance to plasma and an impurity diffusion-preventing function regardless of the value of x. In addition, even if the SiNx layer which constitutes the uppermost layer of the first insulating film and the uppermost layer in the lower part of the second insulating film has a thickness of 10 nm, the operation and effects of the present invention can be obtained. Silicon oxynitride (SiNO) also has a high resistance to plasma, and therefore it can be preferably used as an alternative for SiNx. However, SiNx is more preferable because of the higher resistance to plasma.
The first semiconductor device of the present invention is not especially limited as long as it includes the above-mentioned first and second circuit elements on the substrate as components. The first semiconductor device may or may not include other components.
Silicon (Si) is preferable as the material for the above-mentioned first and second semiconductor layers in view of a reduction in costs and mass production. Among these, polysilicon (p-Si) and continuous grain (CG) silicon and the like are more preferable in order to increase a mobility. The first semiconductor layer and the second semiconductor layer may be formed from different materials. However, it is preferable that they are formed from the same material in order to simplify the production steps. It is preferable that the above-mentioned first and second semiconductor layers are formed by a low-temperature process in order to suppress the glass substrate from shrinking. It is preferable that each of the above-mentioned first and second semiconductor layers have an island shape. Examples of the above-mentioned island shape include a rectangular parallelepiped shape, a truncated pyramid shape such as a truncated quadrangular pyramid, a truncated inverted pyramid shape, a truncated circular cone shape, and a truncated elliptical cone shape.
It is preferable that each of the above-mentioned first and second conductive layers includes a metal in order to suppress phonon vibration inside the first and second insulating films. For example, a multilayer structure of a compound including aluminum (Al), tantalum (Ta), tungsten (W), molybdenum (Mo), and the like, or a metal thereof can be used. The above-mentioned first and second conductive layers may be formed from the same material or different materials. Each of the above-mentioned first and second conductive layers may have a single-layer structure or a multilayer structure.
As the above-mentioned substrate, a substrate with an insulating property (insulating substrate) is preferable. For example, a glass substrate and a plastic substrate may be mentioned.
Preferable embodiments of the first semiconductor device in the present invention are mentioned in more detail below.
It is preferable that the upper part of the second insulating film includes a silicon nitride layer or a silicon oxide layer as the lowest layer. According to this, impurities adhering to the SiNx layer that is the uppermost layer in the lower part of the above-mentioned second insulating film can be trapped on the interface between the SiNx layer and the SiNx layer or the SiO2 layer that is the lowest layer in the upper part of the second insulating film. Accordingly, the reliability of the second circuit element can be improved. Therefore, the reliability of the first semiconductor device of the present invention can be more sufficiently secured. It is preferable that the third insulating film includes a silicon nitride layer or a silicon oxide layer as the lowest layer. According to this, the impurities adhering to the SiNx layer that is the uppermost layer of the above-mentioned first insulating film can be trapped on the interface between the SiNx layer and the SiNx layer or SiO2 layer that is the lowest layer of the third insulating film (in the part where the third insulating film is formed on the first insulating film, a part where the third insulating film is formed on the first insulating film with the first conductive layer therebetween is excluded). Accordingly, the reliability of the first circuit element can be improved. Therefore, the reliability of the first semiconductor device of the present invention can be more sufficiently secured.
It is more preferable that the upper part of the second insulating film includes a silicon nitride layer as the lowest layer. It is more preferable that the third insulating film includes a silicon nitride layer as the lowest layer. According to these, the films constituting the interface to which the impurities adhere are formed from the same material, and therefore, the matching property of the interface is excellent, which makes it difficult to generate charges.
It is preferable that the SiNx layer that is the uppermost layer of the above-mentioned first insulating film and the SiNx layer that is the lowest layer of the third insulating film are formed by the same method in order to more effectively obtain the operation and effects of the present invention. It is also preferable that the SiNx layer that is the lowest layer in the upper part of the above-mentioned second insulating film and the SiNx layer that is the uppermost layer in the lower part are formed by the same method in order to more effectively obtain the operation and effects of the present invention.
It is preferable that the first insulating film and the second insulating film include a silicon oxide layer as the lowest layer. The SiO2 layer can form an excellent interface with the semiconductor layer including silicon (Si) and the like. Therefore, the characteristics of the first and second circuit elements can be more improved.
It is preferable that the first insulating film and the lower part of the second insulating film have a structure in which a silicon oxide layer and a silicon nitride layer are stacked in this order, and the upper part of the second insulating film is a silicon nitride layer or a silicon oxide layer. The above-mentioned first insulating film and the lower part of the second insulating film have a structure in which a SiO2 layer and a SiNx layer are stacked in this order. Therefore, in the first insulating film, the impurities are trapped on the SiNx layer. In the second insulating film, the impurities are trapped on the interface between the SiNx layers or on the interface between the SiNx layer and the SiO2 layer. Therefore, the reliability of the first and second circuit elements can be further secured. According to this, in both of the first insulating film and the second insulating film, the SiO2 layer excellent in characteristics of the interface with the semiconductor layer including silicon (Si) and the like is formed as the lowest layer. Therefore, the characteristics of the first and second circuit elements can be further improved. In addition, the upper part of the above-mentioned second insulating film is a SiNx layer. Therefore, the second conductive layer can be formed by dry etching such as plasma etching without plasma-damaging the second insulating film. Accordingly, the reliability of the second insulating film is maintained, and simultaneously not only the second conductive layer but also the second circuit element can be finely formed.
In addition, because of the above-mentioned reason, it is more preferable that the above-mentioned first insulating film and the lower part of the second insulating film have a structure in which a silicon oxide layer and a silicon nitride layer are stacked in this order, and the upper part of the above-mentioned second insulating film is a silicon nitride layer.
It is preferable in the above-mentioned first semiconductor device that the first circuit element and the second circuit element are thin film transistors. According to this, mass production of a semiconductor device which includes the TFT capable of improving the performances and the TFT capable of increasing the withstand voltage on the same substrate and which sufficiently secures the reliability is permitted.
It is more preferable that the first circuit element is a thin film transistor in a driving circuit part, and the second circuit element is a thin film transistor in a pixel circuit part. According to the first semiconductor device (active matrix substrate), the driving circuit part can operate at a high-speed by using the first circuit element capable of improving the performances as a TFT in the driving circuit part. Further, a reduction in contrast or a reduction in image qualities in a panel can be suppressed by using the second circuit element capable of increasing a withstand voltage and reducing an off-state current as a TFT in the pixel circuit part.
If the above-mentioned first and second circuit elements are thin film transistors, it is preferable that the first circuit element or the second circuit element has a contact hole penetrating the silicon nitride layer. The above-mentioned SiNx layer has a resistance to plasma. Therefore, the contact hole can be formed by the following method without plasma-damaging the first semiconductor layer and the like. In a contact etching step, dry etching is performed within the range from the lower surface to the upper surface of the SiNx film, that is, such that the SiNx film remains on the etching surface, and then wet etching is performed. As a result, the reliability of the first or second circuit element can be more sufficiently secured. The use of the dry etching makes it possible to finely form not only the contact hole but also the first or second circuit element.
In the present description, the contact hole is a hole penetrating at least the gate insulating films of the first or second circuit element. A conductive layer is generally formed inside the contact hole and connected to the semiconductor layer. The dry etching may be reactive ion etching, but generally plasma etching.
It is preferable in the above-mentioned first semiconductor device that the first circuit element is a thin film transistor, and the second circuit element is a storage capacitor element. According to this, mass production of a semiconductor device which includes the TFT capable of improving the performances and the storage capacitor element capable of increasing the withstand voltage on the same substrate and which sufficiently secures the reliability is permitted.
It is preferable that the first circuit element is a thin film transistor in a driving circuit part, and the second circuit element is a storage capacitor element in a pixel circuit part. According to such a first semiconductor device (active matrix substrate), the driving circuit part can operate at a high speed by using the first circuit element capable of improving the performances as a TFT in the driving circuit part. In addition, a reduction in image qualities inside a panel can be suppressed by using the second circuit element capable of improving a withstand voltage as a storage capacitor element in the pixel circuit part.
The present invention is also a production method of the first semiconductor device, wherein the first insulating film and the lower part of the second insulating film are formed in the same step. According to this, the production steps can be simplified in comparison to the method in which the first insulating film and the lower part of the second insulating film are formed in different steps. It is preferable that the first insulating film and the lower part of the second insulating film are formed by a plasma CVD method.
The present invention is also a production method of the above-mentioned first semiconductor device, wherein at least part of the third insulating film and the upper part of the second insulating film are formed in the same step. According to this, the production steps can be simplified in comparison to the method in which at least part of the third insulating film and the upper part of the second insulating film are formed in different steps. In addition, it is preferable that at least part of the above-mentioned third insulating film and the upper part of the second insulating film are formed by a plasma CVD method. In order to more simplify the production steps, it is more preferable that the above-mentioned first insulating film and the lower part of the second insulating film are formed in the same step and at least part of the above-mentioned third insulating film and the upper part of the second insulating film are formed in the same step.
The second semiconductor device of the present invention is mentioned in more detail below.
The second semiconductor device of the present invention is a semiconductor device including a first circuit element and a second circuit element on a substrate, the first circuit element having a structure in which a first semiconductor layer, a first insulating film, and a first conductive layer are stacked in this order, and the second circuit element having a structure in which a second semiconductor layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second conductive layer are stacked in this order, wherein the second insulating film has a lower part and an upper part, the lower part includes a silicon nitride layer as the uppermost layer, and the upper part includes a structure of the first insulating film (for example, refer to
The first insulating film and the upper part of the second insulating film have a single-layer structure or a multilayer structure. The above-mentioned first insulating film and the upper part of the second insulating film may include a (integrated) layer formed in the same step. If the above-mentioned first insulating film and the upper part of the second insulating film have a multilayer structure, it is preferable that all of the layers constituting the first insulating film and the layers constituting the upper part of the second insulating film are formed in the same steps, respectively.
In addition, the lower part of the above-mentioned second insulating film may have a single-layer structure, but preferably a multilayer structure. If the above-mentioned lower part of the second insulating film has a multilayer structure, SiO2 and the like which forms an excellent interface with the second semiconductor layer can be selected as the material for the lowest layer (in the lower part) of the second insulating film. As a result, the second circuit element can secure excellent transfer characteristics and the like.
It is preferable that the above-mentioned first and second conductive layers are formed in the same step.
The preferable embodiments of the second semiconductor device of the present invention are the same as in the first semiconductor device of the present invention. The preferable embodiments in the above-mentioned second semiconductor device are mentioned below, but the detail explanation thereof is omitted because it is the same as in the first semiconductor device of the present invention.
It is preferable that the first circuit element includes a third insulating film below the first semiconductor layer, the lower part of the second insulating film has a structure of the third insulating film formed below the first semiconductor layer (for example, refer to
The above-mentioned third insulating film may have a single-layer structure or a multilayer structure. Examples of the configuration of the lower part of the second insulating film include a configuration (1) in which the lower part of the second insulating film has a structure of the middle part of the third insulating film, a configuration (2) in which it has a structure of the lower part of the third insulating film, a configuration (3) in which it has a structure of the upper part of the third insulating film, and a configuration (4) in which it has the entire structure of the third insulating film. In order to reduce the patterning steps and the like performed when the third insulating film is formed, the configurations (2) and (3) are preferable and the configuration (4) is more preferable.
It is preferable that the first insulating film and the upper part of the second insulating film include a silicon nitride layer or a silicon oxide layer as the lowest layer. According to this, the impurities adhering on the SiNx layer that is the uppermost layer in the lower part of the second insulating film can be trapped on the interface between the SiNx layers or on the interface between the SiNx layer and the SiO2 layer. The reliability of the first and second circuit elements can be more sufficiently secured.
It is preferable that the first insulating film and the second insulating film include a silicon oxide layer as the lowest layer. According to this, an excellent interface between the first semiconductor layer and the second semiconductor layer can be formed, and therefore the characteristics of the first and second circuit element can be further improved.
It is preferable that the first insulating film, the lower part of the second insulating film, and the upper part of the second insulating film have a structure in which a silicon oxide layer and a silicon nitride layer are stacked in this order. If the lowest layer of the first insulating film is a SiO2 layer, an excellent interface with the first semiconductor layer including silicon (Si) and the like can be formed. Therefore, the characteristics of the first circuit element can be further improved. Further, if the uppermost layer of the first insulating film is a SiNx layer, the first and second conductive layers can be formed by dry etching without plasma-damaging the first insulating film. Further, if the lowest layer in the lower part of the second insulating film is a SiO2 layer, an excellent interface with the second semiconductor layer including Si and the like can be formed. As a result, the characteristics of the second circuit element can be further improved. Further, if the uppermost layer in the lower part of the second insulating film is a SiNx layer, the first semiconductor layer can be formed by dry etching without plasma-damaging the second insulating film, and simultaneously, the impurities are trapped on this SiNx layer. As a result, the reliability of the second circuit element can be further secured. If the uppermost layer in the upper part of the second insulating film is a SiNx layer, the first and second conductive layers can be formed by dry etching without plasma-damaging the second insulating film.
It is preferable in the second semiconductor device that the first circuit element and the second circuit element are thin film transistors.
It is preferable that the first circuit element is a thin film transistor in a driving circuit part, and the second circuit element is a thin film transistor in a pixel circuit part.
If the above-mentioned first and second circuit elements are thin film transistors, it is preferable that the first circuit element or the second circuit element has a contact hole penetrating the silicon nitride layer.
It is preferable in the second semiconductor device that the first circuit element is a thin film transistor, and the second circuit element is a storage capacitor element.
It is preferable that the first circuit element is a thin film transistor in a driving circuit part, and the second circuit element is a storage capacitor element in a pixel circuit part.
According to these, the same operation and effects as in the first semiconductor device of the present invention can be obtained.
The present invention is further a production method of the above-mentioned second semiconductor device, wherein the first insulating film and the upper part of the second insulating film are formed in the same step.
The present invention is further a production method of the above-mentioned second semiconductor device, wherein at least part of the third insulating film and the lower part of the second insulating film are formed in the same step.
According to these production methods, the same operation and effects as in the production method of the first semiconductor device of the present invention can be obtained.
The third semiconductor device of the present invention is mentioned below in more detail.
The third semiconductor device of the present invention is a semiconductor device including a first circuit element and a second circuit element on a substrate, the first circuit element having a structure in which a first conductive layer, a first insulating film, and a first semiconductor layer are stacked in this order, the second circuit element having a structure in which a second conductive layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second semiconductor layer are stacked in this order, wherein the first insulating film has a structure in which the lowest layer is a silicon nitride layer, the second insulating film has a lower part and an upper part, and the upper part has the structure of the first insulating film (for example, refer to
Examples of the TFTs in the above-mentioned third semiconductor device include a TFT having a bottom-gate structure and a TFT having a dual-gate structure. A TFT having a bottom-gate structure is preferable.
The above-mentioned first insulating film and the upper part of the second insulating film may have a single-layer structure, but preferably have a multilayer structure. If the above-mentioned first insulating film has a multilayer structure, SiO2 and the like which forms an excellent interface with the first semiconductor layer can be selected independently from the material (SiNx) for the lowest layer of the first insulating film, as the material for the uppermost layer of the first insulating film. As a result, the first circuit element can secure excellent transfer characteristics and the like. Further, if the upper part of the above-mentioned second insulating film has a multilayer structure, SiO2 and the like which forms an excellent interface with the second semiconductor layer can be selected independently from the material (SiNx) for the lowest layer in the upper part of the second insulating film, as the material for the uppermost layer (in the upper part) of the second insulating film. As a result, the second circuit element also can secure excellent transfer characteristics and the like.
It is preferable that the lower part of the above-mentioned second insulating film is a silicon nitride layer as the lowest layer. According to this, diffusion of mobile ions such as Na from the substrate such as a glass substrate can be prevented, and the reliability of the second circuit element such as a TFT can be maintained.
The preferable embodiments of the third semiconductor device of the present invention are the same as in the first semiconductor device of the present invention. The preferable embodiments in the above-mentioned third semiconductor device are mentioned below, but the detail explanation thereof is omitted because it is the same as in the first semiconductor device of the present invention.
It is preferable that the first circuit element includes a third insulating film below the first conductive layer, and the lower part of the second insulating film has a structure of the third insulating film formed below the first conductive layer (for example, refer to
The structure of the above-mentioned third insulating film may be a single-layer structure or a multilayer structure. Examples of the configuration of the lower part of the second insulating film include a configuration (1) in which the lower part of the second insulating film has a structure of the middle part of the third insulating film, a configuration (2) in which it has a structure of the lower part of the third insulating film, a configuration (3) in which it has a structure of the upper part of the third insulating film, and a configuration (4) in which it has the entire structure of the third insulating film. The configurations (2) and (3) are preferable and the configuration (4) is more preferable in order to reduce the patterning steps and the like performed when the third insulating film is formed.
It is preferable that the lower part of the second insulating film includes a silicon nitride film as the uppermost layer.
It is preferable that the lower part of the second insulating film includes a silicon oxide film as the uppermost layer.
It is preferable that the first insulating film and the second insulating film include a silicon oxide layer as the uppermost layer.
It is preferable that the first insulating film and the upper part of the second insulating film have a structure in which a silicon nitride layer and a silicon oxide layer are stacked in this order, and the lower part of the second insulating film is a silicon nitride layer.
It is preferable that the first insulating film and the upper part of the second insulating film have a structure in which a silicon nitride layer and a silicon oxide layer are stacked in this order, and the lower part of the second insulating film is a silicon oxide layer.
It is preferable in the third semiconductor device that the first circuit element and the second circuit elements are thin film transistors.
It is preferable that the first circuit element is a thin film transistor in a driving circuit part and the second circuit element is a thin film transistor in a pixel circuit part.
It is preferable in the third semiconductor device that the first circuit element is a thin film transistor and the second circuit element is a storage capacitor element.
It is preferable that the first circuit element is a thin film transistor in a driving circuit part, and the second circuit element is a storage capacitor element in a pixel circuit part.
According to these, the same operation and effects as in the first semiconductor device of the present invention can be obtained.
The present invention is also a production method of the above-mentioned third semiconductor device, wherein the first insulating film and the upper part of the second insulating film are formed in the same step.
The present invention is further a production method of the above-mentioned third semiconductor device, wherein at least part of the third insulating film and the lower part of the second insulating film are formed in the same step. According to these production methods, the same operation and effects as in the production method of the first semiconductor device of the present invention can be obtained.
The fourth semiconductor device of the present invention is mentioned in more detail below.
The fourth semiconductor device of the present invention is a semiconductor device including a first circuit element and a second circuit element on a substrate, the first circuit element having a structure in which a first conductive layer, a first insulating film, and a first semiconductor layer are stacked in this order, the second circuit element having a structure in which a second conductive layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second conductive layer are stacked in this order, wherein the second insulating film includes a lower part and an upper part, the lower part has a structure of the first insulating film, and the upper part includes a silicon nitride layer as the lowest layer (for example, refer to
The fourth semiconductor device of the present invention is the same as in the above-mentioned third semiconductor device in that the lowest layer in the upper part of the second insulating film is a SiNx layer (for example, refer to
Examples of the TFTs in the above-mentioned fourth semiconductor device include a TFT having a bottom-gate structure and a TFT having a dual-gate structure. A TFT having a bottom-gate structure is preferable.
It is preferable that the above-mentioned first insulating film and the lower part of the second insulating film may have a single-layer structure, but preferably have a multilayer structure. In the case where the above-mentioned first insulating film has a multilayer structure, SiO2 and the like which forms an excellent interface with the first semiconductor layer can be selected as the material for the uppermost layer of the first insulating film even if a SiNx layer needs to be formed inside the first insulating film as mentioned below. As a result, the first circuit element can secure excellent transfer characteristics. Further, in the case where the lower part of the above-mentioned second insulating film has a multilayer structure, SiNx can be selected as a material for the lowest layer in the lower part of the second insulating film even if SiO2 and the like needs to be selected as a material for the uppermost layer of the first insulating film, that is, the uppermost layer in the lower part of the second insulating film. As a result, SiNx in the multilayer film prevents diffusion of mobile ions such as Na from the substrate such as a glass substrate. Therefore, the reliability of the second circuit element such as a TFT can be secured.
The upper part of the above-mentioned second insulating film may have a single-layer structure, but preferably has a multilayer structure. If the upper part of the above-mentioned second insulating film has a multilayer structure, SiO2 and the like which forms an excellent interface with the second semiconductor layer can be selected independently from the material (SiNx) for the lowest layer, as the material for the uppermost layer (in the upper part) of the second insulating film. As a result, the second circuit element also can secure excellent transfer characteristics.
In addition, it is preferable that the above-mentioned first and second conductive layers are formed in the same step.
The preferable embodiments of the fourth semiconductor device of the present invention are the same as in the first semiconductor device of the present invention. The preferable embodiments in the above-mentioned fourth semiconductor device are mentioned below, but the detail explanation thereof is omitted because it is the same as in the first semiconductor device of the present invention.
It is preferable that the first circuit element includes a third insulating film on the first semiconductor layer, and the upper part of the second insulating film has a structure of the third insulating film formed on the first semiconductor layer (for example, refer to
The above-mentioned third insulating film may have a single-layer structure or a multilayer structure. Examples of the configuration of the upper part of the above-mentioned second insulating film include a configuration (1) in which the upper part of the second insulating film has a structure of the middle part of the third insulating film, a configuration (2) in which it has a structure of the lower part of the third insulating film, a configuration (3) in which it has a structure of the upper part of the third insulating film, and a configuration (4) in which it has the entire structure of the third insulating film. In order to reduce the patterning steps and the like performed when the third insulating film is formed, the configurations (2) and (3) are preferable and the configuration (4) is more preferable.
It is preferable that the first insulating film and the lower part of the second insulating film include a silicon nitride layer as the uppermost layer.
It is preferable that the first insulating film and the lower part of the second insulating film include a silicon oxide layer as the uppermost layer.
It is preferable that the first insulating film and the second insulating film include a silicon oxide layer as the uppermost layer.
It is preferable that the first insulating film and the lower part of the second insulating film are silicon nitride layers, and the upper part of the second insulating film has a structure in which a silicon nitride layer and a silicon oxide layer are stacked in this order.
It is preferable that the first insulating film and the lower part of the second insulating film are silicon oxide layers, and the upper part of the second insulating film has a structure in which a silicon nitride layer and a silicon oxide layer are stacked in this order.
It is preferable in the above-mentioned fourth semiconductor device that the first circuit element and the second circuit element are thin film transistors.
It is preferable that the first circuit element is a thin film transistor in a driving circuit part, and the second circuit element is a thin film transistor in a pixel circuit part.
It is preferable in the above-mentioned fourth semiconductor device that the first circuit element is a thin film transistor and the second circuit element is a storage capacitor element.
It is preferable that the first circuit element is a thin film transistor in a driving circuit part, and the second circuit element is a storage capacitor element in a pixel circuit part.
According to these, the same operation and effects as in the first semiconductor device of the present invention can be obtained.
The present invention is further a production method of the above-mentioned fourth semiconductor device, wherein the first insulating film and the lower part of the second insulating film are formed in the same step.
The present invention is further a production method for the above-mentioned fourth semiconductor device, wherein at least part of the third insulating film and the upper part of the second insulating film are formed in the same step.
According to these production methods, the same operation and effects as in the production method of the first semiconductor device of the present invention can be obtained.
The present invention is also a display device including the above-mentioned first, second, third, or fourth semiconductor device. The first to fourth semiconductor devices of the present invention are excellent in reliability. Therefore, in the display device, a reduction in fraction defective or an improvement in yield is permitted. Further, the TFT in the pixel circuit part and the TFT in the peripheral circuit part can be formed on the same substrate. Therefore, a system-on-glass display device can be provided, and downsizing, a reduction in electric power consumption, and high reliability of the display device can be achieved. A liquid crystal display device, an organic electroluminescent display device and the like are preferable as the above-mentioned display device.
EFFECT OF THE INVENTIONAccording to the semiconductor device of the present invention, TFTs including gate insulating films having different thicknesses can be formed on the same substrate without plasma-damaging the gate insulating films and without diffusing impurities into the gate insulating films or the semiconductor layers. Therefore, the reliability can be sufficiently secured, and each TFT can improve the performances and increase the withstand voltage.
BEST MODES FOR CARRYING OUT THE INVENTIONThe present invention is mentioned in more detail below with respect to the following Embodiments, but not limited to only these Embodiments.
Embodiment 1As shown in
Production steps of an active matrix substrate in accordance with the present Embodiment are mentioned with reference to
As shown in
Then, as shown in
As shown in
Then, ultraviolet (UV) cleaning, ozone (O3) cleaning, hydrofluoric acid (HF) cleaning, water cleaning, alkali cleaning, and the like, is performed to remove the impurities and the organic film. Successively, as shown in
Then, using a sputtering method or a CVD method and the like, a metal film is deposited and then patterned using etching gas. As a result, as shown in
Then, UV cleaning, O3 cleaning, HF cleaning, water cleaning, alkali cleaning, and the like, is performed to remove the impurities and the organic film, and then, as shown in
As shown in
As shown in
Successively, annealing (activation annealing) is performed, thereby activating the injected impurities.
Then, as shown in
Then, contact etching is performed. Specifically, as shown in
Finally, as shown in
According to the production method of the present Embodiment, in the step of forming the gate electrodes 21a and 21b shown in
Therefore, according to the production method of the present Embodiment, an active matrix substrate with high reliability can be prepared.
Embodiment 2The active matrix substrate in accordance with the present Embodiment is the same as the active matrix substrate in Embodiment 1, except that driving circuit TFTs 100a and 100b have a self-alignment structure. That is, as shown in
The production steps of the active matrix substrate according to the present Embodiment are mentioned with reference to
First, the same steps as in
Then, as shown in
Then, UV cleaning, O3 cleaning, HF cleaning, water cleaning, alkali cleaning, and the like, is performed to remove the impurities and the organic film, and then, as shown in
As shown in
As shown in
Successively, annealing (activation annealing) is performed, thereby activating injected impurities.
Then, as shown in
Successively, the p-Si layers 15a to 15c are hydrogenated by annealing (hydrogenation annealing), thereby terminating a dangling bond.
Successively, contact etching is performed. Specifically, as shown in
Finally, as shown in
Also in accordance with the present Embodiment, the same operation and effects as in Embodiment 1 can be obtained because of the SiNx film 17.
Embodiment 3As shown in
The production steps of the active matrix substrate in accordance with the present Embodiment are mentioned below with reference to
First, the same steps as in
Then, a photoresist layer is formed on the SiO2 film 16 and the SiNx film 17, and then a region other than a region where a gate insulating film having a four-layer structure is to be formed is removed by wet etching. As a result, as shown in
Then, UV cleaning, O3 cleaning, HF cleaning, water cleaning, alkali cleaning, and the like, is performed to remove the impurities and the organic film. Successively, a SiO2 film 63 and a SiNx film 64 are formed, as shown in
As shown in
Then, as shown in
Successively, annealing (activation annealing) is performed, thereby activating the injected impurities.
Then, as shown in
Successively, the p-Si layers 15a to 15c are hydrogenated by annealing (hydrogenation annealing), thereby terminating a dangling bond.
Finally, as shown in
According to the production method of the present Embodiment, in the step of forming the gate electrodes 21a to 21c shown in
Therefore, according to the production method of the present Embodiment, an active matrix substrate with high reliability can be prepared.
Embodiment 4As shown in
The production steps of the active matrix substrate in accordance with the present Embodiment are mentioned with reference to
First, the same steps as in
Then, as shown in
Successively, annealing (activation annealing) is performed, thereby activating the injected impurities.
Then, UV cleaning, O3 cleaning, HF cleaning, water cleaning, alkali cleaning, and the like, is performed to remove the impurities and the organic film. Successively, a SiNx film 18 is formed as shown in
Then, a metal film is deposited by a sputtering method, a CVD method and the like, and then patterned using etching gas. As a result, a storage capacitor wiring (the second conductive layer) 31 is formed, as shown in
Then, as shown in
Successively, the p-Si layers 15a to 15c are hydrogenated by annealing (hydrogenation annealing), thereby terminating a dangling bond.
Successively, contact etching is performed. Specifically, as shown in
Finally, as shown in
Also according to the present Embodiment, the same operation and effects as in Embodiment 1 can be obtained because of the SiNx film 17.
Embodiment 5As shown in
The production steps of the active matrix substrate according to the present Embodiment are mentioned with reference to
First, a metal film is deposited on a glass substrate 10 by a sputtering method, a CVD method, or the like, and then patterned using etching gas. As a result, a gate electrode (the second conductive layer) 21c is formed, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
Then, as shown in
As shown in
Then, UV cleaning, O3 cleaning, HF cleaning, water cleaning, alkali cleaning, and the like, is performed to remove the impurities and the organic film. Successively, as shown in
Exposure to H2 plasma or H2 gas 2 may be performed after the SiO2 film 61 is formed.
Then, as shown in
Then, annealing (activation annealing) is performed, thereby activating the injected impurities.
Then, as shown in
Finally, as shown in
According to the production method of the present Embodiment, the SiNx film 17 and the SiNx film 18 are formed in different steps. Accordingly, impurities such as boron (B), sodium (Na), phosphorus (P), and a heavy metal adhere on the SiNx film 17. However, the SiNx film 18 has an impurity diffusion-preventing (barrier) function. Therefore, the impurities can be suppressed from diffusing into not only the SiO2 film 16 but also the p-Si layers 15a to 15c in the activation annealing step or the hydrogenation annealing step and the like.
Therefore, according to the production method of the present Embodiment, an active matrix substrate with high reliability can be prepared.
Embodiment 6As shown in
(Experiment) Plasma Resistance Comparison Test
In this Experiment, silicon oxide (SiO2) and silicon nitride (SiNx) are compared in resistance to plasma. Specifically, a TFT including a gate insulating film composed of a SiO2 layer with a thickness of 70 nm was prepared, and subjected to an oxygen (O2) plasma treatment (Inductively Coupled Plasma (ICP) conditions: Bias 400 W). This TFT was examined for a change in threshold voltage (Vth) characteristics by a BTS (bias temperature stress) test (BTS conditions: 150° C., +20V, for 30 minutes). In addition, the same test was performed for a TFT including a gate insulating film (EOT was about 70 nm) having a two-layer structure composed of a SiO2 layer (lower layer) with a thickness of 50 nm and a SiNx layer (upper layer) with a thickness of 40 nm.
If the O2 plasma treatment was not performed, a change between the Vth before the BTS test and the Vth after the BTS test was not observed in both of the TFT including a gate insulating film composed of a SiO2 layer and the TFT including a gate insulating film composed of a SiNx layer. However, if the O2 plasma treatment was performed, the Vth after the BTS test was shifted in the negative direction in comparison to the Vth before the BTS test in the TFT including a gate insulating film composed of a SiO2 layer, as shown in
The above results show that SiNx has an O2 plasma resistance higher than that of SiO2.
The present application claims priority under the Paris Convention and the domestic law in the country to be entered into national phase on Patent Application No. 2006-005402 filed in Japan on Jan. 12, 2006, the entire contents of which are hereby incorporated by reference.
The terms “or more” and “or less” mean that the described value is included. That is, the term “or more” means that the described value and values higher than the described value are included.
- 1: Laser light
- 2: Hydrogen (H2) plasma or H2 gas
- 3: Impurity
- 4a: The first gate insulating film (the first insulating film)
- 4c: Lower part of the second gate insulating film (the second insulating film)
- 5: The first gate electrode (the first conductive layer)
- 6a: The third insulating film (the lower, middle, or upper part of the third insulating film, or the entire third insulating film)
- 6c: Upper part of the second gate insulating film (the second insulating film)
- 7a: The lowest layer of the first gate insulating film (the first insulating film)
- 7c: The lowest layer in the lower part of the second gate insulating film (the second insulating film)
- 8: The second gate electrode (the second conductive layer)
- 8a: The first gate electrode (the first conductive layer)
- 8c: The second gate electrode (the second conductive layer)
- 9: The second gate insulating film (the second insulating film)
- 10: Glass substrate (substrate)
- 11: Hydrogen barrier and impurity diffusion-preventing film
- 12: Buffer film
- 13: Amorphous silicon (a-Si) film
- 14: Polysilicon (p-Si) film
- 15a, 15b: p-Si layer (the first semiconductor layer)
- 15c: p-Si layer (the second semiconductor layer)
- 16, 61, 63: Silicon oxide (SiO2) film
- 17, 18, 62, 64: Silicon nitride (SiNx) film
- 19, 68: Photoresist layer
- 21a, 21b: Gate electrode (the first conductive layer)
- 21c: Gate electrode (the second conductive layer)
- 22: Offset region
- 23a: N-type high-concentration impurity region
- 23b: N-type low-concentration impurity region (LDD region)
- 24a: P-type high-concentration impurity region
- 25: Interlayer insulating film
- 27a to 27c: Contact hole
- 28a to 28c: Source electrode
- 31: Storage capacitor wiring (the second conductive layer)
- 35: Metal film
- 41a to 41c: Upper gate electrode
- 50a: The first TFT (the first circuit element)
- 50c: The second TFT (the second circuit element)
- 70a: The first gate insulating film (the first insulating film)
- 70b: The third insulating film (the lower, middle, or upper part of the third insulating film, or the entire third insulating film)
- 70c: The second gate insulating film (the second insulating film)
- 71: Lower part of the second gate insulating film (the second insulating film)
- 72: Upper part of the second gate insulating film (the second insulating film)
- 100a and 400a: N-channel driving circuit TFT (the first circuit element)
- 100b, 400b: P-channel driving circuit TFT (the first circuit element)
- 200, 500: Pixel switching TFT (the second circuit element)
- 300: Storage capacitor element (the second circuit element)
- 700: SiNx film
- 900: SiO2 film
Claims
1. A semiconductor device comprising a first circuit element and a second circuit element on a substrate,
- the first circuit element having a structure in which a first semiconductor layer, a first insulating film, a first conductive layer, and a third insulating film are stacked in this order,
- the second circuit element having a structure in which a second semiconductor layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second conductive layer are stacked in this order,
- wherein the first insulating film has a multilayer structure including a silicon nitride layer as the uppermost layer,
- the second insulating film has a lower part and an upper part,
- the lower part includes the multilayer structure of the first insulating film, and
- the upper part includes a structure of the third insulating film formed on the first conductive layer.
2. The semiconductor device according to claim 1,
- wherein the upper part of the second insulating film includes a silicon nitride layer as the lowest layer.
3. The semiconductor device according to claim 1,
- wherein the upper part of the second insulating film includes a silicon oxide layer as the lowest layer.
4. The semiconductor device according to claim 1,
- wherein the first insulating film and the second insulating film include a silicon oxide layer as the lowest layer.
5. The semiconductor device according to claim 1,
- wherein the first insulating film and the lower part of the second insulating film have a structure in which a silicon oxide layer and a silicon nitride layer are stacked in this order, and
- the upper part of the second insulating film is a silicon nitride layer.
6. The semiconductor device according to claim 1,
- wherein the first insulating film and the lower part of the second insulating film have a structure in which a silicon oxide layer and a silicon nitride layer are stacked in this order, and
- the upper part of the second insulating film is a silicon oxide layer.
7. The semiconductor device according to claim 1,
- wherein the first circuit element and the second circuit element are thin film transistors.
8. The semiconductor device according to claim 7,
- wherein the first circuit element is a thin film transistor in a driving circuit part, and
- the second circuit element is a thin film transistor in a pixel circuit part.
9. The semiconductor device according to claim 1,
- wherein the first circuit element or the second circuit element has a contact hole penetrating the silicon nitride layer.
10. The semiconductor device according to claim 1,
- wherein the first circuit element is a thin film transistor, and the second circuit element is a storage capacitor element.
11. The semiconductor device according to claim 10,
- wherein the first circuit element is a thin film transistor in a driving circuit part, and
- the second circuit element is a storage capacitor element in a pixel circuit part.
12. A display device comprising the semiconductor device of claim 1.
13. A semiconductor device comprising a first circuit element and a second circuit element on a substrate,
- the first circuit element having a structure in which a first semiconductor layer, a first insulating film, and a first conductive layer are stacked in this order, wherein the first circuit element includes a third insulating film on the first semiconductor layer, and
- the second circuit element having a structure in which a second semiconductor layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second conductive layer are stacked in this order,
- wherein the second insulating film has a lower part and an upper part,
- the lower part includes a silicon nitride layer as the uppermost layer, and
- the upper part includes a structure of the first insulating film.
14. The semiconductor device according to claim 13,
- wherein the first circuit element includes a third insulating film below the first semiconductor layer, and
- the lower part of the second insulating film has a structure of the third insulating film formed below the first semiconductor layer.
15. The semiconductor device according to claim 13,
- wherein the first insulating film and the upper part of the second insulating film include a silicon nitride layer as the lowest layer.
16. The semiconductor device according to claim 13,
- wherein the first insulating film and the upper part of the second insulating film include a silicon oxide layer as the lowest layer.
17. The semiconductor device according to claim 13,
- wherein the first insulating film and the second insulating film include a silicon oxide layer as the lowest layer.
18. The semiconductor device according to claim 13,
- wherein the first insulating film, the lower part of the second insulating film, and the upper part of the second insulating film have a structure in which a silicon oxide layer and a silicon nitride layer are stacked in this order.
19. The semiconductor device according to claim 13,
- wherein the first circuit element and the second circuit element are thin film transistors.
20. The semiconductor device according to claim 19,
- wherein the first circuit element is a thin film transistor in a driving circuit part, and
- the second circuit element is a thin film transistor in a pixel circuit part.
21. The semiconductor device according to claim 13,
- wherein the first circuit element or the second circuit element has a contact hole penetrating the silicon nitride layer.
22. The semiconductor device according to claim 13,
- wherein the first circuit element is a thin film transistor, and
- the second circuit element is a storage capacitor element.
23. The semiconductor device according to claim 22,
- wherein the first circuit element is a thin film transistor in a driving circuit part, and
- the second circuit element is a storage capacitor element in a pixel circuit part.
24. A semiconductor device comprising a first circuit element and a second circuit element on a substrate,
- the first circuit element having a structure in which a first conductive layer, a first insulating film, and a first semiconductor layer are stacked in this order, wherein the first circuit element includes a third insulating film on the first semiconductor layer,
- the second circuit element having a structure in which a second conductive layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second semiconductor layer are stacked in this order,
- wherein the first insulating film has a structure in which the lowest layer is a silicon nitride layer,
- the second insulating film has a lower part and an upper part, and
- the upper part has the structure of the first insulating film.
25. The semiconductor device according to claim 24,
- wherein the first circuit element includes a third insulating film below the first conductive layer, and
- the lower part of the second insulating film has a structure of the third insulating film formed below the first conductive layer.
26. The semiconductor device according to claim 24,
- wherein the lower part of the second insulating film includes a silicon nitride layer as the uppermost layer.
27. The semiconductor device according to claim 24,
- wherein the lower part of the second insulating film includes a silicon oxide layer as the uppermost layer.
28. The semiconductor device according to claim 24,
- wherein the first insulating film and the second insulating film include a silicon oxide layer as the uppermost layer.
29. The semiconductor device according to claim 24,
- wherein the first insulating film and the upper part of the second insulating film have a structure in which a silicon nitride layer and a silicon oxide layer are stacked in this order, and
- the lower part of the second insulating film is a silicon nitride layer.
30. The semiconductor device according to claim 24,
- wherein the first insulating film and the upper part of the second insulating film have a structure in which a silicon nitride layer and a silicon oxide layer are stacked in this order, and
- the lower part of the second insulating film is a silicon oxide layer.
31. The semiconductor device according to claim 24,
- wherein the first circuit element and the second circuit elements are thin film transistors.
32. The semiconductor device according to claim 31,
- wherein the first circuit element is a thin film transistor in a driving circuit part and
- the second circuit element is a thin film transistor in a pixel circuit part.
33. The semiconductor device according to claim 24,
- wherein the first circuit element is a thin film transistor, and
- the second circuit element is a storage capacitor element.
34. The semiconductor device according to claim 33,
- wherein the first circuit element is a thin film transistor in a driving circuit part, and
- the second circuit element is a storage capacitor element in a pixel circuit part.
35. A semiconductor device comprising a first circuit element and a second circuit element on a substrate,
- the first circuit element having a structure in which a first conductive layer, a first insulating film, and a first semiconductor layer are stacked in this order, wherein the first circuit element includes a third insulating film on the first semiconductor layer,
- the second circuit element having a structure in which a second conductive layer, a second insulating film having a thickness larger than a thickness of the first insulating film, and a second semiconductor layer are stacked in this order,
- wherein the second insulating film includes a lower part and an upper part,
- the lower part has a structure of the first insulating film, and
- the upper part includes a silicon nitride layer as the lowest layer.
36. The semiconductor device according to claim 35,
- wherein the first circuit element includes a third insulating film on the first semiconductor layer, and
- the upper part of the second insulating film has a structure of the third insulating film formed on the first semiconductor layer.
37. The semiconductor device according to claim 35,
- wherein the first insulating film and the lower part of the second insulating film include a silicon nitride layer as the uppermost layer.
38. The semiconductor device according to claim 35,
- wherein the first insulating film and the lower part of the second insulating film include a silicon oxide layer as the uppermost layer.
39. The semiconductor device according to claim 35,
- wherein the first insulating film and the second insulating film include a silicon oxide layer as the uppermost layer.
40. The semiconductor device according to claim 35,
- wherein the first insulating film and the lower part of the second insulating film are silicon nitride layers, and
- the upper part of the second insulating film has a structure in which a silicon nitride layer and a silicon oxide layer are stacked in this order.
41. The semiconductor device according to claim 35,
- wherein the first insulating film and the lower part of the second insulating film are silicon oxide layers, and
- the upper part of the second insulating film has a structure in which a silicon nitride layer and a silicon oxide layer are stacked in this order.
42. The semiconductor device according to claim 35,
- wherein the first circuit element and the second circuit element are thin film transistors.
43. The semiconductor device according to claim 42,
- wherein the first circuit element is a thin film transistor in a driving circuit part, and
- the second circuit element is a thin film transistor in a pixel circuit part.
44. The semiconductor device according to claim 35,
- wherein the first circuit element is a thin film transistor, and
- the second circuit element is a storage capacitor element.
45. The semiconductor device according to claim 44,
- wherein the first circuit element is a thin film transistor in a driving circuit part, and
- the second circuit element is a storage capacitor element in a pixel circuit part.
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Type: Grant
Filed: Sep 6, 2006
Date of Patent: Apr 20, 2010
Patent Publication Number: 20090159894
Assignee: Sharp Kabushiki Kaisha (Osaka)
Inventor: Takuto Yasumatsu (Tenri)
Primary Examiner: Calvin Lee
Attorney: Nixon & Vanderhye, P.C.
Application Number: 12/093,791
International Classification: H01L 21/8228 (20060101); H01L 29/768 (20060101);