Ultra broadband 10-W CW integrated limiter
The invention provides a novel broadband power limiter having improved frequency characteristics and power capacity, suitable for use with GaAs low-noise amplifier circuits. The power limiter includes a shunt diode circuit and two impedance transformers. The first transformer is a step-down impedance transformer connected between the shunt diode circuit and the input to the limiter, and the second transformer is a step-up impedance transformer connected between the shunt diode circuit and the output of the limiter. The invention further provides a method for limiting the power of an input signal, comprising the steps of: transforming the input signal from the input impedance to an intermediate impedance; shunting a portion of the input signal to ground; and transforming a remaining portion of the input signal from the intermediate impedance to an output impedance. The invention further provides a novel impedance transformer suitable for use in the broadband power limiter and a method for providing such an impedance transformer.
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The present invention relates to a limiter for use in microwave communication systems.
BACKGROUND OF THE INVENTIONMonolithic microwave integrated circuits (“MMICs”) are widely used in commercial and military microwave systems. Due to the fine geometry used in MMIC transistors, these circuits are susceptible to damage from high-power spurious electromagnetic radiation, e.g., from microwave transmitters or nuclear electromagnetic pulses. In particular, low-noise amplifiers (“LNAs”) in the front-end of such microwave systems need high-power protection because these amplifiers can typically sustain only input power levels in the range of 10 to 20 dBm for a continuous-wave (“CW”) input signal, or from 1 to 3 μJ for a pulsed input signal. For this reason, many radar, electronic warfare (“EW”), navigation and communication systems require ultra broadband high power limiters with low insertion loss, fast recovery time and low leakage output power. At present, however, no broadband 10-W CW limiter product is available that is capable of working over a 2-20 GHz frequency band.
Existing broadband limiter products are typically capable of handling only about one to three watts of CW power, and have a high insertion loss of about 2 dB, a long recovery time of about 1000 ns (or about 1 μs) and a high leakage output power of about 20 dBm. To protect highly sensitive MMIC circuits, however, a high power limiter with less than 0.3 dB insertion loss is needed. Moreover, it is desirable for the power limiter technology to be compatible with existing LNA technology (typically GaAs), so that the limiter circuit may be integrated onto the same GaAs chip as the LNA circuit. Finally, good broadband performance of the limiter is also a requirement in order to cover the frequency range of operation.
SUMMARY OF THE INVENTIONBriefly described, the invention provides a novel broadband power limiter having improved frequency characteristics and power capacity, suitable for use with GaAs low-noise amplifier circuits. Like conventional power limiters, the broadband power limiter of the invention is based on one or more shunt diodes connected between a signal line to be protected and ground. The broadband power limiter in accordance with the invention, however, further includes two impedance transformers—a step-down impedance transformer at the input of the limiter (before the one or more shunt diodes) and a step-up impedance transformer at the output of the limiter (after the one or more shunt diodes).
Thus, in a first aspect, the invention provides a power limiter for limiting the power of an input signal, comprising: an input terminal capable of receiving the input signal; an output terminal; a shunt diode circuit; a first impedance transformer connected between the shunt diode circuit and the input terminal; and a second impedance transformer connected between the shunt diode circuit and the output terminal.
In another aspect, the invention provides a method for limiting the power of an input signal having an input impedance. The method comprises the steps of: transforming the input signal from the input impedance to an intermediate impedance; shunting a portion of the input signal to ground; and transforming a remaining portion of the input signal from the intermediate impedance to an output impedance.
In yet another aspect, the invention provides an impedance transformer, comprising a first node, a second node, a ground node, and a rectangular array of at least four conductors connected between the first node, the second node, and the ground node, wherein each conductor in the array is electromagnetically coupled to each other conductor in the array by at least one of side-coupling and broadside coupling.
In still another aspect, the invention provides a method for providing an impedance transformer, comprising providing a first node, providing a second node, providing a ground node, and providing a rectangular array of at least four conductors connected between the first node, the second node, and the ground node, wherein each conductor in the array is electromagnetically coupled to each other conductor in the array by at least one of side-coupling and broadside coupling.
These and other features of the invention will be more fully understood by references to the following drawings.
With reference to
Because the shunt diodes D1, D2 in the broadband power limiter of the invention are connected at the lower-impedance node between the two impedance transformers, the shunt diode reactance-to-line impedance ratio (X/L) is much larger than in existing limiters. As a result, correspondingly larger-area, high-capacitance (and low-reactance) shunt diodes may be used in the power limiter, providing a greatly improved capacity to pass shunt current, as well as an improved frequency pass band (e.g., about 2 GHz to about 20 GHz). In addition, because the impedance transformers may be made from integrated components, the broadband power limiter of the present invention may be monolithically integrated, either alone as a stand-alone product, or with other circuit components such as a low-noise amplifier.
The limiter circuit 120 is preferably a 3-stage Schottky diode limiter as shown in
Each of impedance transformers 110, 130 may be a impedance transformer based on a ladder network or on a transmission line transformer (TLT) having straight or coiled sections of inter-connected transmission lines. The use of a TLT is generally preferable over a ladder-network transformer, in order to provide multi-octave impedance transformation at RF frequencies and at the low end of the microwave frequencies. Further, where the input signal is an unbalanced or single-ended signal (e.g., as shown in
In this 9:4 transformer configuration, due to the close proximity of conductors A, B, C and D, both of the currents passing through conductor A from node 1 toward node 2 and through conductor C from node 1 toward node 3 advantageously (a) induce current to flow in conductor B that is opposite in polarity to the current ordinarily tending to flow from node 3 through conductor B to ground, and (b) further induce current to flow in conductor D that is the same in polarity to the current ordinarily tending to flow in conductor D. As a result of the current splitting that occurs at node 1 as well as at node 3, and as a further result of the various effects of the anti-parallel current flow through conduct B and the parallel current flow through conductors A, C and D, a 9:4 impedance transformation is obtained. Further, because conductors A, B, C and D are in such close proximity, the resulting coupling coefficients are very large. As a result, the coupled 9:4 impedance transformer 700 has an excellent bandwidth and a small size (e.g., length L in
In practice, broadside-coupled TLTs are difficult to design accurately using conventional circuit simulators, because the substrate and the conductors are of multilayer type. However, the inventor has determined that accurate solutions can be obtained by using an electromagnetic simulator, e.g., the em™ high-frequency electromagnetic software available from Sonnet Software, Inc. Suitable substrate parameters for the 4:1 impedance transformer 400, the 9:1 impedance transformer 600 and the 9:4 impedance transformer 700 are given in Table 1 below.
For the sake of comparison, the inventor simulated four microstrip 50-ohm-to-12.5-ohm (4:1) transformer configurations, including a single-section TLT, a TLT having non-coupled conductors, a TLT having side-coupled conductors, and a TLT having broadside-coupled lines. For these transformers,
Table 2 below compares the simulated bandwidths of these four microstrip transformer configurations for three cases of return loss: 10, 15 and 20 dB. The bandwidth of a transformer is defined in terms of return loss RL i.e. the frequency range over which the return loss RL is equal or greater the specified value. The fractional bandwidth FBW is defined as below:
Δf=fh−fl, f0=√{square root over (flfh)} (2)
where fl and fh are the low and high end of the frequency band, and f0 is the center frequency as defined above. It will be recognized that although the simulated examples are for a real 50-ohm impedance to a real 12.5-ohm impedance, the broadside-coupled TLT may also be used to transform a complex impedance to real impedance or vice versa as well as complex to complex impedance. It may be seen from the simulated results shown in Table 2 below that among these four transformers, the broadside-coupled TLT provided the largest bandwidth and had the shortest line length.
The overall die area required by microstrip-based TLTs may be further reduced by folding the lines in a coil or loop shape, because the line width is much narrower than the length, especially in the broadside-coupled TLT. Further, by cascading two sections of 4:1 transformers in series, a 50-ohm input impedance may be matched to a 3.1-ohm output impedance over very large bandwidths.
Various structural parameters for broadside-coupled TLTs for use in the present invention have been studied. In particular, the effect of polyimide thickness d in
The inventor also simulated the effect of the microstrip width of conductors A and B in
The fractional bandwidth of a broadside-coupled 4:1 TLT as a function of source impedance of the TLT was also calculated for three microstrip widths: 20, 40 and 60 μm. The calculated values are shown in
Because polyimide has about 20 times the thermal resistance of GaAs (0.2 W/m-° C. for polyimide versus approximately 4.6 W/m-° C. for GaAs), it has be determined that there is a risk of thermal burnout of passive elements under high power conditions. (See, e.g., I. J. Bahl, “Average Power Handling Capability of Multilayer Microstrip Lines”, Int. J. RF and Microwave Computer-Aided Engineering, Vol. 11, pp. 385-395, November 2001.) Thus, to ensure the reliable operation of the broadside-coupled TLT for high power limiter applications, the broadside-coupled TLT should preferably be thermally modeled.
Since conductors A and B are thermally in direct contact with the GaAs substrate, the average power handling capability (“APHC”) is not compromised by the small distance d between conductors A and B that is preferable in order to achieve tight coupling. The average power handling capability of such transformers is approximately the same as other microstrip lines having similar line and substrate parameters.
The high-power 1:4 TLT of
Exemplary embodiments of the high-power 1:4 TLT of
Returning to the limiter of the present invention, and based on the high-power 1:4 TLT described above, the inventor has successfully designed and simulated a broadband high-power (e.g., 10-watt CW) limiter in accordance with the invention, using the MSAG® MLP process on 3-mil-thick GaAs substrate. The width W2 of conductors A and B are preferably about 40 μm and about 1400 μm, respectively.
The high-power limiter of the present invention provides excellent electrical characteristics.
The high-power limiter of the present invention may advantageously be integrated on the same monolithic integrated circuit (MMIC) with a conventional GaAs-based low-noise amplifier. The recovery time for a 10-W high-power limiter with an integrated LNA may be calculated to be on the order of about 35 ns (based on conventional recovery time calculations such as those described by J. Looney, D. Conway and I. Bahl in “An Examination of Recovery Time of an Integrated Limiter/LNA,” IEEE Microwave Magazine, Vol. 5, pp. 83-86, March 2004). By comparison, conventional PIN diode limiters typically have a recovery time of approximately a microsecond (1 μs). Moreover, because the present invention may be implemented as a passive device without a biasing network, it may be expected that the recovery time will be even faster than about 35 ns.
Although the invention has been described in language specific to various structural features and/or methodological acts, it is to be understood that the invention defined in the appended claims is not necessarily limited to the specific features or acts described. Rather, the specific features and acts described above are disclosed as exemplary forms of implementing the invention claimed below.
Claims
1. A power limiter for limiting the power of an input signal, comprising:
- (a) an input terminal capable of receiving the input signal;
- (b) an output terminal;
- (c) a step-down impedance transformer connected to the input terminal for reducing impedance;
- (d) a step-up impedance transformer connected to the output terminal for increasing impedance; and
- (e) a diode limiter connected to ground and between said step-down impedance transformer and said step-up impedance transformer.
2. The power limiter of claim 1, wherein the diode limiter includes one or more diode stages, wherein each stage includes a forward-biased diode connected to ground and a reverse-biased diode connected to ground.
3. The power limiter of claim 1, wherein the step-down and step-up impedance transformers are single-ended transformers.
4. The power limiter of claim 1, wherein the step-down impedance transformer is an n:1 transformer and the step-up impedance transformer is a 1:n transformer, wherein n is one of 4 and 9.
5. The power limiter of claim 4, wherein the step-down impedance transformer transforms a 50-ohm input impedance to a 12.5-ohm impedance and the step-up impedance transformer transforms the 12.5-ohm impedance to a 50-ohm output impedance.
6. The power limiter of claim 4, wherein the step-down impedance transformer transforms a 75-ohm input impedance to an 18.75-ohm impedance and the step-up impedance transformer transforms the 18.75-ohm impedance to a 75-ohm output impedance.
7. The power limiter of claim 1, wherein at least one of the step-down and step-up impedance transformers includes:
- (a) a first node;
- (b) a second node;
- (c) a first conductor connected between the first node and the second node; and
- (d) a second conductor connected between the second node and a ground node.
8. The power limiter of claim 7, wherein:
- (a) the first conductor and the second conductor are electromagnetically coupled by one of side coupling and broadside coupling, and
- (b) the first and second conductors are connected in an anti-parallel configuration such that a current passing through the first conductor creates an electromagnetic field in the second conductor that tends to resist current flow through the second conductor.
9. The power limiter of claim 7, wherein the at least one of the step-down and step-up impedance transformers further includes a third conductor and a fourth conductor located in proximity to, and forming a rectangular array with, the first and second conductors, such that:
- (a) the first conductor and the third conductor in the rectangular array are electromagnetically coupled to each other by side coupling, and
- (b) the second and fourth conductors in the rectangular array are electromagnetically coupled to each other by side coupling, and further coupled to the first and the third conductors by broadside coupling.
10. The power limiter of claim 9, wherein:
- (a) the third conductor is connected to the first node,
- (b) the third and fourth conductors are connected to each other in a parallel configuration such that a current passing through the third conductor creates an electromagnetic field in the fourth conductor that tends to induce current flow through the fourth conductor, and
- (c) the fourth conductor is connected to ground.
11. The power limiter of claim 7, wherein at least one of the step-down and step-up impedance transformers is disposed in an integrated circuit.
12. The power limiter of claim 11, wherein
- (a) the integrated circuit includes a substrate, a ground plane in contact with the substrate, and a dielectric layer, and
- (b) the at least one of the step-down and step-up impedance transformers is configured such that (i) the second conductor is in contact with the substrate and (ii) the first conductor is positioned above the second conductor and separated from the second conductor by the dielectric layer.
13. The power limiter of claim 12, wherein the first conductor includes a flange portion that extends to the substrate, thereby improving heat flow from the first conductor to the GaAs substrate.
14. The power limiter of claim 1, wherein the diode limiter and the step-down and step-up impedance transformers are integrated on a single monolithic integrated circuit.
15. The power limiter of claim 1, wherein the power limiter is capable of limiting an input signal having a power of up to 10 watts continuous-wave.
16. The power limiter of claim 1, wherein the power limiter is capable of limiting an input signal having a frequency between about 2 GHz and about 20 GHz.
17. The power limiter of claim 1, further comprising:
- (a) a low-noise amplifier connected to the output terminal.
18. A method for limiting the power of an input signal having an input impedance, comprising the steps of:
- (a) stepping-down the impedance of the input signal from the input impedance to an intermediate impedance;
- (b) shunting a portion of the input signal to ground, while at said intermediate impedance; and
- (c) stepping-up the impedance of a remaining portion of the input signal from the intermediate impedance to an output impedance.
19. The power limiter of claim 1, wherein at least the step-down or step-up impedance transformer, comprises:
- (a) a first node;
- (b) a second node;
- (c) a ground node; and
- (d) a rectangular array of at least four conductors connected between the first node, the second node, and the ground node, wherein each conductor in the array is electromagnetically coupled to each other conductor in the array by at least one of side-coupling and broadside coupling.
20. The power limiter of claim 19, wherein:
- (a) the first conductor and the third conductor in the rectangular array of at least four conductors are electromagnetically coupled to each other by side coupling, and
- (b) the second and fourth conductors in the rectangular array are electromagnetically coupled to each other by side coupling, and further coupled to the first and the third conductors by broadside coupling.
21. The power limiter of claim 20, wherein the first and second conductors are connected to each other in an anti-parallel configuration such that a current passing through the first conductor creates an electromagnetic field in the second conductor that tends to resist current flow through the second conductor.
22. The power limiter of claim 21, wherein the third and fourth conductors are connected to each other in a parallel configuration such that a current passing through the third conductor creates an electromagnetic field in the fourth conductor that tends to induce current flow through the fourth conductor.
23. The power limiter of claim 22, wherein:
- (a) the first node is connected to a first end of the first conductor and to a first end of the third conductor,
- (b) the second end of the first conductor is connected to the second node;
- (c) the second end of the third conductor is connected to a first end of the second conductor and to a first end of the fourth conductor; and
- (d) both the second end of the second conductor and the second end of the fourth conductor are connected to ground.
24. The power limiter of claim 23, wherein the rectangular array provides a 9:4 impedance transformation between the first node and the second node.
25. The power limiter of claim 20, wherein the array of at least four conductors is disposed in an integrated circuit.
26. The power limiter of claim 1, wherein the step-down impedance transfer reduces impedance from a first impedance to a second impedance, and the step-up impedance transformer increases the second impedance back to the first impedance.
27. The method of claim 18, wherein the input impedance and the output impedance are about the same.
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Type: Grant
Filed: Dec 29, 2006
Date of Patent: May 25, 2010
Patent Publication Number: 20080157896
Assignee:
Inventor: Inder Jit Bahl (Roanoke, VA)
Primary Examiner: Stephen W Jackson
Assistant Examiner: Zeev Kitov
Attorney: Jaeckle, Fleischmann & Mugel, LLP
Application Number: 11/618,369
International Classification: H02H 3/20 (20060101); H02H 9/04 (20060101);