Semiconductor element

- Kabushiki Kaisha Toshiba
Skip to: Description  ·  Claims  ·  References Cited  · Patent History  ·  Patent History
Description

FIG. 1 is a front, bottom and right side perspective view of a semiconductor element showing our new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a right side elevational view thereof; a left side view being a mirror image thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a rear elevational view thereof;

FIG. 6 is a bottom plan view thereof;

FIG. 7 is a front, bottom and right side perspective view of a second embodiment of the semiconductor element;

FIG. 8 is a front elevational view thereof;

FIG. 9 is a right side elevational view thereof; a left side elevational view being a mirror image thereof;

FIG. 10 is a top plan view thereof;

FIG. 11 is a rear elevational view thereof; and,

FIG. 12 is a bottom plan view thereof.

Claims

The ornamental design for a semiconductor element, as shown and described.

Referenced Cited
U.S. Patent Documents
D345731 April 5, 1994 Owens et al.
D359028 June 6, 1995 Siegel et al.
D396847 August 11, 1998 Nakayama et al.
D427977 July 11, 2000 Takizawa et al.
D432097 October 17, 2000 Song et al.
Foreign Patent Documents
1004664 March 1998 JP
Other references
  • Extract of Denpa Shimbun (Newspaper), Oct. 2, 1999.
Patent History
Patent number: D444132
Type: Grant
Filed: Aug 23, 2000
Date of Patent: Jun 26, 2001
Assignee: Kabushiki Kaisha Toshiba (Kawasaki)
Inventors: Masaaki Iwanishi (Himeji), Toshihisa Inoue (Yokohama), Kazuhiko Kurahashi (Yokohama), Kenji Suzuki (Tokyo), Shinjiro Yano (Matsutou)
Primary Examiner: Brian N. Vinson
Attorney, Agent or Law Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 29/128,169
Classifications
Current U.S. Class: Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;