Semiconductor device
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Description
FIG. 1 is a front, top and right side perspective view of a semiconductor device, showing our new design;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a rear elevational view thereof;
FIG. 4 is a top plan view thereof;
FIG. 5 is a bottom plan view thereof;
FIG. 6 is a left side elevational view thereof; and,
FIG. 7 is a right side elevational view thereof.
Claims
The ornamental design for a semiconductor device, as shown.
Referenced Cited
U.S. Patent Documents
Other references
D358806 | May 30, 1995 | Siegel et al. |
D396213 | July 21, 1998 | Enomoto et al. |
D401912 | December 1, 1998 | Majumdar et al. |
D421969 | March 28, 2000 | Kawafuji et al. |
5220298 | June 15, 1993 | Nagase |
- Catalogue of Sanken Electronics Co., Ltd., “Sanken Silicon Power MOS FET Array SLA5075 (LF853),” Specification No. SSE-21515, pp. 1-8 (with English Translation) (Undated).
- Catalogue of Sanken Electric Co., Ltd., “Sanken Silicon Power MOS FET Array SLA5056,” Specification No. SSE-21259, pp. 1-7 (with English Translation) (Undated).
- Catalogue of Toshiba Corp., “Semi Conductor Device” (Undated).
Patent History
Patent number: D448740
Type: Grant
Filed: Mar 9, 2001
Date of Patent: Oct 2, 2001
Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo)
Inventors: Mitsutaka Iwasaki (Tokyo), Hitoshi Toda (Tokyo), Hisashi Kawafuji (Fukuoka)
Primary Examiner: Brian N. Vinson
Attorney, Agent or Law Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 29/138,197
Type: Grant
Filed: Mar 9, 2001
Date of Patent: Oct 2, 2001
Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo)
Inventors: Mitsutaka Iwasaki (Tokyo), Hitoshi Toda (Tokyo), Hisashi Kawafuji (Fukuoka)
Primary Examiner: Brian N. Vinson
Attorney, Agent or Law Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 29/138,197
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;
International Classification: 1303;