Semiconductor device

- Kabushiki Kaisha Toshiba
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Description

FIG. 1 is a front, bottom and right side perspective view of a semiconductor device, showing our new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is top plan view thereof; a bottom plan view being a mirror image thereof;

FIG. 4 is a right side elevational view thereof; a left side elevational view being a mirror image thereof; and,

FIG. 5 is a rear elevational view thereof.

Claims

The ornamental design for a semiconductor device, as shown and described.

Referenced Cited
U.S. Patent Documents
D259559 June 16, 1981 Mochizuki et al.
5105257 April 14, 1992 Michii
5309018 May 3, 1994 Shibata
5585670 December 17, 1996 Isshiki et al.
5925927 July 20, 1999 Orcutt
D416872 November 23, 1999 Burke
6020625 February 1, 2000 Qin et al.
6093957 July 25, 2000 Kwon
6177718 January 23, 2001 Kozono
D473199 April 15, 2003 Sako et al.
Foreign Patent Documents
800572 November 1990 JP
1079850 July 2000 JP
Other references
  • Extract of Denpa Shimbun (newspaper) showing a PAM built-in microcomputer (MB91110).
  • Extract of Denpa Shimbun (newspaper) showing a CCD signal processor (VSP2101).
  • Extract of Denpa Shimbum (newspaper) showing a AV decoder system LSI (MN677521) for a DVD player.
  • Extract of Denpa Shimbun (newspaper) showing a Scan USB (NET 1031).
  • TOSHIBA Catalog of micro controller (TMP86CM25F).
Patent History
Patent number: D480371
Type: Grant
Filed: May 29, 2002
Date of Patent: Oct 7, 2003
Assignee: Kabushiki Kaisha Toshiba (Tokyo)
Inventors: Shigeki Sako (Yokohama), Masahiro Ootomo (Kitakyushu), Kazuyoshi Fukuda (Kitakyushu), Takahiro Ide (Yokohama)
Primary Examiner: Ted Shooman
Assistant Examiner: Selina Sikder
Attorney, Agent or Law Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 29/161,321
Classifications
Current U.S. Class: Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;