Load-lock chamber
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The present article relates to a load-lock chamber for a multi-chamber type semiconductor substrate processing apparatus for a film forming process and other processes for semiconductor substrates, and others to be processed. The load-lock chamber is, as shown in a reference drawing illustrating a state of usage of the load-lock chamber, connected to a transfer-chamber wherein load-in and load-out of substrates to be processed are carried out without exposing the transfer-chamber to air.
The broken line showing of the environment is for illustrative purpose only and forms no part of the claimed design.
Claims
The ornamental design for a load-lock chamber, as shown and described.
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Type: Grant
Filed: Nov 22, 2004
Date of Patent: Nov 27, 2007
Assignee: Tokyo Electron Limited (Tokyo)
Inventors: Keisuke Kondoh (Yamanashi), Hiroki Oka (Yamanashi), Makoto Tashiro (Yamanashi)
Primary Examiner: Selina Sikder
Attorney: Smith, Gambrell & Russell, LLP
Application Number: 29/217,730