Wafer boat
Latest Tokyo Electron Limited Patents:
- Fabrication of high-strength and lightweight beams and structures
- Method of manufacturing a gate-all-around transistor using support cantilevers on opposing ends of a multilayered stack
- Substrate processing apparatus
- Methods for wet atomic layer etching of tungsten using halogenation
- Methods to improve etch uniformity across a semiconductor substrate when etching with a hydrofluoric acid (HF) and nitric acid (HNO) solution
The rear elevation appears symmetrical with an elevational view.
Broken lines are used throughout the drawings to disclose the environment related to the claimed design. Dash lines are used throughout the drawings to define the boundary of the claimed design.
Claims
The ornamental design for a wafer boat, as shown and described.
| 5458688 | October 17, 1995 | Watanabe |
| D404371 | January 19, 1999 | Shimazu |
| D409158 | May 4, 1999 | Shimazu |
| 6056123 | May 2, 2000 | Niemirowski et al. |
| 6065615 | May 23, 2000 | Uchiyama et al. |
| 6110285 | August 29, 2000 | Kitazawa et al. |
| 6171400 | January 9, 2001 | Wingo |
| D551634 | September 25, 2007 | Sugawara |
| 20020092815 | July 18, 2002 | Kim et al. |
| 20020113027 | August 22, 2002 | Minami et al. |
| 20020130061 | September 19, 2002 | Hengst |
Type: Grant
Filed: Nov 1, 2006
Date of Patent: Nov 18, 2008
Assignee: Tokyo Electron Limited (Tokyo)
Inventor: Izumi Sato (Tokyo)
Primary Examiner: Selina Sikder
Attorney: Smith, Gambrell & Russell, LLP
Application Number: 29/268,190