Arm for wafer transportation for manufacturing semiconductor wafers

- Tokyo Electron Limited
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Description

FIG. 1 is a top view of the design for a arm for wafer transportation for manufacturing semiconductor wafers in accordance with the invention;

FIG. 2 is a bottom view thereof;

FIG. 3 is a right side view thereof;

FIG. 4 is a left side view thereof;

FIG. 5 is a front view thereof;

FIG. 6 is a rear view thereof;

FIG. 7 is a magnified, rear, sectional view between lines A—A′ of FIG. 2, along line D—D of FIG. 2; and,

FIG. 8 is a magnified, rear, sectional view between lines B—B′ of FIG. 2, along line D—D of FIG. 2.

The broken line showing in the figures is included for the purpose of illustrating environment and forms no part of the claimed design.

Claims

The ornamental design for an arm for wafer transportation for manufacturing semiconductor wafers, as shown and described.

Referenced Cited
U.S. Patent Documents
6116848 September 12, 2000 Thomas et al.
D525408 July 18, 2006 Nitadori
7290813 November 6, 2007 Bonora et al.
D562524 February 19, 2008 Hiroki et al.
20030035711 February 20, 2003 Gilchrist
20040048474 March 11, 2004 Asano
20060166503 July 27, 2006 Sasaki et al.
20060169674 August 3, 2006 Mao et al.
20060210387 September 21, 2006 Saeki et al.
Patent History
Patent number: D591924
Type: Grant
Filed: Apr 2, 2008
Date of Patent: May 5, 2009
Assignee: Tokyo Electron Limited (Tokyo)
Inventor: Takahiro Abe (Oshu)
Primary Examiner: Cynthia E Ramirez
Attorney: Smith, Gambrell & Russell, LLP
Application Number: 29/300,495
Classifications
Current U.S. Class: Element Or Attachment (D34/35)