Micro flow channel chip

- Sony Corporation
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Description

FIG. 1 is a top plan view of a first embodiment of a micro flow channel chip showing our new design, a bottom plan view thereof being a mirror image;

FIG. 2 is a front elevational view thereof, a rear elevational view being a mirror image;

FIG. 3 is a right side elevational view thereof;

FIG. 4 is an enlarged partial front, top, left perspective view thereof;

FIG. 5 is an enlarged partial top plan view thereof;

FIG. 6 is an enlarged partial front elevational view thereof;

FIG. 7 is a top plan view of a second embodiment of a micro flow channel chip showing our new design, a bottom plan view thereof being a mirror image;

FIG. 8 is a front elevational view thereof, a rear elevational view being a mirror image;

FIG. 9 is a right side elevational view thereof;

FIG. 10 is an enlarged partial front, top, left perspective view thereof;

FIG. 11 is an enlarged partial top plan view thereof; and,

FIG. 12 is an enlarged partial front elevational view thereof.

In the drawing views, the broken lines are included for the purpose of illustrating portions of the micro flow channel chip that form no part of the claimed design.

Claims

The ornamental design for a micro flow channel chip, as shown and described.

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Patent History
Patent number: D673287
Type: Grant
Filed: Nov 24, 2010
Date of Patent: Dec 25, 2012
Assignee: Sony Corporation (Tokyo)
Inventors: Shoji Akiyama (Tokyo), Masaya Kakuta (Tokyo), Takeshi Yamasaki (Tokyo), Tatsumi Ito (Tokyo), Masataka Shinoda (Tokyo)
Primary Examiner: Anhdao Doan
Attorney: Rader, Fishman & Grauer PLLC
Application Number: 29/371,203
Classifications