Kickstand hinge
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The broken lines of the Figures are for illustration only. The broken lines and the unshaded regions bounded by broken lines of the preceding Figures illustrate boundaries of unclaimed environmental structures and, therefore, form no part of the claimed design. Non-oblique line shading is meant to show contour and not surface ornamentation.
Claims
The ornamental design for a kickstand hinge, as shown and described.
D661308 | June 5, 2012 | Capozzoli, II |
D664529 | July 31, 2012 | Chuang |
D671541 | November 27, 2012 | Gengler |
D685381 | July 2, 2013 | Symons |
D701213 | March 18, 2014 | Pajic |
D710861 | August 12, 2014 | Yagi |
D715804 | October 21, 2014 | Frenzel |
D720758 | January 6, 2015 | Janz |
D733548 | July 7, 2015 | Brown |
D737829 | September 1, 2015 | Lee |
D763858 | August 16, 2016 | Fluckiger |
D769861 | October 25, 2016 | Sun |
D771055 | November 8, 2016 | Sharma |
Type: Grant
Filed: Sep 25, 2015
Date of Patent: Sep 26, 2017
Assignee: Intel Corporation (Santa Clara, CA)
Inventors: Pei-yang Sung (Taichung), Jeff Ku (Taipei), Ming-Che Lee (New Taipei), Oliver Tsui (Taipei), Tim Liu (New Taipei)
Primary Examiner: Angela J Lee
Application Number: 29/540,604