Circuit board
Latest SiFive, Inc. Patents:
- Debug trace circuitry configured to generate a record including an address pair and a counter value
- Logging guest physical address for memory access faults
- Address range encoding in system on a chip with securely partitioned memory space
- Systems and methods for clock gating
- Vector instruction cracking after scalar dispatch
Description
The broken lines in the drawings illustrate unclaimed features of the circuit board and form no part of the claimed design.
Claims
The ornamental design for a circuit board, as shown and described.
Referenced Cited
U.S. Patent Documents
Other references
D133882 | September 1942 | Matthews |
2435890 | February 1948 | Lembeck |
3072734 | January 1963 | Fox |
D422758 | April 11, 2000 | Roche |
D424278 | May 9, 2000 | Douglas |
D430856 | September 12, 2000 | Wilkerson |
D466094 | November 26, 2002 | Marcotte |
D508681 | August 23, 2005 | Enderlein |
D525213 | July 18, 2006 | Enderlein |
D620680 | August 3, 2010 | Thompson |
D655890 | March 20, 2012 | Thompson |
D775779 | January 10, 2017 | Luque |
D794586 | August 15, 2017 | Takahashi |
D799438 | October 10, 2017 | Takahashi |
D801625 | November 7, 2017 | Elliott |
D804437 | December 5, 2017 | Kantor |
D808611 | January 30, 2018 | Kindall |
D825887 | August 21, 2018 | Blunt |
D834784 | December 4, 2018 | Kang |
D838415 | January 15, 2019 | Dupree |
D852763 | July 2, 2019 | Kneip |
20170354816 | December 14, 2017 | Huelman et al. |
- “PCB hand stock vector” Illustration of board, hand, abstract; https://www.dreamstime.com/royalty-free-stock-image-pcb-hand-image29513666; downloaded Mar. 20, 2019.
- Motorola Solutions, Inc.; “89FT4818 Hand Held Transmitter to be used in the Family Radio Service Teardown Internal Photos Relayed Circuit Board”.; https://fccid.io/AZ489FT4818/Internal-Photos/Relayed-Circuit-Board-7634; 2 pages, downloaded Mar. 20, 2019.
Patent History
Patent number: D879730
Type: Grant
Filed: Dec 18, 2018
Date of Patent: Mar 31, 2020
Assignee: SiFive, Inc. (San Mateo, CA)
Inventors: Jack Kang (San Mateo, CA), David Lee (San Jose, CA), Jeffrey Mulhausen (McLean, VA)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/673,813
Type: Grant
Filed: Dec 18, 2018
Date of Patent: Mar 31, 2020
Assignee: SiFive, Inc. (San Mateo, CA)
Inventors: Jack Kang (San Mateo, CA), David Lee (San Jose, CA), Jeffrey Mulhausen (McLean, VA)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/673,813
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182);
D2/617