Adjustable fixture for aligning column grid array substrates
Latest TopLine Corporation Patents:
- Shoe outsoles and systems and methods of manufacturing the same
- Shoe outsoles and systems and methods of manufacturing the same
- Lead free solder columns and methods for making same
- Unidirectional particle damper for printed circuit boards and planar surfaces
- Fixture for delivering 1752 solder columns onto a substrate
Description
The broken lines in the drawings represent portions of the adjustable fixture for aligning column grid array substrates that form not part of the claimed design.
Claims
The ornamental design for an adjustable fixture for aligning column grid array substrates, as shown and described.
Referenced Cited
U.S. Patent Documents
3838984 | October 1974 | Crane et al. |
4664309 | May 12, 1987 | Allen et al. |
4705205 | November 10, 1987 | Allen et al. |
4712721 | December 15, 1987 | Noel et al. |
4842184 | June 27, 1989 | Miller, Jr. |
5029748 | July 9, 1991 | Lauterbach et al. |
5040717 | August 20, 1991 | McGaffigan |
5323947 | June 28, 1994 | Juskey |
5497938 | March 12, 1996 | McMahon et al. |
5626278 | May 6, 1997 | Tang |
5695109 | December 9, 1997 | Chiang et al. |
D402273 | December 8, 1998 | Kataoka et al. |
D402274 | December 8, 1998 | Kataoka et al. |
D407383 | March 30, 1999 | Kataoka et al. |
D421968 | March 28, 2000 | Matsumura |
D426522 | June 13, 2000 | Matsumura |
D432504 | October 24, 2000 | Matsumura |
6136128 | October 24, 2000 | Chung |
6204678 | March 20, 2001 | Akram et al. |
6251767 | June 26, 2001 | Heinen |
6276596 | August 21, 2001 | Gruber et al. |
6296173 | October 2, 2001 | Davis et al. |
6412685 | July 2, 2002 | Hertz et al. |
D503691 | April 5, 2005 | Standing et al. |
6955285 | October 18, 2005 | Nomoto et al. |
7569474 | August 4, 2009 | Teo |
8277255 | October 2, 2012 | Consoli et al. |
8739392 | June 3, 2014 | Byquist |
9108262 | August 18, 2015 | Hart et al. |
9629259 | April 18, 2017 | Hart et al. |
D808350 | January 23, 2018 | Hart |
D874413 | February 4, 2020 | Hart |
20020102767 | August 1, 2002 | Sturcken |
20040144834 | July 29, 2004 | Nomoto |
20090223710 | September 10, 2009 | Becker et al. |
20090267227 | October 29, 2009 | Dando et al. |
20140262498 | September 18, 2014 | Hester et al. |
Patent History
Patent number: D908648
Type: Grant
Filed: Dec 12, 2019
Date of Patent: Jan 26, 2021
Assignee: TopLine Corporation (Irvine, CA)
Inventors: Martin B. Hart (Irvine, CA), Robert H. Komrij (La Mirada, CA)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/716,908
Type: Grant
Filed: Dec 12, 2019
Date of Patent: Jan 26, 2021
Assignee: TopLine Corporation (Irvine, CA)
Inventors: Martin B. Hart (Irvine, CA), Robert H. Komrij (La Mirada, CA)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/716,908
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)