Patents Issued in June 26, 2001
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Patent number: 6251669Abstract: The present invention provides an isolated cellular composition comprising greater than about 90% mammalian, non tumor-derived, neuronal progenitor cells which express a neuron-specific marker and which can give rise to progeny which can differentiate into neuronal cells. Also provided are methods of treating neuronal disorders utilizing this cellular composition.Type: GrantFiled: January 5, 1998Date of Patent: June 26, 2001Assignee: Emory UniversityInventor: Marla B. Luskin
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Patent number: 6251670Abstract: An object of the present invention is to provide a method of enabling perfusion culture efficiently and simply by agglutinating cells with Lectin, which is a naturally-occurring agglutinin, thereby separating the cells and the culture medium. According to the method of the present invention, lectin is added to a culture medium to quickly agglutinate and precipitate the cells, thereby separating the culture medium and the cells. Hence, it is easy to remove old culture medium and replenish with fresh culture medium. Accordingly, if the method of the present invention is used, the perfusion culture is performed automatically and on an industrial scale.Type: GrantFiled: June 28, 1999Date of Patent: June 26, 2001Assignee: President of Kanazawa UniversityInventors: Tanihiro Yoshimoto, Hiroyuki Takamatsu
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Patent number: 6251671Abstract: The invention relates to cell proliferation, cell differentiation, male infertility, male fertility and to compositions and methods involved therein. Also methods of culturing spermatogonial stem cells with bone morphogenetic protein 8 are disclosed.Type: GrantFiled: February 28, 1997Date of Patent: June 26, 2001Assignee: Vanderbilt UniversityInventors: Brigid L. M. Hogan, Guang-Quan Zhao
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Patent number: 6251672Abstract: Mammalian cells which require contact with cell surface proteins for activation, differentiation and/or proliferation are cultured in contact with an immobilized mammalian cell, with an immobilized membrane vesicle from a mammalian cell or with immobilized membrane vesicles from at least two mammalian cell populations. The mammalian cell or membrane vesicle can be modified with a first partner of a biological binding pair, and immobilized on a solid carrier via a second partner of the biological binding pair. Culturing can be with a first immobilized membrane vesicle and subsequently with a second immobilized membrane vesicle. The membrane vesicle contains part of the natural surface of a mammalian cell that includes a signal triggering surface protein. The membrane vesicle can be immobilized via a binding partner of a cell surface molecule.Type: GrantFiled: November 23, 1998Date of Patent: June 26, 2001Assignee: GSF-Forschungszentrum fur Umwelt und GesundheitInventors: Manfred Kubbies, Peter Dörmer, Petra Meissner
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Patent number: 6251673Abstract: The invention concerns an implant consisting of a carrier material containing medical substances such as pharmaceuticals, antibiotics, cytotstatic agents, hormones or the like made out of organic matter, preferably of a biological tissue of human, animal or plant origin, which before being incubated preferably in vacuum with one or the substances, is broken up, cleaned and freeze-dried.Type: GrantFiled: May 4, 1999Date of Patent: June 26, 2001Assignee: Mediphore-Biotechnologie AGInventor: Heinz Winkler
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Patent number: 6251674Abstract: The invention provides methods employing iterative cycles of recombination and selection/screening for evolution of whole cells and organisms toward acquisition of desired properties. Examples of such properties include enhanced recombinogenicity, genome copy number, and capacity for expression and/or secretion of proteins and secondary metabolites.Type: GrantFiled: February 7, 2000Date of Patent: June 26, 2001Assignee: Maxygen, Inc.Inventors: Matthew Tobin, William P. C. Stemmer, Jon E. Ness, Jeremy Minshull
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Patent number: 6251675Abstract: Transdominant repressors of viral gene phenotypic expression derived from the rev gene product of HIV-1 or the rex gene product of HTLV-1 and corresponding mutated genes are described, having the capability of repressing the Rev function in HIV-1 and/or the Rex function in HTLV-I and HTLV-II. Transient gene expression analysis of a series of missense and deletion mutants has been used. Sane of the mutants found repress both the Rev and the Rex function and are thus active in more than one viral species. Transdominant viral mutants represent a promising new class of anti-viral agents. Cellular expression of these transdominant inhibitors may be used in such therapeutic approaches as intracellular immunization in order to protect cells against the deleterious effects of viral, e.g. HIV-1 infection.Type: GrantFiled: June 2, 1995Date of Patent: June 26, 2001Assignee: Duke UniversityInventor: Bryan R. Cullen
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Patent number: 6251676Abstract: The invention provides a method of using a reporter gene that encodes a fluorescent polypeptide to indicate that an interaction has occurred between a bait and a prey protein in a mammalian cell. An advantage of using a fluorescent reporter polypeptide is that an interaction between a bait and prey in a mammalian cell can be readily detected, e.g., within 96 hours. In another method of the invention, a prey plasmid contains an Epstein-Barr virus origin of replication (ori-P). The OriP permits the prey plasmid to replicate episomally and indefinitely without damaging the mammalian cell or integrating into the genomic DNA of the mammalian cell. Since such a plasmid is maintained episomally in a circular form, it can be readily recovered from the mammalian cell.Type: GrantFiled: March 24, 2000Date of Patent: June 26, 2001Assignee: The General Hospital CorporationInventors: Toshihiro Shioda, Kurt J. Isselbacher
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Patent number: 6251677Abstract: The present invention provides a hybrid vector construct which comprises a portion of an adenovirus, 5′ and 3′ ITR sequences from an AAV, and a selected transgene. Also provided is a hybrid virus linked via a polycation conjugate to an AAV rep gene to form a single particle. These trans-infection particles are characterized by high titer transgene delivery to a host cell and the ability to stably integrate the transgene into the host cell chromosome. Also disclosed is the use of the hybrid vectors and viruses to produce large quantities of recombinant AAV.Type: GrantFiled: February 8, 1999Date of Patent: June 26, 2001Assignee: The Trustees of the University of PennsylvaniaInventors: James M. Wilson, William M. Kelley, Krishna J. Fisher
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Patent number: 6251678Abstract: New human papilloma virus (HPV) vaccine formulations exhibit enhanced long-term stability. Formulation components can include: virus-like particles (VLPs) absorbed onto aluminum, a salt, non-ionic surfactant, and a buffer. Additional formulations also contain a polymeric polyanionic stabilizer and a salt either in the presence or absence buffering agents and nonionic detergent.Type: GrantFiled: February 2, 2000Date of Patent: June 26, 2001Assignee: Merck & Co., Inc.Inventors: David B. Volkin, Li Shi, Henryk Mach
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Patent number: 6251679Abstract: Diagnostic methods for determining an instantaneous rate of pollutant formation in a combustion system are based on measurement of chemiluminescence intensity generated simultaneously with the formation of the pollutant. The chemiluminescent signal is generated by an analog reaction which occurs in parallel with a key step in the formation of a specific pollutant of interest. The connection between the analog reaction and the pollution reaction is such that the chemiluminescent signal indicates the local, instantaneous formation rate of the pollutant of interest.Type: GrantFiled: October 26, 1998Date of Patent: June 26, 2001Assignee: Aerodyne Research, Inc.Inventors: Kurt Annen, David B. Stickler
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Patent number: 6251680Abstract: Polymers having amine-thiol terminal moieties are provided. The amine-thiol terminal moieties are imparted by using amine-thiols as chain transfer agents in aqueous addition polymerizations. The polymers are useful as mineral dispersants, as water-treatment additives for boiler waters, cooling towers, reverse osmosis applications, sugar refining, paper production, geothermal processes and oil wells, and as detergent additives acting as builders, anti-filming agents, dispersants, sequestering agents and encrustation inhibitors.Type: GrantFiled: February 5, 1999Date of Patent: June 26, 2001Assignee: Rohm and Haas CompanyInventors: Zhenwen Fu, Lorraine Holowach Keller, Barry Weinstein
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Patent number: 6251681Abstract: Tissue (10) from the colon or bowel is pretreated with a Ringers solution and mounted onto a ring (12) submerged in oxygenated Ringers solution (32), with first and second current electrodes (34,36) and first and second voltage electrodes (38,40) positioned within the solution (32) closely adjacent the tissue. A sequence of current pulses of different frequencies (44) covering a broad frequency range are applied via electrodes (34,36) to the tissue and corresponding impedance and resistance values are obtained (46). Comparison of impedance/resistance values establishes separate and distinct ranges of values for normal, cancerous and premalignant tissues.Type: GrantFiled: November 30, 1998Date of Patent: June 26, 2001Inventors: Richard J. Davies, Robert D. Juncosa
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Patent number: 6251682Abstract: Methods and markers for prognosticating the efficacy of anti-cancer agents in patients suffering from cancer by detection of mutant tubulin genes are provided.Type: GrantFiled: June 2, 1999Date of Patent: June 26, 2001Assignee: Bristol-Myers Squibb CompanyInventors: Rafael Rosell, Mariano Monzó
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Patent number: 6251684Abstract: The present invention provides dried chemical compositions comprising dried beads. Typically, the beads comprise reagents suitable for analysis of biological samples, in particular analysis of blood samples in centrifugal analyzers.Type: GrantFiled: April 24, 1998Date of Patent: June 26, 2001Assignee: Abaxis, Inc.Inventors: Steven N. Buhl, Bhaskar Bhayani, Chi-Sou Yu, Thuy N. Tang
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Patent number: 6251685Abstract: A method for reading out data from microlocations of a microelectronic array involves activating multiple microlocations in parallel and simultaneously detecting the responses from the activated microlocations to determine concentrations of molecular biological material at each microlocation. In a preferred embodiment, the microelectronic array includes electronically addressable electrodes at each microlocation which can be individually activated via a control system. An electrochemiluminescent detection technique is used to detect the presence and determine the concentration of bound molecular biological material that is located at each microlocation. Electrochemiluminescent material is utilized because it gives off light when excited by an applied electrical field. With an addressable microelectronic array, electrical fields can be applied to various combinations of microlocations simultaneously to allow readout of several microlocations in parallel.Type: GrantFiled: February 18, 1999Date of Patent: June 26, 2001Assignee: Agilent Technologies, Inc.Inventors: Andreas Nikolaus Dorsel, Mel N. Kronick, Gary B. Gordon
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Patent number: 6251686Abstract: A liquid transfer device for use in the safe transfer of fluids from a needle tipped syringe to at least one test tube. The device is equipped with a slidable top able to be removed from the device for placement of the test tubes into a carrier on the device. The top is provided with at least one guide hole aligned above the test tubes for directing the needle of the syringe into the test tube supported by the carrier. The top of the device is positioned below the top of the sides of the device thereby creating a protective lip for preventing errant needles from straying during use by a health care professional.Type: GrantFiled: February 26, 1998Date of Patent: June 26, 2001Inventors: Edward J. Studer, James E. Studer, Rita S. Harman
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Patent number: 6251687Abstract: The invention describes the particles comprising an energy donor as a first component and a fluorescent dye as a second component positioned in said particles at an energy exchanging distance from one another, wherein the two components have a Stokes shift of greater than or equal to 50 nm, said particle having bound on its surface, a protein, polypeptide, nucleic acid, nucleotide or protein containing ligand analogue are disclosed and claimed. In addition, novel fluorescent dyes are described which exhibit intramolecular energy transfer for use to label various molecules, proteins, polypeptides, nucleotides and nucleic acids or to incorporate into particles.Type: GrantFiled: March 23, 1995Date of Patent: June 26, 2001Assignee: Biosite Diagnostics, Inc.Inventors: Kenneth F. Buechler, Joseph Barry Noar, Lema Tadesse
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Patent number: 6251688Abstract: A method and apparatus for measuring binding between a plurality of molecules of a first type and a plurality of molecules of a second type is presented. Apparatus utilizes a sensor possessing a waveguide to which have been attached in close proximity to its surface, features resembling molecules of said first type. Light is injected into said waveguide so as to produce an evanescent field at its surface. Molecules of said second type are tagged with a tag belonging to that class of chemicals which alters a characteristic of light, when said light passes through said chemical tag. Apparatus utilizes a rapid means of monitoring the change in optical signal coming from said waveguide as binding proceeds between tagged molecules of type 2 and the feature resembling molecules of type 1 on said waveguide. This allows direct measurement of binding and dissociation rates between the two types of molecules.Type: GrantFiled: March 20, 1998Date of Patent: June 26, 2001Assignee: IA, Inc.Inventors: Judith L. Erb, James G. Downward, John R. Erb-Downward, Otho Ulrich
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Patent number: 6251689Abstract: The present invention provides an efficient and versatile method for the synthesis and screening of combinatorial libraries of benzimidazoles, benzoxazoles, benzothiazoles, and derivatives thereof. In order to expedite the synthesis of large arrays of compounds possessing these core structures, a general methodology for solid phase synthesis of these derivatives is provided. Arrays of benzimidazoles, benzoxazoles, benzothiazoles, and derivatives thereof useful as peptidomimetics and for the identification of agents having antifungal, antiviral, antimicrobial, anticoagulant, and antiulcer activity, or use in the treatment of inflammation, hypertension, cancer, and other conditions can be prepared by this method.Type: GrantFiled: May 14, 1999Date of Patent: June 26, 2001Assignee: TELIK, Inc.Inventors: Edgardo Laborde, Yukiharu Matsumoto
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Patent number: 6251690Abstract: The excitation of label molecules usable in chemical and biochemical analysis by electrical pulses at electrodes covered with a thin insulating film, and the use of such electrodes in chemical, clinical and biochemical analysis. The electrodes include a conducting base material that has been coated with an organic or inorganic insulating film or multiple layers of such films, so that either one or several label compounds can be excited to an excited state which is deexcited by emission of ultraviolet, visible or infrared light, in aqueous solution providing the basis for reproducible analytical applications in bioaffinity assays such as immunoassays and DNA-probing assays.Type: GrantFiled: July 21, 1999Date of Patent: June 26, 2001Inventors: Sakari Kulmala, Timo Ala-Kleme, Jarkko Eskola, Timo Korpela
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Patent number: 6251691Abstract: A method and apparatus for the manipulation of colloidal particles and biomolecules at the interface between an insulating electrode such as silicon oxide and an electrolyte solution. Light-controlled electrokinetic assembly of particles near surfaces relies on the combination of three functional elements: the AC electric field-induced assembly of planar aggregates; the patterning of the electrolyte/silicon oxide/silicon interface to exert spatial control over the assembly process; and the real-time control of the assembly process via external illumination. The present invention provides a set of fundamental operations enabling interactive control over the creation and placement of planar arrays of several types of particles and biomolecules and the manipulation of array shape and size. The present invention enables sample preparation and handling for diagnostic assays and biochemical analysis in an array format, and the functional integration of these operations.Type: GrantFiled: October 26, 1998Date of Patent: June 26, 2001Assignee: Bioarray Solutions, LLCInventor: Michael Seul
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Patent number: 6251692Abstract: A semiconductor processing workpiece support which includes a detection subsystem that detects whether a wafer or other workpiece is present. The preferred arrangement uses an optical beam emitter and an optical beam detector mounted along the back side of a rotor which acts as a workpiece holder. The emitted beam passes through the workpiece holder and is reflected by any workpiece present in the Workpiece holder. The preferred units include both an optical emitter and pair of detectors. The detection is preferably able to discriminate on the basis of the angle of the reflected beam, so that a portion of the beam reflected by the workpiece holder is not considered or minimized.Type: GrantFiled: September 1, 1999Date of Patent: June 26, 2001Assignee: Semitool, Inc.Inventor: Kyle M. Hanson
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Patent number: 6251693Abstract: Semiconductor processing methods and defect detection methods are described. In one embodiment, a semiconductor wafer in process is provided and a material is formed or deposited over the wafer. The material is discernably deposited over defective wafer surface areas and not appreciably deposited over non-defective wafer surface areas. Subsequently, the wafer surface areas are inspected to identify defective areas. In another embodiment, a substrate is provided having an exposed region containing surface defects. A defect-highlighting material is substantially selectively deposited over surface defects and not appreciably over other exposed regions. The substrate is subsequently inspected for the deposited defect-highlighting material. In yet another embodiment, a dielectric layer is formed over a substrate outer surface and the substrate is processed in a manner which can give rise to a plurality of randomly-distributed dielectric layer features.Type: GrantFiled: July 30, 1998Date of Patent: June 26, 2001Assignee: Micron Technology, Inc.Inventors: Michael Nuttall, Garry A. Mercaldi
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Patent number: 6251694Abstract: The present invention provides a method of testing and packaging a semiconductor chip. The semiconductor chip includes an integrated circuit (IC) positioned within the semiconductor chip, and a bonding pad positioned on the surface of the semiconductor chip and electrically connected with the IC. The method includes using a probe to contact a predetermined testing area on the surface of the bonding pad to electrically test the IC, and forming a passivation layer on the surface of the semiconductor chip to passivate the surface of the semiconductor chip. The testing area of the bonding pad is covered under the passivation layer and the passivation layer has an opening positioned on the bonding pad outside the testing area which is used as a connecting area for performing wire bonding or bumping.Type: GrantFiled: May 26, 1999Date of Patent: June 26, 2001Assignee: United Microelectronics Corp.Inventors: Hermen Liu, Yimin Huang
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Patent number: 6251695Abstract: A method of packaging and testing integrated circuit dies includes coupling a first integrated circuit to the substrate; encapsulating the first integrated circuit; and then testing the first integrated circuit. If testing is successful, a second integrated circuit is coupled to the substrate. In addition, the method may include encapsulating the second integrated circuit so that the first and second integrated circuits are part of a single monolithic module, such as a multichip module. The second integrated circuit may also be tested after encapsulation. The present invention may also be practiced by encapsulating and testing lesser value die before encapsulating higher value die. This reduces the chance that a higher value die will be rendered unusable because one of the lower value dies attached to the substrate is subsequently found defective after the higher value die has been encapsulated and/or tested.Type: GrantFiled: September 1, 1999Date of Patent: June 26, 2001Assignee: S3 Graphics Co., Ltd.Inventor: Young I. Kwon
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Patent number: 6251696Abstract: A method of fabricating an integrated circuit of which a bonding condition can be evaluated simply is provided. Two external connecting electrodes are provided on the surface, via holes are formed below them, and conductive portions are formed in the via holes. Then, a first metal film is formed on a rear face of a chip and a second metal film is formed on a surface of a ceramic substrate, and then both of them are made contact and heated so as to bond the chip and the ceramic substrate. Further, when the first metal film is formed, a slit portion which no first metal film exists is provided. When the bonding condition is evaluated, a resistance between two external connecting electrodes is measured.Type: GrantFiled: October 25, 1999Date of Patent: June 26, 2001Assignee: Oki Electric Industry, Co. Ltd.Inventors: Masahisa Ikeya, Kazuyuki Inokuchi
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Patent number: 6251697Abstract: The present invention provides a method for controlling a process parameter for fabricating a semiconductor wafer. In one embodiment, the method includes forming a test substrate using a given process parameter, determining a flatband voltage of the test substrate, and modifying the given process parameter to cause the flatband voltage to approach zero. The process parameter that is modified to cause the flatband voltage to approach zero may vary. The flatband may be determined by a non-contact method, which uses a kelvin probe to measure the flatband voltage and a corona source to deposit a charge on the test substrate.Type: GrantFiled: October 6, 2000Date of Patent: June 26, 2001Assignee: Agere Systems Guardian Corp.Inventors: Carlos M. Chacon, Pradip K. Roy
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Patent number: 6251698Abstract: A process for the production of microsensors machined in silicon, and in particular accelerometers for applications of assisting with navigation in aircraft, and pressure sensors. In order to improve the production of certain active parts of the sensor, and in particular of a beam forming a resonator, which needs to have well-controlled width and thickness characteristics, the following procedure is adopted. A beam having a thickness equal to the desired final thickness, and a width greater than the desired final width, is produced by micromachining the silicon on a first plate, the beam being covered on its upper face by a mask defining the desired final width. The plate is assembled with another plate. The two faces of the beam are oxidized in order to cover them with a thin protective layer. The thin protective layer on the upper face is removed, by vertical directional etching, without removing the mask already present.Type: GrantFiled: November 23, 1999Date of Patent: June 26, 2001Assignee: Sextant AvioniqueInventors: Olivier Lefort, Isabelle Thomas
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Patent number: 6251699Abstract: A method for fabricating micromechanical components, which provides for depositing one or a plurality of sacrificial layers on a silicon substrate and, thereon, a silicon layer. In subsequent method steps, a structure is patterned out of the silicon layer, and the sacrificial layer is removed, at least under one section of the structure. The silicon layer is doped by an implantation process.Type: GrantFiled: July 17, 2000Date of Patent: June 26, 2001Assignee: Robert Bosch GmbHInventors: Matthias Fuertsch, Michael Offenberg
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Patent number: 6251700Abstract: A method of fabricating a complementary metal-oxide-semiconductor (CMOS) photosensitive device. In this method, a wafer substrate is provided. Then, a first passivation layer is formed over the wafer substrate. The first passivation layer, which is made from a material that includes silicon nitride or silicon oxide, is heated so that it melts. Then, color filters including a red filter region, a green filter region and a blue filter region are formed over the first passivation layer. The color filters are used to filter out different colors of monochromatic light. The color filters are made from a material that includes acrylic. Subsequently, a second passivation layer having a planar top surface is formed over the color filters. The second passivation layer is made from a material that includes silicon nitride or silicon oxide. Next, photolithographic and etching operations are carried out to form an opening through the second passivation layer and the first passivation layer.Type: GrantFiled: August 17, 1998Date of Patent: June 26, 2001Assignee: United Microelectronics Corp.Inventors: Wei-Chiang Lin, Yuan-Chi Pai
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Patent number: 6251701Abstract: An all dry method for producing solar cells is provided comprising first heat-annealing a II-VI semiconductor; enhancing the conductivity and grain size of the annealed layer; modifying the surface and depositing a tellurium layer onto the enhanced layer; and then depositing copper onto the tellurium layer so as to produce a copper tellurium compound on the layer.Type: GrantFiled: March 1, 2000Date of Patent: June 26, 2001Assignee: The United States of America as represented by the United States Department of EnergyInventor: Brian E. McCandless
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Patent number: 6251702Abstract: An encapsulant molding technique used in chip-on-board encapsulation wherein an oxidizable metal layer is patterned on a substrate and the oxidizable metal layer is oxidized to facilitate removal of unwanted encapsulant material. The oxidizable metal layer which adheres to the substrate is applied over a specific portion of the substrate. The oxidizable metal layer is oxidized to form a metal oxide layer which does not adhere to encapsulant materials.Type: GrantFiled: May 25, 1999Date of Patent: June 26, 2001Assignee: Micron Technology, Inc.Inventor: Richard W. Wensel
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Patent number: 6251703Abstract: A microelectronic coated CMS component, in particular for an active implantable medical device, and its method of manufacture. The process is applied to a wafer from which will be formed, after cutting, a plurality of CMS components of the CSP type, i.e., having appreciably the same dimensions as those of the chip. The process includes (a) obtaining a wafer (10) on which are formed the chips (12), each chip having a contact pad (16) on at least one side of the chip; (b) sealing on this wafer a cap (18) having openings (20) authorizing an access to the subjacent contact pads of the chips; (c) forming in the cap distinct trenches (22) according to the periphery of each chip; (d) establishing in the openings an electrical connection to the contact pads, these connections (26) emerging through the upper face of the cap; (e) flowing a coating resin (34) into the openings and the trenches; (f) polishing and metallizing the cap; and (g) cutting the wafer thus prepared into individual components.Type: GrantFiled: December 13, 1999Date of Patent: June 26, 2001Assignee: Ela Medical S.A.Inventors: Yves Van Campenhout, Dominique Gilet, Thierry Legay, Hubert Bono
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Patent number: 6251704Abstract: A metal is formed at a rear surface of a substrate, the substrate also having a front surface at which a molded semiconductor chip is mounted. The metal pattern is covered with an insulating film, except for at a connecting area. A solder ball is bonded to the connecting area. The area of the metal pattern other than the connecting area inclines toward the substrate and gradually becomes thinner toward the outside thereof. Stress, which is applied to the solder ball, is imparted in a diagonal direction and is dispersed. As a result, the number of occurrences of cracks is reduced, and the solder ball which is used to achieve connection with an external substrate, is effectively prevented form becoming electrically disconnected.Type: GrantFiled: April 5, 1999Date of Patent: June 26, 2001Assignee: Oki Electric Industry Co., Ltd.Inventors: Shinji Ohuchi, Yoshimi Egawa, Noritaka Anzai
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Patent number: 6251705Abstract: The specification describes methods for manufacturing thin tiles for IC packages using thinning techniques. The method includes the step of thinning the IC devices in chip form. This is achieved at the final stage of assembly where the chips are flip-chip bonded to the substrate and the backside of the chips is exposed for thinning. Using this approach, final chip thickness of the order of 2-8 mils can be produced and overall package thickness is dramatically reduced.Type: GrantFiled: October 22, 1999Date of Patent: June 26, 2001Assignee: Agere Systems Inc.Inventors: Yinon Degani, Thomas Dixon Dudderar, King Lien Tai
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Patent number: 6251706Abstract: An apparatus and method that permits the removal of heat from the back side surface of an integrated circuit semiconductor substrate while performing optical based testing through or at the back side surface of the semiconductor substrate. In one embodiment, the present invention includes a semiconductor device having an infrared transparent heat slug attached to the back side surface of the device. Heat is removed from the semiconductor device through an infrared transparent heat slug that is then thermally cooled by a conventional cooling technique.Type: GrantFiled: April 23, 1998Date of Patent: June 26, 2001Assignee: Intel CorporationInventor: Mario J. Paniccia
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Patent number: 6251707Abstract: An aluminum or copper heat sink is attached to a ceramic cap or exposed semiconductor chip using an adhesive of silicone or flexible-epoxy adhesive. The aluminum may be coated by anodizing or chromate conversion or the copper may be coated with nickel or gold or chromium. Such structures are especially useful for flip chip attachment to flexible or rigid organic circuit boards or modules such as CQFP, CBGA, CCGA, CPGA, TBGA, PEGA, DCAM, MCM-L, and other chip carrier packages in which the back side of chips are connected directly to heat sinks. These adhesive materials withstand wet or dry thermal cycle tests of −65 to 1500° C. for 1,000 cycles and 85° C. and 85% relative humidity for 1000 hours while maintaining a tensile strenth of at least 500 psi. The adhesive contains materials having high thermal conductivity and a low coefficient of thermal expansion (CTE) in order to provide increased thermal performance.Type: GrantFiled: April 11, 2000Date of Patent: June 26, 2001Assignee: International Business Machines CorporationInventors: William Emmett Bernier, Michael Anthony Gaynes, Irving Memis, Hussain Shaukatuallah
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Patent number: 6251708Abstract: A hybrid lead frame having leads for conventional lead-to-I/O wire bonding, and leads for power and ground bussing that extend over a surface of the semiconductor die are provided where the leads for bussing are held in place by lead-lock tape to prevent bending and/or other movement of the bussing leads during manufacturing. More specifically, the lead-lock tape is transversely attached across a plurality of bussing leads proximate to and outside of the position where the die is to be attached.Type: GrantFiled: March 18, 1999Date of Patent: June 26, 2001Assignee: Micron Technology, Inc.Inventors: Jerry M. Brooks, Larry D. Kinsman, Timothy J. Allen
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Patent number: 6251709Abstract: A cooling structure is provided for a multichip module on which integrated circuit devices (i.e., LSI devices) having heat-radiation surfaces are mounted, wherein there are provided a heat sink, thermal conduction blocks and thermal compounds. Recess portions are formed at a surface of the heat sink in connection with the integrated circuit devices of the multichip module. Low melting point metal material such as solder is supplied to interiors of the recess portions of the heat sink. The thermal conduction blocks are partially inserted into the interiors of the recess portions under the condition where the low melting point metal material is heated and melted, so that the thermal conduction blocks temporarily float in the melted material. To avoid heat transfer toward the integrated circuit devices, a heat insulating sheet is provided on the thermal conduction blocks. Then, the low melting point metal material is solidified, so the heat insulating sheet is removed.Type: GrantFiled: February 4, 2000Date of Patent: June 26, 2001Assignee: NEC CorporationInventor: Minoru Yoshikawa
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Patent number: 6251710Abstract: An interconnect structure in which a patterned anti-fuse material is formed therein comprising: a substrate having a first level of electrically conductive features; a patterned anti-fuse material formed on said substrate, wherein said patterned anti-fuse material includes an opening to at least one of said first level of electrically conductive features; a patterned interlevel dielectric material formed on said patterned anti-fuse material, wherein said patterned interlevel dielectric includes vias, as least one of said vias includes a via space; and a second level of electrically conductive features formed in said vias and via spaces.Type: GrantFiled: April 27, 2000Date of Patent: June 26, 2001Assignees: International Business Machines Corporation, Infineon Technologies North America Corp.Inventors: Carl J. Radens, Axel C. Brintzinger
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Patent number: 6251711Abstract: The proposed invention is a salicide process that is used to avoid bridge phenomena.Type: GrantFiled: March 17, 2000Date of Patent: June 26, 2001Assignee: United Microelectronics Corp.Inventors: Edberg Fang, Wen-Yi Hsieh, Teng-Chun Tsai
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Patent number: 6251712Abstract: A method for producing a thin-film transistor by using a crystalline silicon film that has been formed by using nickel as a metal element for accelerating crystallization of silicon. In forming source and drain regions, phosphorus as an element for gettering nickel is introduced therein by ion implantation. Nickel gettering is effected by annealing. For example, in the case of producing a P-channel thin-film transistor, both phosphorus and boron are used. Boron determines a conductivity type, and phosphorus is used as a gettering material.Type: GrantFiled: September 12, 1997Date of Patent: June 26, 2001Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Koichiro Tanaka, Hideto Ohnuma
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Patent number: 6251713Abstract: An SRAM cell includes a pair of N channel transistors acting as inverting circuits, a pair of N channel transistors which perform the control function for the cell, and a pair of N channel thin film transistors in depletion mode with gate and source shorted to provide load devices for the N channel inverter transistors of the SRAM cell.Type: GrantFiled: November 26, 1997Date of Patent: June 26, 2001Assignee: STMicroelectronics, Inc.Inventors: Tsiu Chiu Chan, Loi N. Nguyen
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Patent number: 6251714Abstract: A thin film field effect transistor includes: a) a thin film channel region; b) a pair of opposing electrically conductive first and second source/drain regions adjacent the thin film channel region; c) a gate insulator and a gate positioned adjacent the thin film channel region for electrically energizing the channel region to switch on the thin film field effect transistor; d) the first source/drain region having a first thickness, the second source/drain region having a second thickness, the channel region having a third thickness; at least one of the first and second thicknesses being greater than the third thickness. Methods are disclosed for making thin field effect transistors.Type: GrantFiled: December 12, 1997Date of Patent: June 26, 2001Assignee: Micron Technology, Inc.Inventors: Charles H. Dennison, Monte Manning
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Patent number: 6251715Abstract: The present invention relates to a thin film transistor-liquid crystal display (hereinafter referred to as a TFT-LCD) and a manufacturing method thereof. An amorphous silicon is deposited on a substrate. The amorphous silicon is transformed into a poly silicon by method of solid phase crystallization, and the first poly silicon layer pattern is formed by etching. An amorphous silicon is deposited on the first poly silicon layer pattern. The amorphous silicon is transformed into a second poly silicon layer by method of solid phase crystallization.Type: GrantFiled: July 24, 1998Date of Patent: June 26, 2001Assignee: Samsung Electronics Co., Ltd.Inventors: Byung-Hoo Jung, Yong-Suk Jin, Joo-Hyung Lee, Chang-Won Hwang
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Patent number: 6251716Abstract: This invention discloses the present invention discloses a junction field effect transistor UFET) device supported on a substrate. The JFET device includes a gate surrounded by a depletion region. As the distance between the gates is large enough, there is a gap between the depletion regions surrounding adjacent gates. Depletion mode JFET transistor which is normally on is provided. The normally on transistors respond to negative bias applied to the gates to shut of the current path in the substrate. The current path in the substrate is normally available with a zero gate bias. As the distance between the gates is reduced, the JFET transistor is normally off because the depletion regions surround the gates shut of the current channel. The depletion region responding to a positive bias applied to the gate to open a current path in the substrate wherein the current path in the substrate is shut off when the gate is zero biased.Type: GrantFiled: October 29, 1999Date of Patent: June 26, 2001Assignee: Lovoltech, Inc.Inventor: Ho-Yuan Yu
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Patent number: 6251717Abstract: A method for forming viable floating gate memory cells in a semiconductor substrate. At various points within the memory cell manufacturing process rapid thermal annealing is used to repair any damage that may be caused to the crystals in the substrate by various processing steps. By quickly repairing any damage to the crystals of the substrate, the rate and amount of overall transient enhanced diffusion of the various dopants within the substrate can be greatly reduced, thereby allowing the production of a viable memory cell. Specifically, the present invention uses rapid thermal annealing during and following the formation of the source and drain regions and the interconnection regions effecting electrical connection between the source regions. This desensitizes the erase rates of the semiconductor device to the etching conditions employed to form the connections.Type: GrantFiled: September 30, 1998Date of Patent: June 26, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Mark Ramsbey, Daniel Sobek, Nicholas H. Trispas
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Patent number: 6251718Abstract: A method for producing a semiconductor device includes the steps of: forming an impurity diffusion layer for controlling a threshold voltage by ion implantation; and conducting a high-temperature rapid heat treatment for recovering crystal defects generated by the ion implantation. More specifically, treatment conditions for the high-temperature rapid heat treatment are set in such a manner that interstitial atoms causing the crystal defects are diffused, and impurities in the impurity diffusion layer are not diffused. For example, the high-temperature rapid heat treatment is conducted in a temperature range of about 900° C. to about 1100° C.Type: GrantFiled: February 23, 1998Date of Patent: June 26, 2001Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kaori Akamatsu, Shinji Odanaka, Hiroyuki Umimoto
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Patent number: 6251719Abstract: A new method is provided for the creation of poly gate electrodes. A layer of poly-1 is deposited over the surface of a layer of ONO, a layer of TEOS-1 is deposited over the layer of poly-1. The layer of TEOS-1 is patterned in accordance with the pattern of the gate electrodes, the layer of poly-1 is dry etched using the patterned layer of TEOS-1 as a hard mask after which the layer of TEOS-1 forms a top IPO layer for the gate structure. A layer of silicon nitride is deposited over the pattern of gate electrodes, a layer of TEOS-2 is deposited over the surface of the layer of silicon nitride. The layer of TEOS-2 is etched applying a dry etch using the layer of silicon nitride as an etch stop thereby forming gate spacers on the sidewalls of the gate electrodes. The silicon nitride is next removed from the surface of the gate electrodes and from between the gate spacers by applying a silicon nitride wet etch.Type: GrantFiled: November 16, 2000Date of Patent: June 26, 2001Assignee: Taiwan Semiconductor Manufacturing CompanyInventor: Jen Pan Wang