Abstract: Apparatus and method for regulating a switching circuit of a voltage converter for supplying power to a pulsed load having a known upcoming magnitude. The voltage converter includes a switching circuit receiving a switching signal with duty cycle that is adjusted by a voltage controller. The voltage controller is responsive to a known upcoming cycle phase and a corresponding magnitude of the pulsed load for forward-correcting the duty cycle of the switching signal. In order to compensate for variations in load consumption owing, for example, to varying ambient conditions, circuit aging, battery discharge and other slow changes, or for imprecise foreknowledge thereof, the voltage controller may also monitor an output voltage of the voltage converter during successive cycles and apply feedback correction based on a predicted value of compensation required for the respective phase of a subsequent cycle.

Abstract: The invention relates to a voltage converting circuit (2) having: -an input terminal (11) for connection to a varying voltage or current source, and an output terminal (12) with a supply voltage, -an inductive element (5) being with a first terminal connected to the input terminal and with a second terminal to a capacitive element (8) and to the output terminal (12), the capacitive element (8) being with one terminal connected to a reference voltage (9), -a first switch (6) being with a first terminal connected to the second terminal of the inductive element (5), and with a second terminal to the reference voltage (9), the first switch (6) comprising a gate electrode (31) for opening and closing of the switch when a control voltage of a first level is applied to the gate, -an oscillator (13) comprising a power input (14) connected to the output terminal (12), a start-up output (15) connected to the gate electrode (31) of the first switch (6) for supplying a pulse-like signal to the gate electrode (31) and an

Abstract: In a switching power source apparatus which outputs a DC output voltage converted from a DC power source voltage, the DC output voltage is compared with a reference voltage to generate a feedback signal which decreases as the DC output voltage increases. A current detecting signal which decreases as the output current increases is also generated. The smaller one of the feedback signal and the current detecting signal as a comparison signal is compared with a triangular signal in a PWM comparator to produce a PWM signal. A semiconductor switch is on-off controlled by the PWM signal. Therefore, the apparatus can perform a constant voltage control with a current limit function, which can improve the accuracy of a current limit operation, eliminate the need of a special high speed operation of a current detecting circuit and a driver and stabilize the output voltage during the operation of current limit.

Abstract: A multiphase ripple voltage regulator generator employs a hysteretic comparator referenced to upper and lower voltage thresholds. The hysteretic comparator monitors a master ripple voltage waveform developed across a capacitor supplied with a current proportional to the difference between the output voltage and either the input voltage or ground. The output of the hysteretic comparator generates a master clock signal that is sequentially coupled to PWM latches, the states of which define the durations of respective components of the synthesized ripple voltage. A respective PWM latch has a first state initiated by a selected master clock signal and terminated by an associated phase voltage comparator that monitors a respective phase node voltage.

Abstract: An integrated circuit driver is disclosed. The driver comprises a high side transistor and a low side transistor connected in series. The output of the driver is taken from the source of the high side transistor and the drain of the low side transistor. A bootstrap contact pad is connected to the output node. Connected to the bootstrap contact pad is a bootstrap capacitor that is also connected to a high side gate drive that selectively controls the high side transistor.

Abstract: The Food Electricity Measurement Machine consist of an empty battery box with six compartments that have broken insulated copper wires in each divider's wall. The compartments A,B,E, and F will have table salt in water solution. The compartments C and D will be used to add blended food. When an electrical current is send throughout those compartments, it will show if the food is a good conductor or electricity or not. Foods that increase the electrical power of the human body would help to increase the expectancy of life.

Abstract: The present invention describes a device for generating microwave signals, particularly for use in a distance and speed sensor in a motor vehicle. To this end, two laser sources are operated, whose emitted radiations are distinguished from each other by a set difference in wavelength. The two lasers are arranged in such a way that the emitted laser beams overlap spatially. A photodiode is disposed in this region in which the two laser beams interfere. From the superimposition product of the two laser beams, this photodiode generates an electrical output signal that has the differential frequency of the two superimposed laser beams. In this context, the frequency difference of the two lasers is selected so that the frequency of the generated microwave radiation lies in the range of the radar beam to be generated.

Abstract: The frequency of an adjacent channel signal is reduced by a down converter (12), wherein the signal (adjacent channel signal) in a predetermined band centered around the adjacent channel frequency passes through a band-pass filter (22). At this time, a signal out of the predetermined band among the signals output from the down converter (12) by the band-pass filter (22) passes through the filter (22). An FFT section (32) outputs the signal having passed through the band-pass filter (22) by making it correspond with a frequency so that a first power measuring section (34) is used for power measurement on the basis of only the signal in a predetermined band. Therefore, power on an adjacent signal is accurately measured upon reception of a measurement signal.

Abstract: A wafer staging platform for use with equipment such as an inspection system for inspecting of semiconductors or like substrates. The platform is designed to reduce the amount of time needed to exchange wafers on a processing tool.

Abstract: Method and apparatus for determining the rotational direction of a rotatable article, such as a spindle motor used in a data storage device to rotate a data recording disc. The article includes an index mark which is detected by an index sensor to identify an index reference position on the article. The index sensor and index mark are further used to detect the direction of rotation of the article. In some embodiments, a second sensor is provided so that first and second timing pulses are generated from the index mark by the index sensor and the second sensor. In other embodiments, a second (detection) mark is added to the article so that first and second timing pulses are generated by the index sensor. In either case, a rotational direction detection circuit determines the rotational direction of the article in relation to the first and second timing pulses.

Abstract: A variable reluctance resolver is provided with an output winding having a reduced effect from externally introduced leakage magnetic flux. A variable reluctance resolver is provided with a resolver excitation winding and a resolver output winding wrapped around multiple stator magnetic poles which respectively output rotary angle X and Y components as a rotor turns. Windings are wound such that the polarities of output voltages on output windings wound around a row of three or more stator magnetic poles will be the same; all of the output windings are divided into an even number, two or greater, of groups, and output windings are serially connected in such a way that adjacent group output voltage polarities mutually differ.

Abstract: Angular position sensing apparatuses and methods are disclosed. An angular position sensing apparatus can include a rotatable base and two or more magnets located proximate to one another upon the rotatable base. The magnets are generally magnetized parallel and opposite to one another to create a uniform magnetic field thereof. Additionally, a sensor can be located external to the two magnets, such that the sensor comes into contact with the uniform magnetic field to sense a change in angular position associated with the rotatable base.

Abstract: A magnetic position sensor wheel for an angular position transducer of an electric motor is provided which includes a hub with a flange, a first ring of magnetic material disposed on one side of the flange between a hub axis and an outer periphery of the flange, and a second ring of magnetic material extending axially along the outer periphery of the flange.

Abstract: An apparatus serves to sense the absolute value of the rotational position of a shaft (14). The apparatus has a first single-turn rotary encoder (30) that is arranged at one end (20) of the shaft (14) and is arranged to sense the latter's rotational position within a single shaft revolution. Also provided are: a multi-turn rotary encoder unit which senses the number of revolutions of the shaft (14) and which comprises a reduction gear linkage (18); a rotary element (42), driven by the output of the linkage, that is oriented as an imaginary continuation of the shaft (14) and coaxially therewith; and a second single-turn rotary encoder (48) which is arranged to sense the rotational position of the rotary element (42) within a single revolution. The reduction gear linkage (18) surrounds the shaft (14), and its output element (38) is connected, via a connecting member (40), to said rotary element (42) around the first single-turn rotary encoder (30).

Abstract: In a first aspect, a method of inspecting objects is provided. The method includes the steps of (1) measuring sheet resistance of a first stack of conducting films deposited on an object, said first stack having a topmost conducting film; (2) depositing a subsequent conducting film on said first stack of conducting films to form a second stack; (3) measuring sheet resistance of said second stack; and (4) calculating sheet resistance of the subsequent conducting film. A thickness of the subsequent conducting film may be determined based on the sheet resistance of the subsequent conducting film. Numerous other aspects are provided.

Abstract: A sensitivity distribution of a multicoil used for multicoil fast imaging and composed of a plurality of RF coils (element coils) is estimated. Initial sensitivity maps M1 to M3 are produced respectively from images C1 to C3 acquired from the plurality of RF coils. By fitting TPS (thin-plate splines) to the initial sensitivity maps M1 to M3 uses as target data, sensitivity maps M1′ to M3′ for unfolding are estimated. In fitting the TPS, functions, such as automatic arrangement of control points, addition of target points to the outside of an image, use of a known model, and fitting to at least either absolute value components of MR data or phase components of the MR data, are activated. Thus, even a region to be imaged is such that only coarse echo data is acquired from the region, a sensitivity map of each element coil of the multicoil is estimated with high precision.

Abstract: For the purpose of improve rendering capability for a blood vessel, an MR image producing method comprises: window-processing MR signals using a window function f(k) that has a “value less than one” at a center (O) and in its proximate region in a k-space and on a periphery and in its proximate region in the k-space, and has a value larger than the “value less than one” between the regions in which the window function has the “value less than one;” and applying Fourier-transformation processing to the window-processed MR signals to obtain an MR image.

Abstract: In a method for aligning a magnetic field-modifying structure (74) in a magnet bore (12) of a magnetic resonance imaging scanner (8), a reference magnetic field map of the magnet bore (12) is measured without the magnetic field-modifying structure (74) inserted. The magnetic field-modifying structure (74) is inserted into the magnet bore (12). A second magnetic field map of the magnetic bore (12) is measured with the magnetic field-modifying structure (74) inserted. At least one odd harmonic component of the first and second magnetic field maps is extracted. The magnetic field-modifying structure (74) is aligned in the magnet bore (12) based on a comparison of the odd harmonic component of the first and second magnetic field maps.

Abstract: A local coil for magnetic resonance imaging equipment employs mirror conductors on opposite sides of an insulating substrate to produce lower resistance, higher Q and improved signal-to-noise ratio for a given foil thickness.

Abstract: A multimode RF probe for use with a sample oriented at an angle &thgr; to a polarizing field B0 produces a resultant RF magnetic field exhibiting enhanced coupling to the sample. The multiple modes are furnished by a quadrature coil, or a solenoidal coil in combination with either a saddle coil or quadrature coil.

Abstract: At least one antenna array including three mutually orthogonal antennas each sharing a common center point senses an electromagnetic signal emitted by a buried object such as a utility line, pipe or sonde. A circuit at least partially mounted in a housing is connected to the array and determines a location of the buried object by measuring signal strength and field angles in three dimensions without having to align the antenna array relative to the buried object while eliminating nulls and false peaks. A graphical user interface (GUI) has user-friendly icons, symbols, menus, numbers and graphical and auditory representation of signal strength. A SEARCH view indicates signal strength by showing a rotating strength indicator, a trace mode MAP view in which line location is shown by a line that moves side-to-side, and a sonde mode MAP view in which sonde location is shown by a moving line, pole and equator.

Abstract: An apparatus for determining the performances of at least one micromachined or microelectromechanical device (MEMS device) intended to carry a high frequency signal having an intended working frequency is disclosed. The MEMS device comprises a capacitive structure with at least one movable part, able to move with a frequency. The apparatus comprises a voltage signal source, at least one voltage divider circuit arranged between the capacitive structure and the voltage signal source, and a detection unit for detecting and measuring the voltage at the outlet of the voltage divider. The detection unit provides a combined voltage signal of an actuation voltage able to act on the moveable part of the capacitive structure with an actuation frequency and of a measurement voltage having a measurement frequency lower than the intended working frequency.

Abstract: An Addressable Electronic Switch (AES) is disclosed together with unique S/W (software) procedures for a system control to detect, locate, and isolate shorts, overloads, and other troubles, such as temporary breaks or disconnects, on a Vplex or similar 2-wire polling loop. The addressable electronic switches are placed at strategic locations throughout the polling loop, and are individually commanded by the system control to either connect or disconnect its respective branch from the rest of the polling loop, to locate and isolate a troubled area from the rest of the polling loop.

Abstract: A probe structure with a connector connecting the probe structure to a time domain reflectometry tester, where the connector has a signal conductor and a ground conductor. A back side layer is connected to the connector. A probe side layer with contacts is sandwiched with the back side layer in a layered substrate. The probe side layer has a centrally disposed signal contact and surrounding ground contacts. A conductive layer is disposed between the back side layer and the probe side layer. The conductive layer is connected to the ground conductor of the connector and to the ground contacts of the probe side layer contacts. A via extends from the back side layer to the probe side layer. The via is connected to the signal conductor of the connector, and is also connected to the centrally disposed signal contact of the probe side layer contacts. The via does not make connection with the conductive layer.

Abstract: An open circuit detection apparatus is provided for detecting whether a connection is closed between a local node and a remote node having a known impedance. A ping source is connected to the local node. The ping source has an output for transmitting an address unique to the remote node and an input for sensing the impedance of the remote node. A test circuit is connected to the remote node. The test circuit has an address decoder for receiving the address from the output. The address decoder has a unique address and asserts a control signal upon the address matching the unique address of said address decoder. An impedance-varying device is responsive to the control signal and effects a change in the impedance of the remote node. The change in the impedance of the remote node is sensed by the input of the ping source.

Abstract: A probe includes at least one core and at least one sense coil associated with the core. The ends of the core are arranged in a contact-free, spaced relationship between opposed surfaces of adjacent lamination teeth of a stator. Air gaps are maintained between the ends of the probe core and the opposed surfaces. The total of the two air gaps is constant. The probe is supported on a carriage arrangement and moved along the teeth. Variations in leakage flux produced with the stator energized with an energization winding to produce a flux which is a few percent of is normal energization level, are monitored.

Abstract: An impedance standard substrate for calibrating a vector network analyzer comprises a first surface and a second surface opposite to the first surface. A thru-circuit has two contacts electrically connected to each other. The two contacts are disposed on the first surface and the second surface, respectively. The impedance standard substrate further comprises a pair of open-circuits, a pair of short-circuits, and a pair of load-circuits disposed on the first surface and the second surface, respectively.

Abstract: This invention relates to a method for detection of a shielding fault in a multiwire cable forming part of a communication network, during functional operation of the said network, the said cable (10) transferring a multiframe signal S(t), which comprises the following steps:

Abstract: A fingerprint detector having a smooth sensing surface for contact with a fingerprint includes capacitive sensor plates defining an array of sensor cells below the sensing surface and tungsten ESD protection grid lines surrounding each sensor cell. The sensing surface is defined by an alumina layer with the tungsten grid lines embedded therein. The alumina layer provides a sensing surface with improved scratch resistance. The resulting detector is more sensitive in its capacitive sensing due to the relatively high dielectric constant of the alumina layer.

Abstract: The invention relates to a method and a device for measuring and indicating the level of a filler material in a container, said filler material being either electroconductive or nonconductive. A sensor (22) in applied to the wall of the container (20) or is integrated into the same. An alternating voltage is applied to the sensor (22) in order to measure the level, the capacity or the electrical field produced being a measure for the fill level.

Abstract: An adaptive reference voltage method and system analyzes a received bus signal to evaluate voltage swing characteristics and adjusts the reference voltage for reading the signal to a level that compensates for variations in margins between high and low signal switching values such as are introduced by noise. A bus input signal analyzer circuit incorporated in an integrated circuit analyzes the bus signal received at the integrated circuit to adjust the reference voltage used by the integrated circuit. In one embodiment, the bus input signal analyzer circuit applies a feedback loop to adapt the reference voltage by setting high and low input values to a reference voltage generation circuit with the reference voltage centered between the high and low values, such as results from a resistor divider network.

Abstract: There are disposed an output sequence control section, and output waveform data generation section for one system, and an analog waveform generation section includes four systems of ports 40, attenuators 43b for individually adjusting gains of analog test signals outputted via the respective ports, and digital/analog converters 45 for individually adjusting offset voltages of the analog test signals. Accordingly, when a plurality of LSIs to be tested are concurrently tested, the analog test signals optimized for each LSI to be tested are generated with a simple circuit configuration without complicating the circuit configuration of a performance board.

Abstract: One or more termination circuits or networks having compensation properties that are operative to reduce reflections occurring between a probe utilized by a test and measurement analyzer to test a device under test (DUT), such as an integrated circuit device, and the device under test itself are employed. The termination circuits are preferably small and less obtrusive than larger connectors and their compensation networking compensates for the connection of the probe to the DUT as well as connection of the cable from the probe to the analyzer performing the test and measurement function. The functionality of the termination circuits may be located at the DUT in a termination network connector or within the structure of the probe itself.

Abstract: A contactor used for testing a semiconductor device is provided. The semiconductor device testing contactor is electrically connected to electrodes of a semiconductor device to be tested. Such a contactor includes a wiring board and a first reinforcing member for reinforcing the wiring board. The contactor has a flexible base film and device connecting pads to be electrically connected to the electrodes of the semiconductor device. The first reinforcing member is disposed on the surface opposite to the semiconductor device connecting surface of the wiring board. The wiring board and the first reinforcing member are collectively bonded.

Abstract: A probe card has first contact terminals electrically connected to the fine-pitch electrodes of a test target; wirings drawn from the first contact terminals; and second contact terminals electrically connected to the wirings, wherein the first contact terminals are formed each using an anisotropically etched hole in a crystalline substrate, and a semiconductor device test method (fabrication method) using the probe card.

Abstract: To apply a constant pressing force to an object to be tested, so that reliable tests can be performed. A test socket 10 presses an object to be tested 1 against the testing face of a testing device 4.

Abstract: A test apparatuss for testing substrates at low temperatures has a chuck, which can be displaced in the working area by means of a chuck drive, the temperature of which can be controlled using heating and cooling means. The chuck has a receiving surface for receiving a test substrate and holding means for fixing a substrate carrier which receives the test substrate. Spatially and thermally defined test conditions are maintained with minimal energy and labor costs both at room temperatures and at low temperatures. This is achieved by providing a vacuum chamber which surrounds the working area of the chuck. The chuck is on one side thermally decoupled from the uncooled chuck drive and on the other side is thermally connected in a releasable manner to the test substrate. The cooled chuck and the cooled test substrate are shielded from the thermal radiation of the surrounding uncooled assemblies by means of a directly cooled thermal radiation shield.

Abstract: A device testing apparatus including a connection terminal to which an electronic device under test is detachably attached, a pusher for pushing the electronic device in the direction of the connection terminal so as to connect the electronic device to the connection terminal, and a cooling unit for cooling the electronic device. As the cooling unit, an element cooling the device using electricity is for example used. The cooling unit includes a cooling medium blower for blowing a cooling medium around the electronic device and heat exchange projections or depressions for raising the cooling efficiency by blowing a cooling medium. In the device testing apparatus, even if the electronic device generates heat on its own during testing, the electronic device is cooled through the pusher, connection terminals, or socket, so the effect of the heat generated by the electronic device is canceled out and the electronic device can be tested at the predetermined temperature as prescribed in the specification.

Abstract: This invention provides a cantilever type probe card which has undergone a treatment for facilitating perception of the image of probe needles and a method for the production of the cantilever type probe card.

Abstract: An integrated circuit, such as a memory device, includes a built-in repair circuit. The repair circuit includes an on-chip source that produces a programming signal of sufficient duration and magnitude to program a programmable element that normally isolates a secondary circuit, such as redundant circuitry, from the remainder of the circuits on the device. Once programmed, the redundant circuitry may take the place of failed circuitry, and thus repair the device.

Abstract: A semiconductor integrated circuit is disclosed, which comprises a pre-charge type dynamic circuit, a static circuit which realizes the same logic as the dynamic circuit, a selection circuit which is connected to an input section of each of the dynamic circuit and the static circuit, a control circuit which controls the selection circuit to select either the dynamic circuit or the static circuit at the time of testing a semiconductor chip.

Abstract: In this invention, a control circuit (111) controls both the power supply voltage (VDDQ) and the transistor size of the external output buffer to thereby select the lowest supply voltage that achieves the impedance matching with the transmission line (100), to thereby save bus termination by a resistor, thus consequently achieving both the lowering of the power consumption and the speeding-up in the data transmission. The power consumption during the data transmission is proportional to the square of the supply voltage. If the operational supply voltage of the external output buffer is lowered, the power consumption will be reduced accordingly. If the operational supply voltage of the external output buffer is lowered, the impedance thereof will be increased apparently; and at the same time, if the transistor size of the external output buffer is increased, the increased impedance will be decreased.

Abstract: A programmable logic device (PLD) includes programmable electronic circuitry. The programmable electronic circuitry, fabricated in a silicon substrate, may include a variety of configurable or programmable logic circuitry. The PLD also includes a memory circuitry coupled to the programmable electronic circuitry. The memory circuitry is fabricated using silicon-germanium.

Abstract: A Programmable Logic Device (PLD) incorporating a plurality of Programmable Logic Blocks (PLBS) providing enhanced flexibility for Cascade logic functions, each comprising a multi-input Look Up Table (LUT) providing one input to a Cascade Logic block for implementing desired Cascade Logic functions. The other input of the Cascade Logic block is a Cascade-In signal. A 2-input selection multiplexer receives one input from the output of the Cascade Logic block and the other from the output of the LUT for selecting either the Cascade Logic output or the LUT output as the unregistered output. The arrangement is such that the Cascade output and the multiplexer output are simultaneously available from the PLB.

Abstract: Clocked half-rail differential logic circuits with sense amplifier and shut-off are activated by a delayed clock and include a sense amplifier circuit that is triggered by a second delayed clock and a shut-off device. The addition of the sense amplifier circuit, and second delayed clock signal allows the sense amplifier circuit to act as the driver and therefore there is no need for increasing the size of the differential logic network to provide a driver function. The addition of the shut-off device provides a half-rail differential logic circuit with shut-off that does not experience the large or “dip” experienced by prior art half-rail differential logic circuits and is therefore more power efficient.

Abstract: An improved multi-stage binary hierarchy decoder characterized in that at least one of the decoding stages subsequent to the first stage is implemented as a Transmission Gate Matrix (TGM) in which a single transmission gate enables an active input from the previous stage to its output, thereby resulting in reduced area requirements when implemented as an integrated circuit.

Abstract: A semiconductor integrated circuit device is composed of logic gates each provided with at least two MOS transistors. The logic gates are connected to a first potential point and a second potential point. The semiconductor integrated circuit device includes a current control device connected between the logic gate and the first potential point and/or between the logic gate and the second potential point for controlling a value of a current flowing in the logic gate depending on an operating state of the logic gate. The circuit can be used in devices that cycle in operation between high and low power consumption modes, such as microprocessors that have both an operation mode and a low power back-up or sleep mode used for power reduction.

Abstract: A set of deoxyribozyme-based logic gates are capable of generating any Boolean function. The gates include basic NOT and AND gates, and the more complex XOR gate. These gates were constructed through modular design that combines molecular beacon stem-loops with hammerhead-type deoxyribozymes. The gates have oligonucleotides as both inputs and output, thereby communication between various computation elements in solution. The operation of these gates is conveniently connected to a fluorescent readout.

Abstract: A semiconductor integrated circuit device has a high-threshold N-channel type MIS field effect transistor and a load circuit. The high-threshold N-channel type MIS field effect transistor is connected between a real high-potential power supply line and a pseudo high-potential power supply line. The load circuit has a low-threshold P-channel type MIS field effect transistor and a low-threshold N-channel type MIS field effect transistor. A first power supply terminal of the load circuit is connected to the pseudo high-potential power supply line, and a second power supply terminal of the load circuit is connected to a real low-potential power supply line.

Abstract: A circuit for generating a linear current control signal and method thereof is provided so that the error between the input voltage and the linear current remains constant. The circuit of the invention comprises a resistor, an operational amplifier and a MOSFET, which forms an ideal linear relationship between an input voltage and an output current. The operational amplifier generates a gate-controlled voltage when a reference voltage and an input voltage are inputted thereto. The gate voltage turns on the MOSFET so that a linear current control signal is outputted from the source of the MOSFET.