Patents Issued in April 15, 2004
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Publication number: 20040070429Abstract: A low standby current power-on reset circuit is described. A first NMOS transistor's drain is coupled to a first PMOS transistor's drain; source coupled to ground line; and gate coupled to a first capacitor coupled to ground line. The first PMOS transistor's source is coupled to power line; gate coupled to second capacitor coupled to ground line; and drain provides a power-on reset indication. A second PMOS transistor's source is coupled to power line; drain is coupled to drain of second NMOS transistor, gates of first PMOS, second PMOS, and second NMOS transistors, and second capacitor. The second NMOS transistor's source is coupled to gate of first NMOS transistor and first capacitor. A discharge circuit is coupled to power line, ground line, and first and second capacitors for discharging the capacitors when a voltage on power line drops below a level determined by the second PMOS transistor's threshold voltage.Type: ApplicationFiled: October 15, 2002Publication date: April 15, 2004Inventors: Agustinus Sutandi, Daran DeShazo, Jason Stevens, Craig Waller
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Publication number: 20040070430Abstract: A power on reset circuit (POR) includes a first reset circuit for delivering a first reset signal when a supply voltage of the POR circuit is between a first low threshold and a first high threshold, and a second reset circuit for delivering a second reset signal when the supply voltage is between a second low threshold and a second high threshold. The second high threshold is less than the first high threshold. The POR circuit further includes at least one electrically erasable and programmable non-volatile memory cell. A delivery circuit outputs the first reset signal or the second reset based upon on whether the at least one electrically erasable and programmable non-volatile memory cell is in an erased or programmed state. The POR circuit has a threshold for outputting the first or second reset signal that is programmable according to the intended application.Type: ApplicationFiled: August 14, 2003Publication date: April 15, 2004Applicant: STMicroelectronics SAInventor: Francesco La Rosa
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Publication number: 20040070431Abstract: A circuit and method for generating a local clock signal and a telecommunications system incorporating the circuit or the method. In one embodiment, the circuit includes: (1) a phase detector for receiving an input data signal, (2) (at least) first and second continuously controllable delay lines, coupled to the phase detector, for producing respective first and second candidate local clock signals and (3) delay line selector, coupled to the first and second delay lines, for selecting one of the first and second candidate local clock signals to be the local clock signal based on phase excursions in the input data signal.Type: ApplicationFiled: October 11, 2002Publication date: April 15, 2004Applicant: Agere Systems Inc.Inventor: Lindor E. Henrickson
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Publication number: 20040070432Abstract: An apparatus and method for detecting a phase difference between an input signal and a reference signal in an all-digital phase locked loop (PLL) are provided. In a preferred embodiment, an N-stage tapped delay line and N-bit parallel latch are used to create a snapshot of the the input signal by latching the output of the tapped delay line using the reference signal to clock the latch. An edge detector and encoder circuit translate the latched snapshot into a numerical phase difference value. A difference between this phase difference value and a desired phase difference is calculated and then added to an accumulator. The result in the accumulator is a numerical phase error value that can be fed to a numerically controlled oscillator (NCO). The output of the NCO can, in turn, be fed back into the phase/frequency comparator as the input signal, thus forming a fully-digital PLL.Type: ApplicationFiled: July 23, 2003Publication date: April 15, 2004Inventor: Sundeep Chauhan
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Publication number: 20040070433Abstract: A pulse generator circuit is disclosed including a delay element coupled to a logic circuit. The delay element receives a clock signal CLK and a signal X and produces a signal XN dependent upon the clock signal CLK and the signal X. The logic circuit receives the clock signal CLK and the signal XN and produces a signal ACLK such that ACLK=CLK·XN′. The signal ACLK may include a series of positive pulses. The delay element may be, for example, one of multiple delay elements coupled in series, and signal X may be an output of a preceding one of the delay elements. A semiconductor device is described including the above pulse generator circuit and a self-resetting logic circuit. The self-resetting logic circuit receives the signal ACLK and one or more input signals and performs a logic operation using the one or more input signals during the positive pulses.Type: ApplicationFiled: October 10, 2002Publication date: April 15, 2004Applicant: International Business Machines CorporationInventors: Chad Allen Adams, Todd Alan Christensen, Peter Thomas Freiburger
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Publication number: 20040070434Abstract: By using a first delay circuit that delays by a predetermined time a reference pulse signal having a constant pulse width and a second delay circuit that delays by an arbitrary time the output signal of the first delay circuit, a voltage conversion circuit generates an output pulse signal having a variable pulse period, and varies its output voltage according to the pulse period of this output pulse signal.Type: ApplicationFiled: July 25, 2003Publication date: April 15, 2004Inventor: Tomohisa Okuno
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Publication number: 20040070435Abstract: In a duty ratio detecting apparatus, a duty ratio detecting circuit is constructed by first and second nodes, a load current supplying circuit for supplying first and second load currents to the first and second nodes, respectively, and a current switch connected to the first and second nodes. The current switch is operated in response to first and second complementary duty ratio signals. A duty ratio maintaining circuit is constructed by third and fourth nodes for receiving and maintaining voltages at the first and second nodes, respectively. A first switch is connected between the first and third nodes, and a second switch is connected between the second and fourth nodes. The load current supplying circuit is controlled by voltages at the third and fourth nodes.Type: ApplicationFiled: August 28, 2003Publication date: April 15, 2004Inventors: Misao Suzuki, Kazutaka Miyano
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Publication number: 20040070436Abstract: A PWM control circuit, microcomputer and electronic equipment which can generate high-resolution PWM signals through a small-sized scale of circuit. The PWM control circuit includes a PWM period value setting register, a counter, an edge-point value setting register, a PWM output circuit for varying the level of the PWM signal at a first edge-point, and a delay value setting register provided on low order side of the edge-point value setting register, for specifying a delay time of the first edge-point. The PWM output circuit delays the first edge-point by a period smaller than one clock period of CLK, in accordance with the value in the delay value setting register. This can improve the resolution of the PWM signal. One-bit or two-bit value is stored in the delay value setting register. Based on the stored value, the first edge-point can be delayed by ½, ¼, {fraction (2/4)} or ¾ clock period.Type: ApplicationFiled: October 9, 2003Publication date: April 15, 2004Applicant: Seiko Epson CorporationInventors: Makoto Kudo, Katsuya Iida
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Publication number: 20040070437Abstract: A delay adjustment circuit for decreasing a phase shift between a system clock and a feedback clock from a semiconductor's internal clock. The circuit includes a difference-pulse generator that provides an interim clock 180 degrees out of phase with the feedback clock when the feedback clock is leading the system clock, and equal to the feedback clock otherwise. The difference-pulse generator also provides a difference-pulse signal that is at logic high for a period of time by which the system clock and an inversion of the interim clock are phase shifted. The circuit also includes a delay control unit and a delay unit which delay the interim clock by the period of time. The resulting delayed interim clock, which is 180 degrees out of phase with the system clock, is inverted to provide an internal clock in phase with the system clock.Type: ApplicationFiled: October 15, 2002Publication date: April 15, 2004Inventors: Thoai-Thai Le, Ralf Klein
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Publication number: 20040070438Abstract: This is invention about the limiter which disappearance of low swing signal is a little.Type: ApplicationFiled: October 15, 2002Publication date: April 15, 2004Inventor: Kenichi Ohshima
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Publication number: 20040070439Abstract: A buffered bootstrapped input switch employs cancelled charge sharing for use in high performance sample and hold switched capacitor circuits especially useful for implementing, for example, an analog-to-digital converter (ADC) or amplifier circuit front end sampling network, among others. A scheme is employed for estimating the charge loss from the bootstrapping capacitor to the gate of the bootstrapped input switch, storing the estimated charge loss on a small capacitor, buffering the small capacitor, and then adding the estimated charge loss in series to the bootstrap capacitor, to provide an almost ideal bootstrap network.Type: ApplicationFiled: October 12, 2002Publication date: April 15, 2004Inventor: Maher M. Sarraj
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Publication number: 20040070440Abstract: According to some embodiments, a wide-range local bias generator provides a body bias voltage to transistors in an integrated circuit.Type: ApplicationFiled: October 9, 2002Publication date: April 15, 2004Inventors: Stephen H. Tang, Dinesh Somasekhar, James W. Tschanz, Vivek K. De
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Publication number: 20040070441Abstract: A biasing circuit with application to a charge pump environment for coupling the appropriate terminal voltage potentials to the bulk node. Specifically, a pass gate, such as a transistor of an integrated circuit, operates to isolate a boosted voltage input from a boosting device such as a charge pump voltage doubler and to transfer or pass the related charge to an output that is coupled to a charge store. The input and output of the pass gate are subjected to variations in voltage levels creating transient voltage potential relationships between the input (e.g., source), the output (e.g., drain), and the pass gate substrate (e.g., bulk node). Such fluctuations are accommodated through continuous monitoring of the input and output terminals and, when appropriate, coupling the corresponding potential as exhibited at one of the input or output terminals to the substrate or bulk node of the pass gate.Type: ApplicationFiled: October 10, 2002Publication date: April 15, 2004Inventor: Venkatraghavan Bringivijayaraghavan
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Publication number: 20040070442Abstract: A discrete-time analog filter, where a filter tap of the filter comprises a voltage-to-current converter, an active current mirror, and a current multiplier to provide a current signal indicative of a weighted sampled voltage signal. The current signals from the filter taps are summed by one or more active cascode differential latches to provide an output logic signal indicative of the filtered output. The discrete-time analog filter finds applications in channel equalization, and is suitable for high data rates and low voltage applications. The voltage and current signals may be differential. The voltage-to-current converter may include a common-mode high-pass filter to reject common-mode voltage variations.Type: ApplicationFiled: October 9, 2002Publication date: April 15, 2004Inventors: James E. Jaussi, Stephen R. Mooney
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Publication number: 20040070443Abstract: A ladder filter includes multiple inductor sections, each including voltage-controlled current sources and capacitors. A second signal input terminal is provided for the filter separately from an ordinary signal input terminal and a signal, which has been input through the second terminal, is supplied to one of the voltage-controlled current sources by way of a gain calculator. By adjusting the gain obtained by the gain calculator to an appropriate value, the ladder filter can make the numerator of its transfer function freely definable.Type: ApplicationFiled: October 8, 2003Publication date: April 15, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Shiro Dosho, Takashi Morie
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Publication number: 20040070444Abstract: A signal generator controls power output on the basis of the output from a &Dgr;-&Sgr; modulator or oscillator. That output may be generated in real time by the modulator or oscillator and fed to a switch control logic unit which controls a power switching stage to output switchably switched power from a power supply to an output, preferably via a filter. Alternatively the output of a &Dgr;-&Sgr; oscillator or modulator may be stored in a switchable memory to be retrieved when needed. A further alternative is to control the power switching stage by a processor with a program which reproduces the control effect of the &Dgr;-&Sgr; oscillator/modulator Feedback from the output may be used to control the &Dgr;-&Sgr; modulator/oscillator and/or the power supply.Type: ApplicationFiled: July 1, 2003Publication date: April 15, 2004Inventor: Richard David Pearson
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Publication number: 20040070445Abstract: A method and attendant circuitry reduces the number of regulatory and switching devices in a multi-reference switching amplifier. In the preferred embodiment, multiple independently-modulated effective references are summed at a load through use of both linear and switched control of switching devices.Type: ApplicationFiled: August 27, 2003Publication date: April 15, 2004Inventor: Larry Kirn
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Publication number: 20040070446Abstract: A system for measuring a free space electric field includes an ultrahigh impedance antenna positioned in the electric field to generate a signal from the electric field. An amplifier having an input port is provided to amplify the signal. The amplifier generates an input bias current which combines with the signal to create an input potential at the input port. An electrical circuit connects the input port to a ground connection and includes at least one circuit element for controlling the input potential to stabilize the signal at the input port.Type: ApplicationFiled: August 14, 2003Publication date: April 15, 2004Inventor: Michael Andrew Krupka
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Publication number: 20040070447Abstract: An FET band amplifier for reducing a residual noise during gain control. An FET band amplifier 5 included in an AM receiver comprises amplifiers 11 to 15 e.g. at five stages, a BPF 16 inserted halfway in their connection, and an AGC circuit 8. The BPF 16 allows the passage of a component of a band wider than the amplification band of the whole of the FET band amplifier and reduces a 1/f noise by removing a low-band component of a signal output from the amplifier 13 at the third stage and thermal noise by removing the high-band component. This process enables a reduction in a residual noise during gain control included in a signal output from the amplifier 15 at the final stage.Type: ApplicationFiled: August 7, 2003Publication date: April 15, 2004Inventor: Hiroshi Miyagi
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Publication number: 20040070448Abstract: A method of processing an input signal to produce a corrected output signal includes generating a pre-distorted signal by distorting a digital input signal, the distortion based upon characteristics of a main amplifier, and correcting an output signal of the main amplifier to produce the corrected output signal. The output signal of the main amplifier is generated by amplifying the pre-distorted signal with the main amplifier. The correcting is based on a comparison of a signal indicative of the main amplifier output signal and a signal indicative of the digital input signal.Type: ApplicationFiled: October 14, 2002Publication date: April 15, 2004Applicant: RAYTHEON COMPANYInventor: Lawrence P. Strickland
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Publication number: 20040070449Abstract: The present invention relates to a lineariser for use with an amplifier and to a method of linearising an amplifier. The lineariser comprises an input to receive an input signal and an output for outputting an adjusted signal. A gain variations adjustment means are provided for adjusting amplitude dependent gain variations of the signal. A phase variations adjustment means are provided for adjusting amplitude dependent phase variations of the signal. Said gain and phase variations adjustment means are adapted to be individually adjustable elements on the signal path between said input and output. A variable gain amplifier is provided on the signal path between the gain variations adjustment means and phase variations adjustment means. The adjusted signal is then input to said amplifier.Type: ApplicationFiled: December 10, 2003Publication date: April 15, 2004Inventors: Elias Pekonen, Andrzej Haczewski, Jaspal Bhari
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Publication number: 20040070450Abstract: The present invention relates generally to a method and apparatus for cross modulation compensation in RF devices giving rise to cross modulation. A test signal as well as a wanted signal are applied to the RF device in which cross modulation appears. The cross modulation experienced by the test signal is measured, and the result hereby obtained is used for cross modulation compensation of the wanted signal at the RF device output.Type: ApplicationFiled: October 13, 2003Publication date: April 15, 2004Inventor: Bo Lindell
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Publication number: 20040070451Abstract: A dual mode amplifier having single ended and differential ended modes of operation using only one set of output pads or terminals. The dual mode amplifier has two differential amplifiers, connected by coupling circuitry, each differential amplifier receiving a pair of differential input signals and having one output terminal. By activating and deactivating the coupling circuitry, the differential amplifiers can operate in two modes using the one set of output terminals. In the singled ended mode, the differential amplifiers operate independently, each converting the differential input signals to a singled ended output signal at their respective output terminals. In the differential mode, the differential amplifiers operate together to provide a pair of differential output signals at the output terminals based upon the pair of input signals.Type: ApplicationFiled: September 25, 2003Publication date: April 15, 2004Inventors: Bert G. Pihlstrom, Ronnie E. Owens, Barbara J. Duffner, Michael Richter, Ulrich Knoch
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Publication number: 20040070452Abstract: A variable gain amplifier has a gain control circuit. The gain control circuit includes a first control input and a second control input. The first control input receives a first control signal. The gain control circuit varies gain of the variable gain amplifier based on a value of the first control signal. The second control input receives a second control signal. The gain control circuit varies gain slope of the variable gain amplifier based on a value of the second control signal.Type: ApplicationFiled: October 15, 2002Publication date: April 15, 2004Inventors: Issy Kipnis, Yong Chin Kong
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Publication number: 20040070453Abstract: A method and apparatus is provided for detecting the output power of a power amplifier. The output power is detected by detecting the absolute values of the voltage and current at the output of the amplifier and mixing the detected voltage and current to generate a signal related to the output power.Type: ApplicationFiled: September 29, 2003Publication date: April 15, 2004Inventors: Timothy J. Dupuis, David R. Welland, Susanne A. Paul, Ali M. Niknejad
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Publication number: 20040070454Abstract: An amplifier and a bias circuit are disclosed. The bias circuit receives an analog voltage signal that reflects a desired output power level of the amplifier. The bias circuit causes the amplifier to draw a quiescent current, from a fixed-level DC voltage supply, that varies proportionally with the analog voltage signal. In this way, the current consumption of the amplifier is optimized for the desired output power level, while maintaining a desired, high degree of linearity. The amplifier and bias circuit may be in a wireless communications device that includes a baseband processor. The baseband processor generates the analog voltage signal, and a data signal that is converted to a RF signal. The RF signal is amplified by a preamplifier to a power level determined by the analog voltage signal. The RF signal is output to the amplifier for further amplification, and subsequently is broadcast through an antenna.Type: ApplicationFiled: June 27, 2003Publication date: April 15, 2004Applicant: TriQuint Semiconductor, Inc.Inventors: Gregory N. Henderson, Christopher C. Souchuns, Li Liu, Ping Li, On San Andy Tang, Ashley A. Imhoff
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Publication number: 20040070455Abstract: A variable bandwidth, distributed amplifier circuit includes an input transmission line; an output transmission line; and a plurality of amplifier cells having a respective plurality of cell inputs distributed along the input transmission line and cell outputs distributed along said output transmission line. Each amplifier cell comprises a cascode amplifier having an input transistor, an output transistor, and a variable impedance device in a circuit branch coupled to a gate of the output transistor. The impedance of the variable impedance device is responsive to a variable bias control signal.Type: ApplicationFiled: October 11, 2002Publication date: April 15, 2004Inventors: John H. Hong, Jinho Jeong, Won Ko, Nyuntae Kim, Youngwoo Kwon, Kyushik Hong, John Hyunchul Hong
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Publication number: 20040070456Abstract: An audio amplifier system (10) is formed to include a voltage reference (16). The voltage reference (16) is formed to utilize a filter having a first cut-off frequency when the output (14) of the voltage reference (16) is less than a first value and to use a second cut-off frequency when the output (14) is greater than the first value.Type: ApplicationFiled: October 15, 2002Publication date: April 15, 2004Applicant: Semiconductor Components Industries, LLCInventors: Patrick Bernard, Anthony Quelen, Christian Perrin
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Publication number: 20040070457Abstract: A method and apparatus are provided for use with a power amplifier for protecting active devices on the power amplifier. A peak detector is used by control circuitry to detect the presence of a peak voltage that exceeds a threshold voltage. In response to the detection of a peak voltage, the gain of the power amplifier is reduced.Type: ApplicationFiled: September 29, 2003Publication date: April 15, 2004Inventor: Timothy J. Dupuis
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Publication number: 20040070458Abstract: An oscillator system is provided to have a plurality of delay paths coupled in a loop. The oscillator system also has an improved AC feedforward path coupled in parallel with one or more delay paths in the loop. The AC feedforward path includes first and second parallel sections. The first parallel section has a plurality of parallel branches and is configured for receiving one or more control signals. The plurality of parallel branches is selectively conducted in response to the one or more control signals. The second parallel section is coupled in series with the first parallel section and is configured to remain conducting when any of the plurality of parallel branches becomes conducting. The first and second parallel sections are configured to transmit an AC feedforward signal when conducting.Type: ApplicationFiled: October 10, 2002Publication date: April 15, 2004Applicant: International Business Machines CorporationInventor: David William Boerstler
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Publication number: 20040070459Abstract: One embodiment of the present invention provides a ring oscillator with a digitally programmable frequency. This ring oscillator includes an odd number of inverting stages coupled input to output to form a ring, and a programming mechanism configured to digitally program the drive strength for each inverting stage in the ring oscillator, thereby changing the propagation delay between inverting stages and thereby allowing the frequency of the ring oscillator to be adjusted. In a variation on this embodiment, a given inverting stage includes a plurality of tri-state inverters coupled in parallel, so that inputs of the tri-state inverters are coupled to a common input for the given inverting stage, and outputs of the tri-state inverters are coupled to a common output for the given inverting stage. Moreover, each of the tri-state inverters can be selectively enabled, thereby allowing the drive strength of the given inverting stage to be adjusted.Type: ApplicationFiled: October 11, 2002Publication date: April 15, 2004Inventor: Ken L. Motoyama
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Publication number: 20040070460Abstract: A microwave oscillator comprises a semiconductor oscillating element, e.g. a Gunn diode (3) mounted at least partially within a dielectric substrate (1). The oscillating element is arranged, in use, to generate power at a predetermined fundamental frequency and at an harmonic frequency. The oscillator further comprises a circuit pattern (4) on the substrate arranged to transmit the power generated at the harmonic frequency to an output (10) whilst holding transmission of the power at the fundamental frequency.Type: ApplicationFiled: September 16, 2003Publication date: April 15, 2004Inventor: Phillip Norton
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Publication number: 20040070461Abstract: The present invention proposes a new way of improving the phase stability and frequency selectivity of a phase shift oscillator (100). By introducing a filter-order enhancing feedback loop (124) in association with a phase shift filter (122) in the oscillator, higher-order phase shift filtering can be achieved without using inductive elements as in conventional higher-order LC phase shift filters. This is a great advantage, since a high Q-value can be obtained without limited by the relatively high internal losses of inductive elements (L).Type: ApplicationFiled: November 20, 2003Publication date: April 15, 2004Inventor: Jesper Fredriksson
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Publication number: 20040070462Abstract: An oscillator package with an improved crystal mount. The oscillator package has substrate with a top cavity and a bottom cavity. Vias extend through the substrate between the top and bottom cavities. A semiconductor die is located in the bottom cavity and is covered by a sealant. A crystal is located in the top cavity. The crystal is mounted in the top cavity using a thermosonically deposited gold bump. The gold bump is attached between an electrode pad and a contact pad. The gold bump provides an electrical connection between the crystal and the substrate and supports the crystal. A cover and seal ring are attached to substrate to hermetically seal the top cavity.Type: ApplicationFiled: October 10, 2002Publication date: April 15, 2004Inventors: Iyad Alhayek, Jaroslaw Adamski, Marc Black, Craig Ernsberger, Jason B. Langhorn
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Publication number: 20040070463Abstract: A voltage-controlled oscillator in which a tunable resonator (102) having a first port (132) and a second port (106) is disclosed. In one embodiment, the tunable resonator is a series resonating circuit having low driving and load impedances. A power gain element (108) is coupled to the first port and the second port, and an output port (110) is coupled to the power gain element and the second port. The first impedance at the first and second ports is less than approximately ten ohms. The voltage-controlled oscillator is capable of generating a signal at the output port of greater than approximately half a watt.Type: ApplicationFiled: October 10, 2002Publication date: April 15, 2004Applicant: General Dynamics Decision Systems, Inc.Inventors: Michael N. Pickett, Robert H. Bickley
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Publication number: 20040070464Abstract: An apparatus is provided that includes a clock distribution network, a plurality of distributed oscillators provided about the clock distribution network so as to provide clock signals on the clock distribution network and a power control circuit to control power applied to the plurality of distributed oscillators. The power control circuit includes a bandgap device to produce a reference voltage based on a desired power level and a comparing/decision device to receive the reference voltage from the bandgap device and to receive the voltage signal from a source external to the apparatus. The comparing/decision device determines whether the signal received from the power source corresponds to the desired power level.Type: ApplicationFiled: October 6, 2003Publication date: April 15, 2004Inventors: Keng L. Wong, Hong-Piao Ma, Greg F. Taylor
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Publication number: 20040070465Abstract: A distributed data transmitter (DTXR) which is an adaptive data communication microwave transmitter having a distributable architecture of modular components, and which incorporates both digital and microwave technology to provide substantial improvements in physical and operational flexibility. The DTXR has application in, for example, remote data acquisition involving the transmission of telemetry data across a wireless link, wherein the DTXR is integrated into and utilizes available space within a system (e.g., a flight vehicle). In a preferred embodiment, the DTXR broadly comprises a plurality of input interfaces; a data modulator; a power amplifier; and a power converter, all of which are modularly separate and distinct so as to be substantially independently physically distributable and positionable throughout the system wherever sufficient space is available.Type: ApplicationFiled: October 15, 2002Publication date: April 15, 2004Inventors: Kenneth Dewayne Brown, David Dunson
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Publication number: 20040070466Abstract: A distributed data transmitter (DTXR) which is an adaptive data communication microwave transmitter having a distributable architecture of modular components, and which incorporates both digital and microwave technology to provide substantial improvements in physical and operational flexibility. The DTXR has application in, for example, remote data acquisition involving the transmission of telemetry data across a wireless link, wherein the DTXR is integrated into and utilizes available space within a system (e.g., a flight vehicle). In a preferred embodiment, the DTXR broadly comprises a plurality of input interfaces; a data modulator; a power amplifier; and a power converter, all of which are modularly separate and distinct so as to be substantially independently physically distributable and positionable throughout the system wherever sufficient space is available.Type: ApplicationFiled: December 12, 2002Publication date: April 15, 2004Applicant: Honeywell Federal Manufacturing & Technologies, LLCInventors: Kenneth D. Brown, David Dunson
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Publication number: 20040070467Abstract: A wave-guide having at least two connection points. In order to adapt a physical distance between these points to a variable distance between connection points of external equipment, at least one connector (20) is provided having a first connecting member (31) for connection to a connection point (28) of the wave-guide and a second connecting member (33) for connection to a connection point of the external equipment. The connecting members of the connector are laterally displaced such that rotation of the second connecting member (33) about the first one (31) results in a variation of the distance between the second connecting member and another connection point of the wave-guide.Type: ApplicationFiled: June 11, 2003Publication date: April 15, 2004Inventors: Claes-Goran Lowenborg, Joakim Ostin
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Publication number: 20040070468Abstract: A noise filter includes four magnetic layers including upper and lower magnetic layers and intermediate magnetic layers which are laminated to define a laminated unit. Two signal lines are disposed side by side between the intermediate magnetic layers, and two ground electrodes sandwich the intermediate magnetic layers therebetween so as to form a transmission line. A dielectric member is disposed between the two signal lines. With this configuration, a common-mode signal is attenuated by utilizing magnetic loss in the magnetic layers. In contrast, by providing the dielectric member, a normal-mode signal is allowed to propagate by reducing the effective relative magnetic permeability while preventing the occurrence of blunt waves.Type: ApplicationFiled: August 21, 2003Publication date: April 15, 2004Inventor: Toru Harada
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Publication number: 20040070469Abstract: The invention relates to a surface acoustic wave filter (or SAW filter) comprising a symmetrical network with differential inputs/outputs, in particular for mobile telecommunication systems.Type: ApplicationFiled: September 4, 2003Publication date: April 15, 2004Inventors: Victor Plessky, Laurent Kopp
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Publication number: 20040070470Abstract: A longitudinally coupled resonator type surface acoustic wave filter includes a small pitch electrode finger portion having electrode fingers of which the pitch is smaller than that of the other electrode fingers. The small pitch electrode finger portion is provided in the end of at least one of interdigital transducers which is adjacent to the other interdigital transducer. Moreover, the small pitch electrode finger portion includes two adjacent electrode fingers in at least one position thereof which are electrode-inverted so that the polarities of the two adjacent electrode fingers are made the same.Type: ApplicationFiled: March 23, 2002Publication date: April 15, 2004Inventor: Yuichi Takamine
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Publication number: 20040070471Abstract: A radio frequency electronic filter includes an input, an output, and first and second resonators coupled to the input and the output, with the first resonator including a first voltage tunable dielectric varactor and the second resonator including a second voltage tunable dielectric varactor. The resonators can include a lumped element resonator, a ceramic resonator, or a microstrip resonator. Additional voltage tunable dielectric varactors can be connected between the input and the first resonator and between the second resonator and the output. Voltage tunable dielectric varactors can also be connected between the first and second resonators.Type: ApplicationFiled: October 9, 2003Publication date: April 15, 2004Inventors: Yongfei Zhu, Louise C. Sengupta
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Publication number: 20040070472Abstract: A gradient coil structure for use in MRI apparatus has a main gradient coil 20 and a shielding coil 21, a portion of the shielding coil being disposed outwardly from the main coil. The coils are configured so that in a peripheral region 25 relative to the image region 22 the are almost coincident and the coils extend forwardly at an angle to the remainder of the main coil so that the main coil appears concave from the imaging region 22. This arrangement provides improved shielding efficiency.Type: ApplicationFiled: October 8, 2003Publication date: April 15, 2004Applicant: Tesia Engineering Ltd.Inventor: Frederick Thomas David Goldie
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Publication number: 20040070473Abstract: The invention relates to a low-voltage power switch, wherein the drive device (16) is fixed by means of a supporting framework (17,19) and the associated switch shaft (8) is fixed, by means of two axially external bearing sub-assemblies, to the switch pole sub-assembly (1) In order to ensure that the fitting corresponds to a position based on separate examination of the drive device, the bearing arrangement has an additional, axially central bearing sub-assembly. Said bearing sub-assembly consists of two half-shells (25 and 26) which are axially fixed by means of guide surfaces (45 or 55,56,57 and 58), whereby one is radially supported on the switch pole sub-assembly (1) and the other is radially supported on the supporting framework (17,18) of the drive device (16).Type: ApplicationFiled: August 14, 2003Publication date: April 15, 2004Inventors: Torsten Ahlert, Ludvik Godesa, Marc Liebetruth
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Publication number: 20040070474Abstract: A new type of switching mechanism for a ground fault circuit interrupter (GFCI) with reverse wiring protection preferably includes two pairs of fixed contact holders, each member of each pair having at least one fixed contact at one end; a pair of movable contact holders, each having an end having one or more of movable contacts, each movable contact being arranged for contacting one of the fixed contacts; and a movable assembly that moves between first and second positions, wherein the first position is a position in which each of the contacts of the fixed contact holders makes contact with one of the contacts of the movable end of one of the movable contact holders, and wherein the second position is a position in which the contacts of the fixed contact holders are separated from the contacts of the movable contact holders.Type: ApplicationFiled: March 13, 2003Publication date: April 15, 2004Inventors: Zhixin Wu, Yinxian Wang, Kuidong Zhang
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Publication number: 20040070475Abstract: In order to cool the windings, core and optionally the wall of the element (1) receiving the windings (3,4) and the core (2) as effectively as possible, conducting surfaces (5, 6, 8,15) are disposed inside said element in such a way that the flow of coolant initially passes along the windings (3,4), followed by the limbs (21,22) of the core surrounded by the windings, and subsequently the other areas (23, 24, 1). Said arrangement of conducting surfaces is particularly suitable for use with transformers having superconductive windings made of HTSL conductor material.Type: ApplicationFiled: October 2, 2003Publication date: April 15, 2004Inventors: Wolfgang Nick, Reinhard Schlosser, Heinz Schmidt, Peter van Hasselt
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Publication number: 20040070476Abstract: A magnetic head apparatus with which a magneto-optical recording and reproducing apparatus can be made thin is provided. The magnetic head apparatus includes: a supporting material having an elastic portion; a magnetic head hoisting and lowering member capable of being brought into contact with and separating from the supporting material; a magnetic head pressing member capable of being brought into contact with and separating from the supporting material of a pressing portion. The head main body is capable of moving between a first position in which the head main body approaches or is brought into contact with the information recording medium and a second position in which the head main body is far away from the information recording medium.Type: ApplicationFiled: August 28, 2003Publication date: April 15, 2004Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Yutaka Murakami, Hironori Tomita, Kenji Kubo
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Publication number: 20040070477Abstract: A pencil ignition coil assembly module (40) that has a frusto-conically tapered core (46) and encapsulation (280) surrounding the side of the core. Features (216, 230, 234) center the core to a bobbin 48. A retainer (240, 240A) captures the core within the bobbin.Type: ApplicationFiled: September 18, 2003Publication date: April 15, 2004Applicant: Visteon Global Technologies, Inc.Inventors: Aex William Widiger, David Charles Stine, Todd Christopher Sexton, William Douglas Walker
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Publication number: 20040070478Abstract: An improved electromagnetic work coil for use with an electromagnetic force machine that produces a pulling (tension) force on a conductive panel work piece. The electromagnetic work coil comprises a coil with insulated conductor windings passing through a clamped stressing region. The work coil further contains mating terminals and is encapsulated in a nonmagnetic housing. A clamp on the stressing region comprises two clamp surfaces and a part in tension outside of the stressing region to tangentially compress the windings in the stressing region. The preferred embodiment the winding paths around the stressing region are made symmetric to provide a centered linear pulling area with a symmetric magnetic field. The conductor windings are tapered that increase in height and width outside of the stressing region to improve thermal and electrical conductivity and decrease the magnetic field outside of the stressing region.Type: ApplicationFiled: July 24, 2003Publication date: April 15, 2004Inventor: Robert R. Olsen