Abstract: A power supply control device, a power supply control circuit, a power supply control method, and an electronic apparatus wherein a determination is made of whether or not a switching element therein is in an ON state. When the switching element is in the ON state, a voltage generated across the switching element is detected in accordance with a current flowing through the switching element. In accordance with the detected voltage, the switching element is controlled and thereby an output voltage is controlled.

Abstract: A band-gap reference circuit comprising a first current source for generating a first reference current and a first circuit branch for receiving part of the first reference current. The first circuit branch comprises a first resistor having a positive temperature coefficient in series with a base-emitter junction of a first PNP diode having a negative temperature coefficient. An emitter current of the first PNP diode develops a first combined voltage across the first resistor and the base-emitter junction. A comparison circuit compares the first combined voltage to a base-emitter voltage of a second PNP diode and adjusts a band-gap reference voltage. A correction current generating circuit injects a correction current into an emitter of the second PNP diode that at least partially offsets a non-linear drop-off in the band-gap reference voltage caused by the second PNP diode as temperature increases.

Abstract: The present invention, generally speaking, provides a method and apparatus for accurately measuring a communications signal. In accordance with one aspect of the invention, DC offset effects and nonlinearities attributable to a communications amplifier are made spectrally separable from DC offset effects and nonlinearities attributable to the measurement apparatus. Spectral separability may be accomplished, for example, by adding an offset frequency to a local oscillator used by a downconverter of the measurement apparatus. As a result, the signal of interest is moved away from baseband (zero frequency) to the offset frequency. Similarly, other nonlinearities in the video amplifier (such as third order distortion) manifest theselves mostly at harmonics of the offset frequency. Hence spectral separability between the power amplifier characteristics and these nonlinear impairments of the measurement system is achieved.

Abstract: A method for measuring composite distortion levels using a coherent multicarrier RF signal generator having incrementally related frequencies is disclosed. The invention provides for the use of a coherent multicarrier signal generator that permits arbitrary RF carrier phase control on an individual carrier basis in order to enable sequential distortion measurements under varying carrier phase conditions. In order to obtain measurement results that match those obtained by the use of prior art non-coherent signal sources, the present invention provides for averaging of distortion measurement results over a ‘phase configuration ensemble’ that is obtained by multiple sequential measurements, in which the individual carrier phases for each measurement are preselected at random.

Abstract: An opto-electric device for measuring the root mean square value of an alternating current voltage has: a) an electric field-to-light-to-voltage converter having 1) a light source; 2) an electro-optic material: (a) receiving light from the light source; (b) modulating said light; and (c) providing a modulated light output; 3) an electric field applied to the electro-optic crystal to modulate the light from the light source to produce the modulated light output; b) an optical receiver for receiving and converting the modulated output light from the electro-optic material to a first voltage that is proportional to a square of the electric field applied to the electro-optic material; c) an averager circuit receiving the first voltage and providing a second voltage that is proportional to the average of said square of said electric field over a period of time; and d) an inverse ratiometric circuit receiving the second voltage from the averager circuit and returning a third voltage that is an inverse voltage of th

Abstract: Lighting of buildings is costly in terms of electric power, and in view of this, disclosure is made of apparatus and method for comparison of electric power usage with incandescent or HID, high intensity discharge, lighting source compared to an alternate lighting source, such as fluorescent tube lights, to give the same or adequate light reading on a light meter as attained by an incandescent or HID, high intensity discharge light source then measuring the ampere reading at the same voltage of each lighting source to determine the KW demand to further determine lowest lighting cost, which then in effect will equate to a virtual power plant, which can be a considerable saving of cost and reduction of atmospheric pollution.

Abstract: In order to calibrate a test system for semiconductor components, use is made of a test substrate which has connecting contact points that are associated with one another in pairs. The contact points of the pairs are disposed at different distances from one another and they are connected by conductor tracks of approximately the same length. As a result, equalization of all the signal paths is achieved. In each case, a probe belonging to a probe card or a reference probe is placed onto the connecting contact points of a pair, so that the test system can be calibrated as far as a respective connecting contact of a component.

Abstract: A pair of resistors, having substantially equivalent resistance are arranged in series so that two data output lines of a differential data driver are connected to the ends of the series of resistors, the potentials of the two output signals ((D+)data output signal and (D−)data output signal) from the differential data driver are resistively divided to detect the sum of the potentials of the two signals. Based on the voltage of the combined signal, the acceptability of the differential signals of the differential data driver is determined.

Abstract: A device is presented having an optical emitter/receiver device. The device has a light pipe connected with the optical emitter/receiver device. Also a rotating shaft having at least one opening. The light pipe is situated within the rotating shaft. At least one bearing having a reflective marker is connected to the shaft.

Abstract: A device and a method for determining a magnetic field with respect to its intensity and direction at at least one detection location, and uses a first arrangement for superimposing an auxiliary magnetic field, known at least in intensity, on the magnetic field, and a second arrangement for measuring at least the direction of the magnetic field resulting from the superimposition of the magnetic field to be determined and of the auxiliary magnetic field at the detection location. The magnetic field is determined at the detection location in that the resultant magnetic field produced by the magnetic field to be determined and the auxiliary magnetic field is determined with respect to its direction for at least two different auxiliary magnetic fields; and the magnetic field to be determined is calculated therefrom. The method is especially suited for determining the intensity and direction of a magnetic field in the immediate vicinity of the surface of a magnet.

Abstract: A rotation angle sensor comprises permanent magnets 4, 5 having opposite poles facing each other, and a flux density detecting unit 10 which performs relative rotation between the permanent magnets 4, 5. Opposite magnetic pole surfaces 11, 12 of the permanent magnets 4, 5 are formed in a curved shape so that the flux density between the permanent magnets 4, 5 can be suitably distributed. In this way, the resolution of the sensor can be increased without increase in cost.

Abstract: Electronic circuit for dimension-measuring device with magneto-resistive electrodes supplying at least one feed voltage for feeding a network of magneto-resistive electrodes and a measuring circuit comprising two differential inputs connected to the network. The measuring circuit uses a rough counter and a fine interpolation circuit for determining from the two sinusoidal input signals received the position of the sensor along the scale. The feed circuit periodically reduces the supplied electric feed voltage so as to temporarily lessen the dissipation of energy in the magneto-resistive electrodes.

Abstract: A method which compensates errors resulting from offset voltages and external magnetic fields when a magnetic sensor is used to measure coating thickness. The method also allows compensation of a temperature dependent change for output voltages of the magnetic sensor.

Abstract: An apparatus and method for the repeatable detection and recording of low-threshold molecular electromagnetic signals. The sample material and detection apparatus are contained with a magnetically shielded faraday cage to shield them from extraneous electromagnetic signals. The detection apparatus includes a detection coil and Super Conducting Quantum Interference Device (“SQUID”). White noise is injected external to the SQUID and the signals emitted by the sample material enhanced by stochastic resonance.

Abstract: A nuclear decay laser that produces a stream of nuclear decay particles and/or photons of electromagnetic radiation. The stream of nuclear decay particles and/or photons is produced by subjecting radioactive materials to an external magnetic field which causes the radioactive nuclei to align with and precess around the external magnetic field vector. The precessing radioactive nuclei are then subjected to Radio Frequency (RF) pulses tuned to the Larmor frequency of the precessing nuclei which causes the nuclei to flip out of the plane of the external magnetic field vector into the X-Y plane. A refocusing RF pulse is then applied to the radioactive material which brings all of the magnetic moments of the flipped radioactive nuclei into phase. This can also be achieved with MRI gradient echo technology.

Abstract: An imaging sequence, which generates a static image data set and a plurality of differently diffusion-weighted data sets, is repeated and the data sets stored in memories (360, 361, . . . , 36N). Each data set is reconstructed into corresponding images stored in sub memories (380, 381, . . . , 38N). The images are compared macroscopically (40) and shifted (42) into optimal alignment. Local regions of the images are analyzed (44) and adjusted (46) for better conformity. The static images and like spatially encoded images are compared with each other and those outside a preselected similarity threshold are rejected (48). The remaining like images are combined (50) and subject to a diffusion analysis (52) to generate an image of an anisotropic structure in the imaging region. The anisotropic structure and other image information are displayed on a monitor (58).

Abstract: The present invention provides systems and methods which can be employed to locate or detect presence of various materials, including nonferrous metals. These systems include new and useful sensors, circuits, systems and devices which power and/or interoperate with the sensors, and methods of making, operating and using such systems. Any or all of the systems, devices or processes can be combined with other systems, devices or processes disclosed.

Abstract: An instrument for geophysical measurement of magnetic field strength, using a GMR sensor is provided. The instrument achieves high sensitivity across a relatively wide bandwidth in an instrument which is small and lightweight. The instrument makes it feasible to obtain data, substantially simultaneously, at a plurality of locations and/or frequencies, thus not only reducing time requirements involved in measurements but reducing or eliminating the need for correcting data for changes in earth's magnetic fields. The instrument has relatively high vector sensitivity and relatively low power consumption.

Abstract: A relay circuit test extender is adapted to facilitate testing of relays and relay circuits in a vehicle. The test extender includes a plurality of elongated bundled wires having first and second opposing ends, and adapted for carrying current in an electric circuit between a vehicle relay receptacle and a removable electric relay. A male connector is located at the first end of the bundled wires, and includes a plurality of electric pins electrically connected to respective wires and adapted for being inserted into respective pin openings of the vehicle relay receptacle. A female connector is located at the second end of the bundled wires, and defines a plurality of pin openings adapted for receiving respective pins of the removable electric relay.

Abstract: Voltage reversal in fuel cell stacks may be detected and/or prevented by monitoring each cell or small groups of cells in the stack for low voltage conditions. An improved cell voltage monitor is constructed using a plurality of voltage monitoring units in which each unit comprises a heating resistor, a rectifier in series therewith, and a sensing thermistor in thermal communication with the heating resistor. The heating resistor is electrically-connected across a cell or cells and heats the associated sensing thermistor in accordance with the voltage of the cell(s). Since the resistance of the sensing thermistor is indicative of its temperature and hence also of voltage of the cell(s), the sensing thermistor resistance can be used to signal a low voltage condition.

Abstract: The present invention relates to a contact sensor that detects contact between two objects and includes a first conductor separated from a second conductor by a crushable layer with a predetermined crush resistance. The crushable layer deforms under pressure such that a signal passes between the first and second conductor.

Abstract: A temperature controlled high voltage regulator for automatically adjusting the high voltage applied to a radiation detector is described. The regulator is a solid state device that is independent of the attached radiation detector, enabling the regulator to be used by various models of radiation detectors, such as gas flow proportional radiation detectors.

Abstract: A fill-level detector operating by the radar principle gauges the fill-level of the lower of two substances layered one atop the other in a container. The detector incorporates first and second essentially straight, parallel electrical conductors having a signal generator and a transducer mounted to the upper ends of the conductors with the lower ends of the conductors protruding into the lower substance. The generator delivers a signal to the first conductor which signal is conducted into the lower substance with a portion of that signal being reflected at the interface of the two substances which signal portion is captured by the transducer. The detector is able to determine to fill level of the lower substance even when the upper substance displays a high dielectric constant.

Abstract: An inductive sensory system generally includes a sense inductor, a reference sense inductor, an oscillator, a feedback control loop, and a comparator. The oscillator is connectable to both the sense inductor and the reference sense inductor. Upon the oscillator being connected to the reference sense inductor, the feedback control loop establishes a fixed reference level. Upon the sense inductor being connected to the oscillator, the comparator compares the state of the sense inductor against a threshold that is derived from the fixed reference level to determine the change in inductance of the sense inductor.

Abstract: Capacitive film thickness measurement devices and measurement systems used in machines or instruments. A capacitance measurement device and technique useful in determining lubricant film thickness on substrates such as magnetic thin-film rigid disks. Variations in lubricant thickness on the Angstrom scale or less may be measured quickly and nondestructively.

Abstract: Disclosed is an improved bioelectrical impedance gauge which is so designed that the high-frequency current flowing between two selected points in a living body may be detected in the vicinity of either selected point, and that the voltage appearing between two points selected in the current passage in which the high-frequency current flows may be applied to a high-impedance buffer circuit proximate to the two points selected in the current passage.

Abstract: A resistance-type liquid level measuring apparatus which suppresses a detection voltage error due to silver sulfide within a permissible range in practical use and enables measurement indication with accuracy, and comprises a resistance-type sensor including a float 9 floating according to a liquid level, an insulating substrate 6 having a plurality of conductor electrodes 4 connected with a resistor 5, and a movable contact interlocked with a movement of the float 9 to come in contact with the conductor electrodes 4 on the insulating substrate 6, in which a material containing silver is used as a material of the conductor electrodes 4 or the movable contact, a voltage dividing resistance 11 is connected with a power source BA in series with the resistor 5, and a voltage of a connection point between the voltage dividing resistance 11 and the resistor 5 is outputted as a signal corresponding to the liquid level, and resistance values of the voltage dividing resistance 11 and the resistor 5 are set so that a v

Abstract: First and second resistors (sensing elements) are connected in series between first and second potentials. The junction point voltage between the first and second resistor is supplied to an inverting input of a first operational amplifier. The non-inverting input is supplied with a reference voltage Vref generated by third and fourth resistors. A feedback resistor is connected between output and inverting input of the operational amplifier OP1. The difference between a temperature coefficient of resistance TCR of the sensing elements and a temperature coefficient of sensitivity TCS is equalized to a temperature coefficient of resistance of the feedback resistor. Further, the reference voltage is unchanged in accordance with the detected physical quantity or temperature variation.

Abstract: A semi-conductor wafer test or burn-in apparatus having spring contacts made from a shape memory metal which plastically deforms under normal test loading and has a transition temperature at or above or at or below the burn-in temperature.

Abstract: Disclosed are a probe structure for testing semiconductor devices and a method for fabricating the probe structure. The fabricated probe structure of the present invention satisfies the high density, the uniformity of size, height and spacing, and the integration of elements. The probe structure of the present invention solves the conventional problems such as long fabrication time of the probe structure, difficulty in finely controlling the structure of the probe structure, complexity of the whole process, mechanical instability of the products, and difficulty in uniformly assembling a plurality of the probe structures. Additionally, the probe structure of the present invention solves several problems caused in an actual testing step of the semiconductor devices, for instance, long testing time of the semiconductor device, difficulty in providing the sufficient contact force between the probe structure and the semiconductor device, and having to specially design the test pads of the semiconductor device.

Abstract: A direct current and a modulation signal are simultaneously applied to contact pads on a wafer to test certain devices, such as a laser diode. A probe, probing system, and method of probing reduces signal distortion and power dissipation by transmitting a modulated signal to the device-under-test through an impedance matching resistor and transmitting of a direct current to the device-under-test over a signal path that avoids the impedance matching resistor.

Abstract: A device carrier capable of reliably measuring electric characteristics of the device with accuracy and an auto-handle are provided. The device carrier holds an IC having terminals on a lower face thereof at multiple positions, and allows the terminals to be brought into contact with contacts provided on an IC socket, wherein the device carrier comprises an opening through which the device can pass, a support part disposed on the opening for supporting the lower face of the IC, and a hinge part for turnably supporting the support part, wherein said supporter part is turned to release the support of the device when the socket approaches thereto. The supporter part engages with the release pins as the device carrier approaches to the IC socket to be turned so as to release the support of the lower face of the IC. The IC which has been released from being supported by the supporter part passes through the opening and is placed on the IC socket.

Abstract: An improved structure composite-type test fixture consisting of a stack planar postured flush against the upper surface of a probe board which is situated on the upper extent of a base such that holes predisposed in the face of the probe board provides for the entry of probe barrels. Comprised of a top board, a thickness board, and a pliant plastic board, the stack planar has through-holes predisposed in a certain alignment that provides for the insertion of probes to the various connection points of a circuit board being tested. The tips of the probes are in a range of different diameters and size specifications, the top extremities protrude from the upper surface of the stack planar, and the distal extremities consist of a single specification insert section that fit into the probe barrels. Each probe barrel has an internally disposed spring.

Abstract: A probe pin for testing electric characteristics of a semiconductor device comprises a silicon pin core (3, 23, 33), and a conductive film (4, 24, 34) covering the entire surface, including the bottom face, of the pin core. The bottom face of the probe pin is connected directly to an electrode (7, 37) positioned in or on a print wiring board. A number of probe pins can be connected to the associated electrodes at a high density, thereby forming a fine-pitch probe card having a superior high-frequency signal characteristic.

Abstract: Signal paths within an interconnect structure linking input/output (I/O) ports of an integrated circuit (IC) tester and test points of an IC die on a wafer are tested for continuity, shorts and resistance by using the interconnect structure to access a similar arrangement of test points on a reference wafer. Conductors in the reference wafer interconnect groups of test points. The tester may then test the continuity of signal paths through the interconnect structure by sending test signals between pairs of its ports through those signal paths and the interconnecting conductors within the reference wafer. A parametric test unit within the tester can also determine impedances of the signal paths through the interconnect structure by comparing magnitudes of voltage drops across pairs of its I/O ports to magnitudes of currents it transmits between the I/O port pairs.

Abstract: A method and apparatus for testing the chip-to-package connectivity of a common I/O of a semiconductor chip is disclosed which uses reduced pin count testing methods. The method includes driving a test signal transition onto a control pad of a semiconductor chip with a weak driver and comparing the transition rise time with a threshold value. For an I/O with a faulty chip-to-package connection, the rise time is much faster than for an I/O with a completed chip-to-package connection. Additional impedances may also be added to the tester fixturing to increase the sensitivity of the test equipment to the capacitance of the I/O connections.

Abstract: A system for monitoring semiconductor testing tools comprises a tester testing a semiconductor device, whereby a test result is derived, a storage device storing a logic function corresponding to the semiconductor device, and a processor receiving the test result and the logic function from the tester and storage device respectively, and applying the logic function to the test result for validation.

Abstract: In a method of testing a semiconductor integrated circuit, an input signal is applied to the semiconductor integrated circuit. Current passing through the elements of the semiconductor integrated circuit is repeatedly measured while sequentially changing the logical state of the elements. The standard deviation of the currents measured is calculated and a semiconductor integrated circuit is determined to be defective if the standard deviation exceeds a threshold value.

Abstract: There is provided a test board for testing semiconductor devices by connecting a plurality of DUTs (semiconductor devices under the test) with a test head, and transmitting test signals from the test head to the plurality of DUTs. The test board comprises a motherboard connected to the test head; a multi-layer wiring board connected to each of the plurality of DUTs; and a scramble board disposed between the motherboard and the multi-layer wiring board. The motherboard and the scramble board, and the multi-layer wiring board and the scramble board are each connected by female connectors and male connectors.

Abstract: A first on-chip test structure monitors hot carrier degradation. A degrading ring oscillator is subjected to hot carrier effects while a non-degrading ring oscillator is not. As the device ages, hot carrier effects degrade the degrading ring counter. The second test structure monitors TDDB degradation. A plurality of N parallel connected capacitors have a stress voltage applied to them such that the time to failure of the first capacitor is the same that experienced by percentage of gates under normal usage. A drop in the resistance indicates breakdown of a capacitor. The third test structure monitors electromigration degradation. M minimum width metal lines are connected in parallel. A current is applied such that the time to failure of all metal lines is the same as that experienced by a percentage of minimum width metal lines under normal usage. An increase in resistance indicates breakdown of a metal line.

Abstract: A polarizer 25 in a light-incident optical system includes a polarized-light polarization axis 25t parallel to a predetermined direction. As a result of the passage of light through the polarizer 25, linearly polarized light Li including a vibration plane that includes the direction of the polarized-light polarization axis 25t is formed, and is incident upon a liquid crystal panel 10 at an incident angle &thgr;i. On the other hand, a detecting optical system is set so as to detect specularly reflected light formed as a result of the reflection of the linearly polarized light Li that has impinged upon the liquid crystal panel 10 at the incident angle &thgr;i. The specularly reflected light that exits from the liquid crystal panel 10 at an exiting angle &thgr;o that is substantially equal to the incident angle &thgr;i is incident upon a polarizer 26, and is eventually guided to a light detector 29.

Abstract: A rapid single-flux-quantum RSFQ logic circuit includes a first circuit portion having a first end grounded and having in-series connected first and second Josephson junctions. A second circuit portion has a first end grounded and has in-series connected third and fourth Josephson junctions. A first inductance element connects a second end of the first circuit portion to a second end of the second circuit portion. A tap is provided in the first inductance element, an input current signal being supplied to the tap. A bias current source is connected to a first connection node between the first and second Josephson junctions. A second inductance element connects the first connection node to a second connection node between the third and fourth Josephson junctions. A superconducting quantum interference device has fifth and sixth Josephson junctions and is coupled to the second inductance element through a magnetic field.

Abstract: The invention relates to a circuit of which the operating rate varies according to temperature, supply voltage and intrinsic quality of the transistors of the circuit, associated to a compensating circuit which comprises a constant current source (26) that produces a substantially constant current which is independent of temperature, supply voltage and intrinsic quality of the transistors of the circuit, a variable current source (28) producing a current that increases in an inverse proportion to temperature, supply voltage and intrinsic quality of the transistors of the circuit, and means for decreasing the operating rate of the circuit when the difference of the currents produced by the first and second sources increases.

Abstract: The invention includes digital logic devices with extremely skewed trip points and reset circuitry for rapidly propagating signal edges. Embodiments of skewed logic devices in accordance with the present invention include inverters, buffers, NOR gates and NAND gates for rapidly propagating a selected “fast” edge of an input signal. Additional embodiments include pulse stretchers, memory devices, substrates, computer systems and methods incorporating the skewed logic devices of the present invention. Each embodiment of a skewed logic device of the present invention is configured to propagate either a fast rising edge or fast falling edge of an output signal, i.e., the “fast” edge, at rates comparable to those of domino logic. An advantage of the skewed logic devices of the present invention over conventional CMOS logic devices is rapid edge propagation. Additionally, virtually all of the input gate loading is devoted to the fast edge being propagated.

Abstract: A line driver for coupling a data transceiver to a transmission line having a load impedance via a transformer with a turns ratio of 1:n includes an input port for receiving an input signal voltage from the data transceiver, an output port for supplying an output signal voltage to the transformer, and an amplifier circuit for amplifying the input signal voltage. The amplifier circuit includes a first output stage, a second output stage coupled to the output port, an output resistor coupled to the first output stage, a feedback path from the first output stage to an input of the amplifier circuit, and a line matching network coupled between the first output stage and the second output stage, for compensating variations in the load impedance, so that a synthesized output impedance of the line driver substantially matches an actual load impedance Z of the transmission line.

Abstract: A microcontroller with a mixed analog/digital architecture including multiple digital programmable blocks and multiple analog programmable blocks in a communication array having a programmable interconnect structure. The single chip design is implemented by integration of programmable digital and analog circuit blocks that are able to communicate with each other. Robust analog and digital blocks that are flash memory programmable can be utilized to realize complex design applications that otherwise would require multiple chips and/or separate applications. The programmable chip architecture includes a novel array having programmable digital blocks that can communicate with programmable analog blocks using a programmable interconnect structure. The programmable analog array contains a complement of Continuous Time (CT) blocks and a complement of Switched Capacitor (SC) blocks that can communicate together.

Abstract: In one form of the invention, circuitry having exclusive-OR and latch functionality includes timing circuitry and logic circuitry. The circuitry includes a memory, with first and second memory nodes, for storing a state and its complement, and first and second timing circuitry portions, each operable to receive at least one timing signal, coupled to the respective memory nodes. The logic circuitry includes first and second logic circuitry portions, each of which is operable to receive at least first and second data signals. Each of the logic circuitry portions is coupled in series with a conditionally conductive path of one of the respective first and second timing circuitry portions.

Abstract: A technique and circuitry interfaces a programmable logic integrated circuit compatible with one voltage level to other integrated circuits compatible with a different voltage level. In particular, an on-chip voltage less than the external supply level of the programmable logic integrated circuit is provided to a core portion of a programmable logic integrated circuit by way of a conversion transistor. In an embodiment, the layout (or physical structure) of the conversion transistor is distributed surrounding the core portion. Externally, the programmable logic integrated circuit will interface with an external supply voltage level. The input and output signals to and from the programmable logic integrated circuit will be compatible with the external supply level.

Abstract: A clock buffer of a DRAM includes: a first NAND gate which is driven by a first internal power supply voltage (2.5 V) and which determines the level of an input clock signal if the DRAM is used for a TTL-system interface (MLV=2.5 V); and a second NAND gate which is driven by a second internal power supply voltage (1.8 V) and which determines the level of the input clock signal if the DRAM is used for a 1.8 V-system interface (MLV=0 V). Accordingly, in each of the first and second NAND gates, sizes of four MOS transistors can be set at optimum values, respectively.

Abstract: A bi-directional bus-interface chip has no direction-control input. A forward buffer and a reverse buffer are both normally disabled in the high-impedance state. When a transition occurs on one input bus, a driver transistor in the forward or reverse buffer is activated to pass the transition through the bus-interface chip. After a delay, the driver transistor is disabled. An optional bus-hold circuit maintains voltage levels on buses when driver transistors are disabled. The delay can be selectable by shorting delay resistors in the delay circuit. The high-level voltages on the two busses may differ. The bus-interface chip converts one voltage domain to another and can re-generate weak signals. A pre-buffer may be added to gradually step up the voltage level when differences in voltage domains are large.