Patents Issued in July 1, 2004
  • Publication number: 20040124516
    Abstract: A second conductive pattern 14 is provided on the upper surface of a circuit device 10. A second conductive pattern 14 is provided on the upper surface of an insulating resin 13 which seals a built-in first circuit element 12, etc., and a first conductive pattern 11 and the second conductive pattern 14 are electrically connected via connection means 15. Second circuit elements 22 are mounted on the second conductive pattern 14. Thus, circuit elements can be three-dimensionally mounted. Furthermore, since the circuit device 10 eliminates the need for a mounting substrate, a low-profile circuit device is provided.
    Type: Application
    Filed: November 5, 2003
    Publication date: July 1, 2004
    Inventors: Takeshi Nakamura, Yusuke Igarashi, Noriaki Sakamoto
  • Publication number: 20040124517
    Abstract: Embodiments of stiffening members in accordance with the present invention provide a mechanical support that is wave soldered to the frontside of the system substrate simultaneously with other wave soldered components. The stiffening member comprises a flat plate with a plurality of mounting pins. The number of mounting pins are predetermined to provide the plate with sufficient support to resist expected loading conditions when wave soldered in plated through holes on a system substrate. The mounting pins are adapted for insertion into plated through holes on the system substrate. The length of the mounting pins are predetermined to account for the height of the SMT component upon which it is attached, the thickness of the system substrate, and the desired amount of mounting pin protrusion from the backside of the system substrate. The stiffening members consume very little system substrate space while retaining a platform for heat dissipation.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: George Hsieh, David Shia, Tom E. Pearson
  • Publication number: 20040124518
    Abstract: A semiconductor multi-package module has an inverted second package stacked over a first package, in which the stacked packages are electronically interconnected by wire bonds, and in which at least one of the packages is provided with an electrical shield. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die and having a shield, affixing an upper molded package including an upper substrate in inverted orientation onto an upper surface of the lower package, and forming z-interconnects between the upper and lower substrates. Where the shield is situated above the lower package substrate, the inverted upper package is affixed onto an upper surface of the shield.
    Type: Application
    Filed: October 8, 2003
    Publication date: July 1, 2004
    Applicant: ChipPAC, Inc.
    Inventor: Marcos Karnezos
  • Publication number: 20040124519
    Abstract: A contact structure for establishing electrical connection with contact targets. The contact structure is formed of a contactor carrier and a plurality of contactors attached to a contactor carrier. The contactors are inserted in diagonal through holes on the contactor carrier and attached to the contactor carrier through adhesives. The contactor has a top end having a flat top surface, a straight diagonal beam integral with the top end and configured by an upper beam portion and a lower beam portion, and a lower end at an end of the lower beam portion to contact with a contact target. A probe contact assembly using the contact structure is also disclosed which incorporates a flip chip bonding technology to interconnect the components therein.
    Type: Application
    Filed: October 10, 2003
    Publication date: July 1, 2004
    Inventors: Yu Zhou, David Yu
  • Publication number: 20040124520
    Abstract: An electronic device may include first, second, and third substrates wherein the second electronic substrate is between the first and second electronic substrates. A first electrical and mechanical connection may be provided between the first and third electronic substrates, and a second electrical and mechanical connection may be provided between the second and third electronic substrates. In addition or in an alternative, an electronic device may include a printed circuit board, a first electronic substrate on the printed circuit board, a second electronic substrate on the first electronic substrate, and a third electronic substrate on the second electronic substrate. More particularly, the first electronic substrate may be between the printed circuit board and the second electronic substrate, and the second electronic substrate may be between the first and third electronic substrates.
    Type: Application
    Filed: October 21, 2003
    Publication date: July 1, 2004
    Inventor: Glenn A. Rinne
  • Publication number: 20040124521
    Abstract: A rectangular termination ring for a power distribution mesh is placed on the upper two layers of an integrated circuit and may be placed over some I/O circuitry. The strapping connecting the bonding pads to the termination ring are placed on upper levels of the integrated circuit, minimizing the via requirements and freeing space for additional circuitry. Further, the termination ring may be adapted to work in conjunction with L-shaped, as well as other power distribution meshes.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: Maad Al-Dabagh, Thomas Antisseril, Bo Shen, Prasad Subbarao, Radoslav Ratchkov
  • Publication number: 20040124522
    Abstract: A pin-assignment method is provided for use on an IC package to arrange pin connections. The pin-assignment method can allow an improvement in the electro-static discharge (ESD) protection capability for the IC chip packed in the IC package. Specifically, the pin-assignment method organizes the no-connect pins of the IC package into groups and then assigns each of the two pins that bound each no-connect pin group to be connected to a power bus of the IC chip. This allows for an increased ESD protective capability for the no-connect pins. Moreover, the pin-assignment method can simplify the wiring complexity of the IC package.
    Type: Application
    Filed: September 16, 2002
    Publication date: July 1, 2004
    Applicant: Winbond Electronics Corp.
    Inventor: Shi-Tron Lin
  • Publication number: 20040124523
    Abstract: A semiconductor device package is disclosed which is substantially die-sized with respect to each of the X, Y and Z axes. The package includes outer connectors that are located along at least one peripheral edge thereof and that extend substantially across the height of the peripheral edge. Each outer connector is formed by severing a conductive via that extends substantially through a substrate blank, such as a silicon wafer, at a street located adjacent to an outer periphery of the semiconductor device of the package. The outer connectors may include recesses that at least partially receive conductive columns protruding from a support substrate therefore. Assemblies may include the packages in stacked arrangement, without height-adding connectors.
    Type: Application
    Filed: December 15, 2003
    Publication date: July 1, 2004
    Inventors: Chia Yong Poo, Boon Suan Jeung, Low Siu Waf, Chan Min Yu, Neo Yong Loo, Chua Swee Kwang
  • Publication number: 20040124524
    Abstract: A shielding device includes optical and/or electrical shielding disposed on the side of the integrated circuit in the semiconductor chip facing the substrate. Preferred configurations use an SOI substrate with the integrated circuit in the body silicon layer and the insulator layer as a device for optical shielding from the bulk silicon layer. Electrical conductors may be present as an optical and electrical shielding device in the bulk silicon layer, and they may be connected to the circuit using vias.
    Type: Application
    Filed: August 8, 2003
    Publication date: July 1, 2004
    Inventors: Christian Aumuller, Marcus Janke, Peter Hofreiter
  • Publication number: 20040124525
    Abstract: In an integrated circuit structure, such as in an MCM or in an SCM, a particulate thermally conductive conformable material, such as a thermal paste, is applied between a heat-generating chip and a cooling plate. Modification of the microstructure of at least one of the two nominally parallel surfaces which are in contact with the material is provided in a discrete pattern of sloped recesses. The largest particles in the material preferentially migrate downward into the recesses. The average thickness of the conductive paste is reduced to below the diameter of the largest particles dispersed in the material, providing improved cooling.
    Type: Application
    Filed: December 27, 2002
    Publication date: July 1, 2004
    Applicant: IBM
    Inventors: Evan George Colgan, John Harold Magerlein, Robert Luke Wisnieff, Jeffrey Allen Zitz
  • Publication number: 20040124526
    Abstract: A composition including an amount of at least one vinyl terminated polymer; an amount of at least one cross-linker comprising a terminal Si—H unit; an amount of at least one thermally conductive first filler, and at least one thermally conductive second filler, wherein a melting point of the first filler is greater than the melting point of the second filler. An apparatus including a package configured to mate with a printed circuit board; a semiconductor device coupled to the package; a thermal element; and a curable thermal material disposed between the thermal element and the semiconductor device.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 1, 2004
    Inventors: James C. Matayabas, Paul A. Koning, Ashay A. Dani, Christopher L. Rumer
  • Publication number: 20040124527
    Abstract: A method and apparatus for making a multiply folded BGA package design with shortened communication paths and more electrical routing flexibility. A package apparatus includes a substrate and a first integrated circuit (IC), wherein the first IC is electrically connected to the first face of the substrate, and wherein a first segment and a second segment of the substrate are both folded around the first IC. A second IC is electrically connected to the second face of the substrate, such that the second IC is connected to the first and second folded segments of the substrate abode the first IC.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventor: Chia-Pin Chiu
  • Publication number: 20040124528
    Abstract: Metal line structures in semiconductor devices and methods of forming the same are disclosed.
    Type: Application
    Filed: November 13, 2003
    Publication date: July 1, 2004
    Inventor: Jae Suk Lee
  • Publication number: 20040124529
    Abstract: A semiconductor device has: a semiconductor substrate having an integrated circuit and an electrode that is connected electrically to the integrated circuit; a resin layer formed on a surface of the semiconductor substrate on which the electrode is formed, but avoiding the electrode; and a wiring layer that is connected electrically to the electrode and has a land which is located on the resin layer. A penetrating hole that exposes the resin layer is formed in the land.
    Type: Application
    Filed: October 6, 2003
    Publication date: July 1, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Terunao Hanaoka
  • Publication number: 20040124530
    Abstract: Metal nitride and metal oxynitride extrusions often form on metal suicides. These extrusions can cause short circuits and degrade processing yields. The present invention discloses a method of selectively removing such extrusions. In one embodiment, a novel wet etch comprising an oxidizing agent and a chelating agent selectively removes the extrusions from a wordline in a memory array. In another embodiment, the wet etch includes a base that adjusts the pH of the etch to selectively remove certain extrusions relative to other substances in the wordline. Accordingly, new metal silicide structures can be used to form novel wordlines and other types of integrated circuits.
    Type: Application
    Filed: July 3, 2003
    Publication date: July 1, 2004
    Inventors: Gary Chen, Li Li, Yongjun Jeff Hu
  • Publication number: 20040124531
    Abstract: The invention relatse to a copper diffusion barrier which includes a diamond-like material includes carbon, hydrogen, silicon, oxygen and a metal and is a copper diffusion barrier. Another aspect of the invention relates to an integrated circuit which includes a copper interconnect, a dielectric material and the copper diffusion barrier.
    Type: Application
    Filed: January 30, 2004
    Publication date: July 1, 2004
    Inventors: Chandra Venkatraman, Cyndi L Brodbeck, Matthew P Kirk
  • Publication number: 20040124532
    Abstract: The semiconductor device of the present invention includes: a substrate; a first conductor film supported by the substrate; an insulating film formed on the substrate to cover the first conductor film, an opening being formed in the insulating film; and a second conductor film, which is formed within the opening of the insulating film and is in electrical contact with the first conductor film. The second conductor film includes: a silicon-containing titanium nitride layer formed within the opening of the insulating film; and a metal layer formed over the silicon-containing titanium nitride layer. The metal layer is mainly composed of copper.
    Type: Application
    Filed: December 18, 2003
    Publication date: July 1, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Takeshi Harada
  • Publication number: 20040124533
    Abstract: A method and apparatus for making an imprinted conductive circuit using semi-additive plating. A plurality of indented channels is formed on the substrate. The surface is coated with a conductive layer. Portions of the surface other than the indented channels are coated with a non-conductive layer, and metal is plated on the conductive layer in the channels. The non-conductive layer and the first conductive layer are removed from portions of the surface other than the indented channels. In some embodiments, a first set of channels has a first depth and a second set of channels has a second depth. The plating adds a first amount of metal in the first set of channels and the second set of channels. The first set of channels is coated with a non-conductive layer, and a second amount of additional conductive material is plated in the second set of channels.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: Milan Keser, Boyd L. Coomer
  • Publication number: 20040124534
    Abstract: Methods and apparatus for increasing the yield achieved during high density interconnect (HDI) production. In particular, processes in which panels are tested to identify good cells/parts, good cells are removed from the panels, and new panels created entirely of identified/known good cells allow increases in the number of layers used in a HDI without incurring the decrease in yield normally associated with such a layering process.
    Type: Application
    Filed: June 12, 2003
    Publication date: July 1, 2004
    Inventors: Richard Pommer, Simon McElrea, Brad Banister
  • Publication number: 20040124535
    Abstract: A substrate with stacked vias and fine circuits and a method for fabricating the substrate are proposed. A core layer is formed with a metal layer respectively on upper and lower surfaces thereof, and at least one through hole. A first insulating layer is applied over the metal layer on the upper surface of the core layer and selectively formed with at least one first opening for exposing the metal layer. A metal layer is formed within the first opening, and a second insulating layer is applied over the first insulating layer and formed with a plurality of second openings, wherein the metal layer within the first opening is exposed via at least one second opening. After a conductive layer is applied over the second insulating layer and within the second openings, a metal layer is formed within the second openings. Finally, the conductive layer is removed by micro-etching.
    Type: Application
    Filed: August 29, 2003
    Publication date: July 1, 2004
    Inventor: Ruei-Chih Chang
  • Publication number: 20040124536
    Abstract: Disclosed is a semiconductor device comprising an underlying film, a first electrode formed on the underlying film, a first dielectric film formed on the first electrode, a second electrode formed on the first dielectric film, and a first interconnect including a first conductive portion extending in a stack direction of the first electrode, the first dielectric film and the second electrode, a side surface of the first conductive portion being in contact with one of the first electrode and the second electrode.
    Type: Application
    Filed: October 10, 2003
    Publication date: July 1, 2004
    Inventor: Moto Yabuki
  • Publication number: 20040124537
    Abstract: A multilayer interconnection structure includes a first interconnection layer having a copper interconnection pattern and a second interconnection layer having an aluminum interconnection layer and formed on the first interconnection layer via an intervening interlayer insulation film, wherein a tungsten plug is formed in a via-hole formed in the interlayer insulation film so as to connect the first interconnection layer and the second interconnection layer electrically. The via-hole has a depth/diameter ratio of 1.25 or more, and there is formed a conductive nitride film between the outer wall of the tungsten plug and an inner wall of the via-hole such that the entirety of the conductive nitride film is formed of a conductive nitride.
    Type: Application
    Filed: December 16, 2003
    Publication date: July 1, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Toshio Takayama, Kuniyuki Narukawa, Hiroshi Mizutani
  • Publication number: 20040124538
    Abstract: A multi-layer integrated semiconductor structure including a first device layer having a first plurality of semiconductor elements. A first insulating layer is disposed over the first device layer and includes at least a first via-hole. A first conductive plug is disposed in the first via-hole. An interface portion is disposed over at least the first conductive plug. The multi-layer integrated semiconductor structure further includes a second device layer. The second device layer includes a second plurality of semiconductor elements disposed on a top surface of a substrate, which includes a second via-hole. A second conductive plug is disposed in the second via-hole. The second device layer is aligned and coupled to the first device layer via the interface portion so that the interface portion provides a communication relationship between the first device layer and the second device layer.
    Type: Application
    Filed: September 5, 2003
    Publication date: July 1, 2004
    Inventors: Rafael Reif, Shamik Das, Andy Fan
  • Publication number: 20040124539
    Abstract: A multi-chip stack flip-chip package comprises a substrate and a chip assembly on the substrate. The chip assembly includes a dummy chip and a flip chip. The dummy chip has a redistribution layer that has a plurality of bump pads for mounting the flip chip, a plurality of peripheral pads for electrically connecting to the substrate, and a plurality of integrated circuit traces connecting the bump pads with the peripheral pads. The dummy chip is disposed between the flip chip and the substrate as an electrically connecting interface between the flip chip and the substrate for multi-chip flip-chip stack and fine pitch flip-chip mounting.
    Type: Application
    Filed: October 31, 2003
    Publication date: July 1, 2004
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chaur-Chin Yang, Sung-Fei Wang
  • Publication number: 20040124540
    Abstract: A flip chip package structure comprising a chip, a substrate, at least a first bump and a plurality of second bumps is provided. The chip has a first bump-positioning region and the substrate has a second bump-positioning region. The substrate has at least a first hole and multiple second holes. The first hole and the second holes are located within the second bump-positioning region. The first hole has a depth greater than that of the second hole. The first bump is set up between the first bump-positioning region of the chip and the second bump-positioning region of the substrate. The first bump is bonded to the substrate through the first holes. The second bumps are set up between the first bump-positioning region of the chip and the second bump-positioning region of the substrate. The second bumps are bonded to the substrate through the second holes. The first bump has a volume greater than the volume of the second bump.
    Type: Application
    Filed: December 24, 2003
    Publication date: July 1, 2004
    Inventors: YU-WEN CHEN, MING-LUN HO, SHIH-CHANG LEE, CHIH-HUANG CHANG
  • Publication number: 20040124541
    Abstract: A flip chip package mainly includes a semiconductor chip disposed in a recessed cavity defined in an upper surface of a substrate by flip chip bonding. The lower surface of the substrate is provided with a reinforcement-containing insulating layer thereby enhancing mechanical strength thereof. The upper surface of the substrate is provided with a plurality of solder pads formed at the periphery of the recessed cavity for making external electrical connections. The substrate includes a plurality of chip contact pads provided on the surface of the reinforcement-containing insulating layer and exposed from the recessed cavity wherein the chip contact pads are electrically connected to the solder pads through a plurality of conductive traces.
    Type: Application
    Filed: October 8, 2003
    Publication date: July 1, 2004
    Inventors: Sung Mao Wu, Hsueh Te Wang, Chi Pin Hung
  • Publication number: 20040124542
    Abstract: It is an object of the present invention to provide a technique for making a semiconductor device thinner without using a back-grinding method for a silicon wafer. According to the present invention, an integrated circuit film is mounted, thereby making a semiconductor device mounting the integrated circuit film thinner. The term “an integrated circuit film” means a film-like integrated circuit which is manufactured based on an integrated circuit manufactured by a semiconductor film formed over a substrate such as a glass substrate or a quartz substrate. In the present invention, the integrated circuit film is manufactured by a technique for transferring.
    Type: Application
    Filed: December 16, 2003
    Publication date: July 1, 2004
    Inventors: Hideaki Kuwabara, Junya Maruyama, Yumiko Ohno, Toru Takayama, Yuugo Goto, Etsuko Arakawa, Shunpei Yamazaki
  • Publication number: 20040124543
    Abstract: A semiconductor device (121) is provided which comprises a substrate and a die (123) having a first surface which is attached to the substrate by way of a die attach material. At least a portion (127) of the perimeter of the die is resistant to wetting by the die attach material, either through treatment with a dewetting agent or by selective removal of the backside metallization. It is found that this construction allows the surface area of the die to be increased without increasing the incidence of cracking and chipping along the sawn edges of the die.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 1, 2004
    Applicant: Motorola Inc.
    Inventors: Brian W. Condie, David J. Dougherty
  • Publication number: 20040124544
    Abstract: An adhesive film for semiconductor, which comprises at least one resin layer, and, after bonded to a lead frame, has at 25° C. a 90°-peel strength of at least 5 N/m between the resin layer and the lead frame, and, after a lead frame is bonded to the adhesive film for semiconductor and sealed with a sealing material, has at least at one point of temperatures ranging from 0 to 250° C a 90°-peel strength of at most 1000 N/m between the resin layer and each of the lead frame and the sealing material; a lead frame and a semiconductor device using the adhesive film for semiconductor; and a method of producing a semiconductor device.
    Type: Application
    Filed: December 15, 2003
    Publication date: July 1, 2004
    Inventors: Toshiyasu Kawai, Hidekazu Matsuura
  • Publication number: 20040124545
    Abstract: An integrated circuit package comprising a substrate having terminal pads arranged in at least one row along a perimeter of a surface of the substrate, vias connecting the terminal pads directly to connectors on an opposite side of the substrate, a semiconductor chip mounted on the substrate, inside the perimeter, the chip having bond pads located on a surface of the chip, and a plurality of insulated bond wires, each of the bond wires extending from a bond pad on the chip to a terminal pad on the substrate, the substrate being sized and shaped to provide a sufficient number of rows of terminal pads and associated vias so that horizontal traces through the substrate are not required.
    Type: Application
    Filed: December 15, 2003
    Publication date: July 1, 2004
    Inventor: Daniel Wang
  • Publication number: 20040124546
    Abstract: A packaged integrated circuit which includes a die 700 having a surface and corners separated by edges. The die surface includes depressions 600, 720 so that mold compound 114 covering the die surface fills the depressions. The filling of the depressions in the die surface enhances the adhesion of the mold compound to the die. The die can include bond pads 714, in which case the depressions can take the form of slots 720 in the bond pads. In addition, the depressions can take the form of trenches 600 at the surface of the die in a dielectric layer 703. The trenches can be at the die corners and along the die edges.
    Type: Application
    Filed: September 9, 2003
    Publication date: July 1, 2004
    Inventors: Mukul Saran, Rajesh K. Gupta
  • Publication number: 20040124547
    Abstract: A semiconductor device includes at least one semiconductor structure having a plurality of external connection portions on an upper surface, and an insulating member which is made of a resin containing reinforcing materials and arranged on a side of the semiconductor structure. An insulating film is formed on the upper surface of the semiconductor structure, except the external connection portions, and on an upper surface of the insulating member. A plurality of upper wirings each of which has a connection pad portion are located on an upper side of the insulating film and electrically connected to a corresponding one of the external connection portions of the semiconductor structure. The connection pad portion of at least one of the upper wirings is arranged above an upper surface of the insulating member.
    Type: Application
    Filed: December 15, 2003
    Publication date: July 1, 2004
    Applicant: Casio Computer Co., Ltd.
    Inventor: Hiroyasu Jobetto
  • Publication number: 20040124548
    Abstract: The water carbonation method and apparatus of the present invention consists of a square mixer within a carbonated chamber. The mixer is partially filled with water. Carbon dioxide is then added above the level of water. A rotating member attached to the mixing motor then mixes the water and carbon dioxide to from a carbonated solution. Varying the time for which the carbonation operation is carried on may vary the degree of carbonation.
    Type: Application
    Filed: September 30, 2003
    Publication date: July 1, 2004
    Inventors: Gyorgy Rona, Janos Oscenas, Scott Nicol
  • Publication number: 20040124549
    Abstract: In accordance with the present invention, a method and system is described for controlling the delivery of vapor from a bubbler containing a supply of chemical fluid through which a carrier gas is bubbled and from which bubbler vapors are delivered in a vapor stream entrained with the carrier gas. In general, the present invention involves equilibrating the pressure within the head space to that of the chemical fluid fill line, thus maintaining a constant fluid level based on pressure and not relying on conventional level sensors and controllers.
    Type: Application
    Filed: September 16, 2003
    Publication date: July 1, 2004
    Inventor: William J. Curran
  • Publication number: 20040124550
    Abstract: Membrane strip diffusers are disclosed, useful for example in aerating wastewater in activated sludge plants. These diffusers have membranes, diffuser bodies and gas conduits elongated in the same general direction. Such conduits may be attached to or formed integrally with the diffuser bodies. Gas chambers form beneath the membranes when they inflate, and these are separate from but communicate with the gas conduits, e.g., through passageways distributed along the lengths of the membrane supports. Preferably, the passageway flow cross-sections are small, thus tending toward uniform distribution of gas along the membrane's length. Ways to edge- and end-seal the membranes to the diffuser bodies are also disclosed.
    Type: Application
    Filed: August 13, 2003
    Publication date: July 1, 2004
    Applicant: ITT MANUFACTURING ENTERPRISES, INC.
    Inventors: Thomas J. Casper, Mark A. Schoenenberger, Brad D. Laubenstein, James A. Reilly, Joseph G. Krall
  • Publication number: 20040124551
    Abstract: An apparatus for spinning melt-spun filament yarns including a spin beam is disclosed. A polymer melt fed to a spin beam is distributed within the spin beam to a plurality of spinning cans mounted on the spin beam. To reduce costs to the manufacturer for ensuring ease of disassembly of the spin beam, as well as to avoid the need for disassembling the spin beam and having a furnace on hand, the spin beam is provided with an integrated or removably attachable regenerative heater by which the melt-conducting components of the spin beam can be heated to a regeneration temperature of between about 450 to 550° C. to pyrolytically remove the deposits.
    Type: Application
    Filed: December 11, 2003
    Publication date: July 1, 2004
    Inventor: Tilman Reutter
  • Publication number: 20040124552
    Abstract: A method for manufacturing a cured, toothed belt is carried out upon a on a belt-making machine. The method includes incrementally molding sections of the belt with tooth spacing based on an estimated pitch circumference derived from a measured inside circumference, defining and measuring a length of a remaining uncured portion of the belt, the length of the remaining uncured portion of the belt being compared to a design length, a difference between the length of the remaining uncured portion of the belt and the design length being an error; and, adjusting a distance between a centerline of the first drum and the second drum, so that a compensating error is evenly distributed over the remaining uncured portion of the belt.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Applicant: The Goodyear Tire & Rubber Company
    Inventor: Douglas Bruce Wood
  • Publication number: 20040124553
    Abstract: A lightweight member is provided for reinforcing, sealing or baffling structures of articles of manufacture such as automotive vehicles. The lightweight member preferably includes a carrier member having a cellular structure and an expandable material disposed thereon.
    Type: Application
    Filed: October 16, 2003
    Publication date: July 1, 2004
    Applicant: L&L Products, Inc.
    Inventors: Michael J. Czaplicki, David Carlson
  • Publication number: 20040124554
    Abstract: This invention relates to an isolation gasket intended to reduce the damage and wear of finishing layers, such as ceramic tiles, when installed over a rigid support layer, such as concrete. The disclosed isolation gasket prevents the propagation of cracks that may develop in the supporting layer through to the finishing layer. A preferred isolation gasket is a low-density, crosslinked polyolefin foam having a density of from about 60 kg/m3 to about 200 kg/m3, a compressive strength of from about ⅕ kg/cm2 to about 8 kg/cm2, a shear strength of at least 2 mm, and a thickness of at least 0.5 mm.
    Type: Application
    Filed: September 22, 2003
    Publication date: July 1, 2004
    Applicant: Toray Plastics (America), Inc.
    Inventors: Jeff Lippy, Glenn Owens, Andrew Aitken, Alan Franc
  • Publication number: 20040124555
    Abstract: Uniformly sized granules are formed using the present extruder and granulation process. The extruder contains a spiral worm screw for guiding a granulation material to an apertured plate. The spiral worm screw is rotated within a chamber and is formed from a guiding slant which terminates at a blunt edge near the apertured plate. The blunt edge rubs the granulation material against the apertured plate which softens the material forming a semi-solid material. The semi-solid material is then gently pushed through the apertured plate using just the required pressure. The granules are formed when the semi-solid material hardens after exiting the apertured plate.
    Type: Application
    Filed: February 26, 2003
    Publication date: July 1, 2004
    Inventors: Prakash Mahadeo Jadhav, Jai Shroff
  • Publication number: 20040124556
    Abstract: Molding material consisting of resin coated reinforcing fibers in a molten mass of resin and fibers is prepared at a molding site for controlled supply to a molding machine. A conveying device, such as a pair of pinch rollers, serves to pull fibers from supply spools through guide orifices of a coating die having a chamber within which the fiber is coated with molten resin. Further impregnation of the fibers with resin takes place in the conveying device, which also develops pressure on its output side serving to push the mass of hot resin and fiber into a receiving device for movement to a molding machine. The receiving device may be the feed screw for an injection molding machine or simply a plate movable to and from a compression molding machine. The fibers may be cut into predetermined lengths by a cutting device positioned downstream of the aforesaid conveying device.
    Type: Application
    Filed: October 24, 2003
    Publication date: July 1, 2004
    Inventor: Ronald C. Hawley
  • Publication number: 20040124557
    Abstract: A cellulose acetate film is produced from a solution of a cellulose acylate in a mixed solvent. The mixed solvent comprises a main solvent and an alcohol. The mixed solvent essentially does not contain chlorine atom. The main solvent comprises an ester and a ketone. The ester has a solubility parameter of 16 to 23. The ketone has a solubility parameter of 16 to 23. The alcohol has a solubility parameter of 20 to 30. The mixed solvent comprises the ester in an amount of 58 to 96 wt. %, the ketone in an amount of 2 to 15 wt. %, and the alcohol in an amount of 2 to 40 wt. %.
    Type: Application
    Filed: March 20, 2003
    Publication date: July 1, 2004
    Inventor: Tsukasa Yamada
  • Publication number: 20040124558
    Abstract: A procedure for sequential molding of an assembled object and a machine for the performance of the procedure are provided. A mold has a stationary front part, a movable back part and at least one turnable middle part. After the molding of the first part of an object, the middle part is turned at least once around an axis orthogonal to the moving direction between the front part and the back part, before the molding of the following part of the object takes place. Injection and cooling can take place in the front part and in the back at the same time. In an alternative embodiment, the middle part can be fitted with insulation to maintain a higher temperature between different regions of the mold assembly, making it possible to mold together considerably different materials such as a thermo plastic material and an elastomer, a silicone, or metal and plastic.
    Type: Application
    Filed: July 31, 2003
    Publication date: July 1, 2004
    Inventor: Jes Tougaard Gram
  • Publication number: 20040124559
    Abstract: A mold for casting a cover for a golf ball is disclosed herein. The mold is composed of a first mold half and a second mold half. Each mold half has an internal hemispherical cavity and a plurality of recesses in flow communication with the internal hemispherical cavity. The recesses are preferably concave on one side of the parting line and convex on the opposing side of the parting line. Preferably, the mold assembly is utilized to mold a polyurethane cover on a golf ball precursor product.
    Type: Application
    Filed: January 27, 2004
    Publication date: July 1, 2004
    Applicant: CALLAWAY GOLF COMPANY
    Inventor: Steven S. Ogg
  • Publication number: 20040124560
    Abstract: Method for producing a power drive belt having drive teeth on both sides of the belt. The teeth include abrasion resistant facing fabric on both sides of the belt. The power drive teeth are molded on both sides of the belt slab in a planar mold having power teeth-forming recesses in first and second mold halves. In a preferred method, a portion of the belt is transfer molded by pressing tooth stock material through the cord layer and another portion of the belt is compression molded. The mold is provided with edge channels and/or waste pockets to accommodate excess tooth forming material generated during the molding process.
    Type: Application
    Filed: October 23, 2003
    Publication date: July 1, 2004
    Applicant: The Goodyear Tire & Rubber Company
    Inventors: Jason Wolter Klein, Douglas Bruce Wood
  • Publication number: 20040124561
    Abstract: Disclosed is a kit for making transparent soaps at home and a method for making transparent soaps using the kit, which can be used to conveniently make transparent soaps having various shapes at one time at home. The kit includes an upper plate and a sidewall extending downward from the entire edge of the upper plate. The upper plate has a plurality of mould cavities opened upward. The method includes the steps of preparing a transparent soap composition, melting the transparent soap composition, injecting the molten composition to the kit, solidifying the molten composition and taking the solidified soap out of the kit.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 1, 2004
    Inventor: Byeng-Ro An
  • Publication number: 20040124562
    Abstract: A process for forming a polyphenylene sulfide (PPS) component is disclosed. The PPS is molded at a temperature of about 110° C. to about 150° C. After molding, the PPS has a morphology that is at least fifty percent polycrystalline. The component is then annealed to further increase the polycrystalline portion of the PPS morphology. To effect this increase, the component is annealed at a temperature that is at least above the glass transition temperature of the molded PPS component but below its melting temperature. The component is used in optical applications and other applications in which alignment tolerances are small.
    Type: Application
    Filed: March 22, 2001
    Publication date: July 1, 2004
    Inventors: Harvey Edward Bair, John William Osenbach
  • Publication number: 20040124563
    Abstract: A method of increasing the efficiency of a multiphoton absorption process and apparatus. The method includes: providing a photoreactive composition; providing a source of sufficient light for simultaneous absorption of at least two photons; exposing the photoreactive composition to at least one transit of light from the light source; and directing at least a portion of the first transit of the light back into the photoreactive composition using at least one optical element, wherein a plurality of photons not absorbed in at least one transit are used to expose the photoreactive composition in a subsequent transit.
    Type: Application
    Filed: December 12, 2002
    Publication date: July 1, 2004
    Inventors: Patrick R. Fleming, Robert J. DeVoe, Catherine A. Leatherdale, Todd A. Balen, Jeffrey M. Florczak
  • Publication number: 20040124564
    Abstract: The present invention relates to a process for the preparation of a novel chemically modified fibrin-fibrillar protein (FFP) composite sheet for medical application and the FFP composite prepared thereby. The FFP sheet finds potential use as a dressing aid in the treatment of various external wounds of different nature, which include cut wounds, burn wounds and even ulcers in animals and human beings.
    Type: Application
    Filed: December 30, 2002
    Publication date: July 1, 2004
    Inventors: Sheik Eusuff Noorjahan, Mandyam Devasikamani Ranganayaki, Ganga Radhakrishnan, Bhabendra Nath Das, Ummadisetty Venkateswarlu, Chellan Rose, Thotapalli Parvathaleswara Sastry
  • Publication number: 20040124565
    Abstract: The present invention provides an efficient method for topically treating and drying fibrous web materials such as nonwoven web materials and nonwoven laminate materials without unduly damaging the materials due to excessive heating during drying.
    Type: Application
    Filed: December 26, 2002
    Publication date: July 1, 2004
    Inventors: Daniel Kenneth Schiffer, Clayton James Logan, Michael David Powers, Hue Scott Snowden