Abstract: The invention relates to a method and an apparatus for regulating a current through an inductive load, which can be connected to a power supply, to a prescribed nominal current value, where the method comprises the following method steps: a) turning on and off the power supply in pulsed fashion, with the power supply being turned on when the current (I) flowing through the load (L) reaches a first limit value (I—1), which is below the nominal current value (I_nominal) by a hysteresis value (H), and with the power supply being turned off when the current (I) reaches a second limit value (I—2), which is above the nominal current value (I_nominal) by the hysteresis value (H), b) determining a period duration between two successive turn-on or turn-off times, c) comprising determined the period duration with a given period duration (Tnominal), and d) changing the hysteresis value (H) on the basis of the comparison between the determined period duration and the prescribed period duration (Tnominal).

Abstract: An apparatus for interfering with locomotion by one or more targets being animal or human, uses a plurality of delivery circuits that each deliver current through any target of the one or more targets. The apparatus includes a capacitance, a switch, a trigger; and a control circuit that controls the switch. Each delivery circuit includes a respective transformer. The switch, in response to operation of the trigger, conducts energy discharged from the capacitance into the transformer of a first delivery circuit to enable operation of the first delivery circuit; and conducts energy discharged from the capacitance into the transformer of a second delivery circuit to enable operation of the second delivery circuit. The respective transformer provides the current causing contraction of skeletal muscles of the one or more targets, interfering with locomotion by the one or more targets.

Abstract: A varactor includes a container forming a liquid chamber, a first electrode mounted adjacent the chamber, and a second electrode mounted adjacent the chamber. The chamber may be sized and configured, and a spacing between the electrodes and the chamber may be selected, so that a contact angle of a quantity of liquid metal in the chamber relative to at least one of the electrodes can be changed by applying a bias voltage.

Abstract: The present invention relates to a multilayer ceramic capacitor comprising: an element main body in which a dielectric layer and an inner electrode layer are alternately laminated, the inner electrode layer comprises: a composite structure having an inner electrode main layer of a base metal; and ceramic particles buried in the inner electrode main layer, therefore the inner electrode layer can be prevented from being interrupted by spheroidizing during the forming of the inner electrode layer, that is, drop of an electrode effective area can be inhibited, and high electrostatic capacity is obtained.

Abstract: A method of producing a multilayer microelectronic substrate, in which: a) a number of thermally combinable films with a first compression temperature are provided; b) at least one film with a second compression temperature, which lies above the first compression temperature, is provided; c) at least one of the films with the second compression temperature is arranged between films with the first compression temperature; d) the laminated films are heated to the first compression temperature, and further to a first end-temperature until the films with the first compression temperature are completely compressed, the first end-temperature being kept below the second compression temperature; and e) the laminated films are heated to the second compression temperature and, if applicable, further to a second end-temperature in order to compress the at least one film with the second compression temperature, characterized in that at least one of the films is made from magnetodielectric material, with nickel oxide N

Abstract: A multiterminal solid electrolytic capacitor mountable to a board for two terminals is provided. In the solid electrolytic capacitor (10) in accordance with the present invention, an anode of a capacitor device (12) is connected to one end part (35B) of a via (32) connected to a plurality of anode leads (34B) arranged on a base sheet surface (14a), whereas a cathode of the capacitor device (12) is connected to the other end part (35A) of a via (32) connected to a plurality of cathode leads (34A) similarly arranged on the base sheet surface (14a). Each end part (35B) of the via (32) connected to the anode lead (34B) is electrically connected to an end part (35D) of the via (32) connected to a land electrode (42B) arranged on the lower face (10a) of the base sheet (14). Each end part (35A) of a plurality of vias (23) connected to the cathode lead (34A) is electrically connected to an end part (35C) of the via (32) connected to a land electrode (42A).

Abstract: A solid electrolytic capacitor (1) comprises a capacitor element (2) which includes an anode foil (4) and a cathode foil (5) rolled with a separator (6) interposed therebetween, and a solid electrolyte layer or an electrically conductive polymer layer provided therein. The cathode foil (5) is coated with a film of a titanium-containing compound metal nitride. The compound metal nitride is aluminum titanium nitride, chromium titanium nitride, or zirconium titanium nitride.

Abstract: The invention provides a process for fabricating a solid electrolytic capacitor of the chip type which process includes the steps of plating a fabrication frame comprising an anode terminal member and a cathode terminal member projecting from a pair of side frame members respectively so as to be opposed to each other, the anode terminal member being stepped so as to provide a lower portion toward the cathode terminal member, a hole extending vertically and being formed in each of the anode terminal member and a higher portion of the cathode terminal member, joining an anode lead of a capacitor element to an upper surface of the cathode terminal member and a bottom surface of the capacitor element to an upper surface of the lower portion of the cathode terminal member, forming a packaging resin portion around the capacitor element without permitting resin to ingress into the holes, and cutting the anode and cathode terminal members along vertical planes extending through the respective holes.

Abstract: Single phase or polyphase switchgear having one or more switches which are mounted with the aid of solid insulation such that they are insulated, as well as associated live components such as rail systems, connectors and the like. Both the switches and the associated live components are housed in a housing enveloping the switches and live components. The enveloping housing is filled with air having a low moisture content and the interior space thereof is sealed with respect to the exterior space around the enveloping housing in such a way that the air present in the housing is not contaminated and will not reach the dew point.

Abstract: An integrated battery fusing device for a battery system of the type used as a backup for powering telecommunications equipment. The fusing device includes a fusing assembly and a terminal plate arrangement that integrally mounts the fusing assembly to the battery system. The terminal plate arrangement includes a first connector for electrically coupling the fusing assembly to the battery system and a second connector for electrically coupling a battery cable to the fusing assembly.

Abstract: Disclosed herein is a portable swing-type digital communication device with a step compensating mechanism. The portable swing-type digital communication device comprises a body housing, and a swing housing rotatably attached to the body housing by means of a hinge module. The swing housing is rotatable about a hinge axis at a prescribed angle perpendicular to the top surface of the body housing. The swing housing being disposed at a prescribed angle to a planar surface of the body housing when the swing housing is rotated a prescribed angle from the body housing. Also, the portable swing-type digital communication device comprises a step compensating mechanism for preventing a step between the top surface of the body housing and the top surface of the swing housing when the swing housing is rotated to the prescribed angle from the body housing.

Abstract: In an electronic control unit, a chassis is provided with a plate portion, and a circuit board is secured to a board-side attaching surface of the plate portion with a predetermined space secured relative to the plate portion. The chassis is further provided with a side wall protruding from the circumferential portion of the other surface of the plate portion and is mounted on a surface of a housing incorporating a device therein, with an end surface of the side wall being seated on the surface of the housing. A bus bar is fixed at a fixing portion thereof to the board-side attaching surface between the plate portion and the circuit board and is connected to a terminal of the device which is taken out from the housing. The bus bar is provided at plural free ends thereof with branch portions at which lead portions extend to be joined at end portions thereof to the circuit board.

Abstract: An electronic device having a housing which supports a processor, a memory device, a display device and a keyboard. The housing has a support member which enables the keyboard to move about an axis. The axis extends between the ends of the keyboard.

Abstract: A method and system for assembling a keypad or a keypad module to a processing portion of an electronic device is described. The keypad module is a sealed unit connectable to the pre assembled processing portion through a common interface. The keypad module includes a bezel substrate that has a locally thin region where an accessory can be placed. For example, a speaker may be included in the keypad module. The keypad module itself may be its own an electromechanical entity.

Abstract: Due to the limited capacity of secondary batteries, the operating period of notebooks is short. A fuel cell (22) in connection with a hydride storage unit allows for significantly longer periods of operation. The arrangement of the fuel cell (22) within a display unit (2) allows for the flexible use of the traditionally two module installation bays (11, 12) of the main unit (1) of a portable computer system. Even if one of the module installation bays is occupied by one of the insertable hydride storage tanks in the form of a module, another module installation bay (12) is available to the user for insertion of drives, such as CD-ROM. The flat arrangement of the fuel cell (22) in the display unit (2) folded open into a vertical position ensures a high efficiency of the fuel cell (22).

Abstract: A protective enclosure is disclosed for an interactive flat-panel controlled device. The protective enclosure is watertight, crush-resistant, and impact-resistant. While providing protection, the protective enclosure simultaneously allows smooth and accurate interaction with the interactive flat-panel controlled device. The protective enclosure has a protective membrane that permits RF and touch screen stylus inputs, as well as capacitance, such as from a finger, to be transmitted accurately to the flat-panel control. The hardness and texture of the protective membrane allows a stylus or finger to glide smoothly along the surface of the membrane without catching or sticking. The protective enclosure is further adapted to allow infrared and other communication signals while the device is secured inside the case. Further, electrical connections can be made through the case without affecting the protection afforded the electronic device inside.

Abstract: A vehicle multimedia system having a safety interlock mechanism. The vehicle multimedia system comprising a portable multimedia unit having a support sensor for sensing support thereon and a docking station configured to interlock the portable multimedia unit therein. The docking station comprises a main frame having a receiving port to receive the portable multimedia unit. The main frame includes a locking assembly for securing the portable multimedia unit to the main frame and a microprocessor for communicating with the locking assembly and the support sensor.

Abstract: Tablet press, with an upper housing part for receiving a rotor and comprising pressing tools, a lower housing part with side walls for receiving a drive device for the rotor, servo drives for peripheral apparatus for the tablet press, a switch cabinet for receiving a machine computer, electrical parts, components, such as power units with their control switches for the drive device, servo drive and peripheral apparatus, a switch cabinet housing with a rear wall, a bottom wall, a cover wall and side walls and an open front face being attached via its rear face to the outer face of a side wall of the lower housing part, furthermore with a hood which comprises hood side walls and a hood cover wall and which is pivotally mounted about a vertical axis on the switch cabinet housing or on the lower housing part by means of a hood side wall, the hood being constructed and slidable over the switch cabinet housing, in such a manner that the hood cover wall seals the front face of the switch cabinet housing and the hood

Abstract: A heat removal device includes a shroud on a top side of a printed circuit board that contains a power connector. An air intake vent is located underneath the printed circuit board and directs air up through printed circuit board vias into the shroud. Openings are located in a power connector housings that allow air to flow over conductors in the connector and out an air outtake vent. The conductors include heat sink fins that extend out of the openings in the connector housing.

Abstract: A heat sink assembly for cooling a DVR enabled set-top box. A heat sink is coupled to a chassis of the set-top box as well as to a storage device within the chassis. Heat is transferred from the storage device to the exterior of the chassis to be vented to the exterior environment surrounding the set-top box.

Abstract: A heat sink assembly is coupled to a motherboard and an electronic device on the motherboard. The heat sink assembly includes a heat sink with an opening extending through the heat sink, and a pin that extends through the motherboard and the opening in the heat sink to couple the heat sink to the electronic device and the motherboard. A member within the opening in the heat sink is positioned between the heat sink and the pin. A method of securing a heat sink to a motherboard and an electronic device on the motherboard includes thermally coupling a heat sink to an electronic device, securing the heat sink to a motherboard using a pin that extends through an opening in the heat sink, and positioning a member between the pin and the heat sink within the opening in the heat sink.

Abstract: An uninterruptible power supply (UPS) socket of the present invention consists of a front panel, an upper cover, a socket member, a wiring insulation plate, a battery set, a print circuit board assembly, a detachable lower cover, a power cord lead and several components. The upper and lower covers are connected via several electric conductive wires, and said print circuit board assembly contains a power circuit board, a control circuit board and a surge protection circuit board.

Abstract: A technique for fabricating a resistor on a flexible substrate. Specifically, at least a portion of a polyimide substrate is activated by exposure to a ion sputter etch techniques. A metal layer is disposed over the activated portion of the substrate, thereby resulting in the formation of a highly resistive metal-carbide region. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal carbide region. The metal-carbide region is patterned to form a resistor between the terminals. Alternatively, only a selected area of the polyimide substrate is activated. The selected area forms the area in which the metal-carbide region is formed. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal-carbide region.

Abstract: A vibration reducing structure of an electronic device includes first and second housings, a printed circuit board, a first post and a second post. The first and second housings define a closed space therebetween. The printed circuit board is disposed within the space and having a heavy component mounted on a first surface thereof. The first post is arranged on the first housing and under the heavy component. The second post is arranged on the second housing and above the heavy component.

Abstract: A securing device includes a central rod extending from the driving press to be movably mounted on a top board of the computer main frame and a base having an engaging plate movably attached to the base via a first spring which is sandwiched between the base and the engaging plate and a lateral rod securely extending away from the engaging plate to selectively engage with a free end of the central rod. When the central rod is longitudinally moved, the longitudinal movement of the central rod drives the lateral rod to move laterally and thus a hook which is formed on a side face of the engaging plate for extending through the first side board and the second side board to secure engagement between the first side board and the second side board is away from the first side board and the second side board and the second side board is free from engagement with the first side board.

Abstract: A radio frequency power amplifier has first and second amplifier transistors. The first and second amplifier transistors have a common element thereof electrically interconnected with a common bus. A forked conductor having two legs thereof electrically connected to the common bus, each leg having a distal end proximate one of the first and second amplifier transistors. The common bus and the forked conductor are generally symmetric about an axis about which the first and second amplifier transistors are symmetrically disposed.

Abstract: A film carrier tape for mounting electronic part comprises an insulating film, a wiring pattern formed on a surface of the insulating film, and a solder resist layer formed by moving a squeegee using a screen mask of a prescribed pattern that is formed in such a manner that connecting terminal portions of the wiring pattern should be exposed. The edge of the solder resist layer is formed almost in parallel or almost at right angles to the moving direction of the squeegee used in the application of the solder resist. The solder resist layer can be formed by the use of a screen mask for solder resist coating in which the edge of the screen that is unmasked to apply the solder resist is formed almost in parallel or almost at right angles to the moving direction of the squeegee used in the application of the solder resist. According to the present invention, the fraction defective of the solder resist coating can be decreased.

Abstract: At the opening (3) for insertable electronic or similar cards in a housing (1) for electronic circuits a frame is mounted including separate frame parts (5, 5?, 5?) having outer portions connecting to the edges of the opening. The frame can by its modular construction be adapted to an arbitrary number of shielding or cover plates (7) that are comprised in such cards and are placed or are to be placed in the opening. A simple mark-up of the position for a card can be easily made on a frame part located at the part opening for the card. The frame parts form together with the cover plates a whole continuous surface. Intermediate frame parts (5) divide the opening in part openings, each intended for only one cover plate. Elastic contact elements (27) are provided mounted in recesses in the frame parts to electrically connect adjacent cover plates to each other and a frame part to that cover plate or those cover plates which are located at the frame part.

Abstract: A switching power supply circuit having a power factor improving function that makes it possible to improve power conversion efficiency and reduce size and weight of the circuit. A complex resonant converter is formed by at least combining a current resonant converter of a half-bridge coupling system on a primary side with a partial resonant voltage circuit. Power factor improvement is made by performing voltage feedback of a switching output of the complex resonant converter to a rectification current path by a power factor improving transformer (a loosely coupled transformer VFT), interrupting a rectification current by a rectifier diode, and thereby increasing a conduction angle of an alternating input current. Thus, for example, the power supply circuit having a power factor improving circuit does not need to employ a configuration in which a choke coil is inserted in a commercial alternating-current power supply line.

Abstract: A converter is presented, including first and second switches coupled to an input power source to define a first conductive path, and third and fourth switches coupled to the input power source to define a second conductive path. A PWM unit turns on the switches in the order of the fourth, first, third, second, first, fourth, second, and third switches, and outputs pulse signals so that the first and fourth switches are turned on in overlapping intervals and the second and third switches are turned on in overlapping intervals.

Abstract: A first side circuit connected to a primary coil of a transformer includes a main switching element driving the primary coil, and a control circuit which detects an output voltage to feedback and drives and controls the main switching element so as to keep constant the output voltage by acquiring a voltage induced in a tertiary coil of the transformer. A secondary side circuit of the transformer includes a dummy load circuit connected to the output terminal, a detection circuit which detects a secondary coil voltage of the transformer, and a dummy load control circuit which is controlled by the detection circuit and controls so as to flow current flow through the dummy load circuit only in a state of a light load.

Abstract: It is aimed at decreasing losses not only in a synchronous rectifier circuit provided at a secondary side of a DC-DC converter, but also in a full-bridge switching circuit provided at a primary side thereof. The DC-DC converter comprises a transformer for voltage conversion, a synchronous rectifier circuit at the secondary side, and a full-bridge switching circuit at the primary side. The DC-DC converter performs synchronous rectifier control which uses switch transistors to change paths of currents flowing through the secondary coil in synchronization with switching operations at the primary side. The DC-DC converter detects currents flowing through a load at the secondary side, primary-side currents varying with the load currents, or primary-side input voltages to dynamically control off-timings of a synchronous rectification transistor at the secondary side.

Abstract: In dynamic voltage sag correctors and other power conversion equipment having a DC bus that is subject to over-voltage conditions due to power being fed back by a regenerative load, a bus discharge switching device and a discharge resistor are connected in series across the DC bus lines. The discharge switching devices are switched on to discharge the energy storage device connected to the bus, or to separately discharge the two capacitors of a split capacitor DC bus, to eliminate the over-voltage conditions. The discharge switching devices may be switched on and off periodically with a selected duty cycle to discharge energy from the energy storage capacitor or other energy storage device through the discharge resistor at a rate which does not exceed the power rating of the discharge resistor. The discharge switching device may be switched with a fixed duty cycle or with a variable duty cycle that is based on the dynamic power dissipation characteristics of the discharge resistor.

Abstract: A switching power supply circuit reduces the time from start-up driving to normal operation while a soft-start is carried out with an output voltage Vout. A soft-start capacitor is charged during the start-up time. After a soft-start voltage Vz has reached a predetermined signal-output starting voltage Vlow, soft start of the output voltage Vout is carried out by controlling the operation based on the soft-start voltage Vz. A time constant for charging the soft-start capacitor is set as a time constant that causes the charge voltage of the soft-start capacitor to sharply increase at least until the soft-start voltage Vz reaches the signal-output starting voltage Vlow after the circuit has started driving, and is switched to a time constant that causes a rising trend of the charge voltage of the soft-start capacitor to become gentle with a predetermined time-constant switching timing.

Abstract: A power system employs an outer voltage feedback loop and an inner current feedback loop to control a power converter, such as a DC to AC inverter for transferring electrical power between a power source, for example a photovoltaic array, and a load, for example a power grid. The outer loop accommodates variations in the output of the power source, for example accommodating anomalies in IV characteristics such as IV droop characteristic associated with photovoltaic cells. The outer loop may employ a first control regime or a second control regime, for example, dependent on whether a DC bus voltage or power is smaller than a value corresponding to measurement resolution or expected noise.

Abstract: The present invention provides a CAM (content addressable memory) apparatus having: a first memory device (10) with a word line input (WL) and at least one storage node (12; 13) for storing a first bit of a data word; a second memory device (11) with a word line input (WL) and at least one storage node (14; 15) for storing a second bit of a data word; and a comparator device (16) for comparing the first and second stored bits with two precoded comparison bits fed via four inputs (20; 21; 22; 23) and for driving a hit node (17) in the event of the first stored bit corresponding to the first comparison bit and the second stored bit corresponding to the second comparison bit.

Abstract: Line drivers that fit within a specified line pitch. One method of placing line drivers completely underneath a cross point array requires splitting the line driver up so that a portion of the line drivers is on a first side of the cross point array and the other portion is on the opposite side. However, using this technique requires that the width of the drivers is no larger than the width of the memory cells that are being driven. This can be accomplished by stacking transistors such that line drivers fit within a specified line pitch, but are as long as is necessary to include all the necessary circuitry.

Abstract: A semiconductor memory device includes a first, second, and third memory cell transistors in which information can be electrically rewritten, addresses of which are consecutive in a row direction. One end of a current passage in each of a first, second, and third memory cell transistors is connected to a control electrode of the first, second, and third memory cell transistors. A write voltage, a pass voltage lower than the write voltage, and a first voltage lower than the pass voltage are applied to the other ends of the first, second, and third transfer transistors. A first control section applies the first on-voltage to make the first transfer transistor conductive, to a gate of the first transfer transistor. A second control section applies a second on-voltage to make the second and third transfer transistors conductive, to gates of the second and third transfer transistors.

Abstract: Digital data apparatuses and digital data operational methods are described.

Abstract: A method of operating a dynamic random access memory (DRAM) using a bit line and a bit line bar is disclosed. The DRAM stores data by using a charge storage device, which is coupled to the bit line via a switch device. A voltage drop occurs when the switch device is turned on. The method programs the charge storage device with a first voltage or a zero voltage in response to a power voltage reduction due to the voltage drop. For accessing the data, the bit line and the bit line bar are charged to the power voltage, the switch device is turned on and the data stored in the charge storage device is determined according to a voltage difference between the bit line and the bit line bar.

Abstract: Electronic systems including Si/Ge substrates. The electronic systems can include data storage devices and/or logic devices having active regions extending into a crystalline Si/Ge material. An entirety of the portion of an active region within the crystalline Si/Ge material can be within a single crystal of the material. The assemblies can be utilized for detecting properties of objects, and in particular aspects can be incorporated into assemblies utilized for identifying persons. The assemblies can be fabricated over a range of versatile substrates, including, for example, glass, alumina or metal.

Abstract: An SRAM device comprising a column having opposing bit lines, asymmetric memory cells spanning the opposing bit lines in alternating orientations, and a sense amplifier. The sense amplifier includes sensing circuitry configured to sense values stored in the cells and switching circuitry configured to apply signals to the sensing circuitry as a function of the orientations.

Abstract: A memory device is disclosed having a plurality of dual-bit addressable memory cells. In each memory cell, a first storage circuit for storing a first bit may be activated or de-activated depending upon the state of a second bit stored in a second storage circuit. The second bit may be considered to be a “don't care” bit, because depending upon the state of the second bit, the first bit may be irrelevant in that it cannot be read. Thus, each memory cell may effectively store three states: zero, one, and don't care.

Abstract: A circuit for power management of a memory cell. A first power switch is coupled between a power voltage, the power control signal and the memory cell. The first power switch is turned off to disconnect the power voltage and the memory cell when the power control signal is at a predetermined level, such that the memory cell operates in standby mode. A latch circuit is coupled between the power voltage, the first terminal and the second terminal to preserve the voltage levels respectively of the first terminal and the second terminal when the memory cell operates in the standby mode.

Abstract: A semiconductor memory device has a particularly space-saving configuration of the memory areas and, in particular, of the selection devices assigned to the memory areas. During operation, each selection device can be assigned in a controllable manner to a plurality of memory areas such that selectively each of the selection devices can carry out an addressing and selection in one of the assigned memory areas.

Abstract: A data write method of a magnetic random access memory including a magnetoresistive element which has axis of easy and hard magnetizations, a first write wiring which runs in a direction of the axis of easy magnetization, and a second write wiring which runs in a direction of the axis of hard magnetization, includes a first phase of supplying a first current to the first write wiring in a first direction and supplying a second current to the second write wiring in a second direction, a second phase of stopping supplying the first current to the first write wiring and supplying the second current to the second write wiring in the second direction, and a third phase of supplying the first current to the first write wiring in a third direction reverse to the first direction and supplying the second current to the second write wiring in the second direction.

Abstract: A method is provided for testing magnetic bits (3, 104, 514) of an array. A train of first (702), second (704), and third (706) pulses is provided to a desired bit, the first and second pulses beginning at a substantially similar low field and increasing in similar amounts with respect to successive trains of the first, second, and third pulses, the third pulse having a current amplitude sufficient to toggle the magnetic bit. A representative count is recorded in response to switching of the bit. The above steps are repeated and a determination is made of the current amplitude required to write and toggle the bit.

Abstract: These systems and techniques relating to RFID tags include current source control in RFID memory. According to an aspect, a radio frequency identification tag includes an antenna, a radio frequency interface coupled with the antenna, and a non-volatile memory including multiple memory cells, at least one of the memory cells including a floating gate, a control gate, and a dielectric there between. The non-volatile memory includes a controlled current source operable to modify the at least one memory cell. Additionally, the non-volatile memory can include a voltage supply line regulator that limits voltage supply based on a sensed operational current that results from the controlled current source in the non-volatile memory.

Abstract: An array of memory cells of an integrated circuit are organized so metal bitlines are segmented. The memory cells may be nonvolatile memory cells such as floating gate, Flash, EEPROM, and EPROM cells. The bitlines for the memory cells are strapped to metal, and the metal bitline is segmented. The individual segments may be selectively connected to voltages as desired to allow configuring (e.g., programming) or reading of the memory cells. The programming voltage may be a high voltage, above the VCC of the integrated circuit. By dividing the metal bitlines into segments, this reduces noise between bitlines and improve the performance and reliability, and reduce power consumption because the parasitic capacitances are reduced compared to a long metal bitline (i.e., where all the segments are connected together and operated as one).

Abstract: An integrated DRAM-NVRAM, multi-level memory cell is comprised of a vertical DRAM device with a shared vertical gate floating plate device. The floating plate device provides enhanced charge storage for the DRAM part of the cell through the shared floating body in a pillar between the two functions. The memory cell is formed in a substrate with trenches that form pillars. A vertical wordline/gate on one side of a pillar is used to control the DRAM part of the cell. A vertical trapping layer on the other side of the pillar stores one or more charges as part of the floating plate device and to enhance the DRAM function through the floating body between the DRAM and floating plate device. A vertical NVRAM wordline/control gate is formed alongside the trapping layer and is shared with an adjacent floating plate device.