Abstract: A semiconductor power device comprises a flange, a die having a gate, a source, and a drain. The source is electrically coupled to the flange. A drain matching circuit is located on the flange having an input, an output and a bias input, the input being coupled with the drain. The drain matching circuit comprises an inductor coupled in series with a first capacitor between the drain and flange and a second capacitor arranged next to the first capacitor, wherein the second capacitor is coupled with the bias input and in parallel with the first capacitor through a second inductor. An input terminal is mechanically coupled to the flange and electrically coupled with the gate, an output terminal is mechanically coupled to the flange and electrically coupled with the output of the drain matching circuit, and an input bias terminal is mechanically coupled to the flange and electrically coupled with the drain through the bias input.

Abstract: An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain.

Abstract: A power supply for providing a modulated output voltage to a load is disclosed. According to various embodiments, the power supply comprises a plurality of parallel-connected switch-mode power modules and a controller. The controller is connected to each of the power modules and is for controlling the duty cycles of the respective power modules such that the power modules have a common duty cycle in steady state, but in a phase-shifted or “interleaved” manner. In addition, the controller is for controlling the output voltage of the power converter by controlling the ratio of power modules in the forward state at a time to the total number of power modules. In this way, by providing a sufficiently large number of power modules, arbitrarily low output voltage amplitudes and intra-level oscillations can be achieved. Further, the rate of modulation of the output voltage can exceed the switching frequency (f=1/T, where T is the switching period) of the power modules.

Abstract: An amplifier system in accordance with an aspect of the present invention comprises a switching amplifier that drives a load with a pulse-width modulated (PWM) output signal that varies between first and second rails based on a first control input signal, and a common mode supply that provides a switching signal that varies between third and fourth rails to maintain a common mode voltage of the load at a level that is between the first and second rails.

Abstract: A scalable radio frequency (RF) generator system including at least one power supply, at least one power amplifier receiving input from the power supply, and a power supply control module, and a system controller. Output from the at least one power supply can be combined and applied to each of the power amplifiers. Output form each of the at least one power amplifiers can be combined to generate a single RF signal. A compensator module controls operation of the at least one power supply. The compensator module, system control module, and power supply controller communicate in a daisy chain configuration.

Abstract: Provided are an apparatus and method for generating an internal voltage adaptively with respect to an external supply voltage. The apparatus includes a class detector and an internal voltage generator. The class detector outputs detection signals indicating a class of a plurality of classes, which correspond to predetermined voltages, to which an input external voltage belongs with respect to a first reference voltage. The internal voltage generator generates and outputs an internal voltage corresponding to the class to which the external voltage belongs as indicated by the detection signals.

Abstract: An amplifier having an increased the upper limit on the amplitude of an audio signal generated between one common terminal and the output terminals of left and right channels without raising the power supply voltage. The level at common terminal C is changed corresponding to the average of the input audio signals (ViL, ViR) to increase the amplitudes of the output audio signals (VL, VR). In this way, the amplitudes of audio signals (VL, VR) supplied to the headphone can be increased compared with the case when the level at terminal C is kept constant. Also, the upper limit on the amplitudes of audio signals (VL, VR) can be increased without raising the power supply voltage.

Abstract: A Class-D amplifier system may include an input stage that includes an Nth order filter, where N>1. The input stage filters an input signal to provide a filtered output signal, an input of the input stage being configured to receive the input signal as a digital pulse-width-modulated (PWM) signal. A comparator provides a quantized output signal based on the filtered output signal. An output stage is connected between a first voltage rail and a second voltage rail. The output stage provides a switching output signal at an output that varies between the first voltage rail and the second voltage rail based on the quantized output signal. A feedback path connects the output of the output stage with the input of the input stage, such that the Nth order filter compensates for variations in at least one of the first voltage rail and the second voltage rail.

Abstract: The summing comparator includes: a first integrator; a second integrator for receiving an output of the first integrator; and a comparator for switching when the output of the first integrator is greater than the output of the second integrator. The outputs of the first and second integrators are directly compared by the comparator without the necessity of a summing amplifier.

Abstract: Provided in a constant-current generation circuit is an OP AMP which includes a bias circuit, differential stage and amplification stage. In the OP AMP, a capacitance is provided between a control terminal which receives a start-up signal EN and a node NGATE. In a start-up operation of the circuit, the node NGATE can more rapidly rise from a VSS to a predetermined voltage by rising a specific voltage in synchronously with a switching timing of the start-up signal EN by virtue of a coupling effect.

Abstract: Differential amplifier embodiments are provided for amplifying input signals with enhanced gain and dynamic range. They include first and second amplifier stages and at least one common-mode feedback circuit that is arranged to mirror and adjust a tail current to control the common-mode level of a respective one of the stages. The stages are configured with cascode elements to obtain high impedances that enhance their signal gain and the common-mode feedback circuit is configured to controllably lower the output voltage of a current source that provides the tail current to thereby enhance the amplifier's dynamic range. The amplifier embodiments are particularly suited for use in applications where they must operate with reduced supply voltages and operate in alternating operational modes.

Abstract: Current-controlled CMOS (C3MOS) wideband input data amplifier for reduced differential and common-mode reflection. A novel solution is presented by which better impedance matching and extended bandwidth providing improved gain at higher frequencies may be achieved at the interface between silicon and package and/or circuit board within various integrated circuits that may be employed within communication devices. Appropriately selected impedance allows for a significant reduction in differential and common-mode reflection while also boosting gain at higher frequencies. This novel solution allows for the use of relatively smaller traces and components to still be employed without suffering the deleterious effects of increased reflections when using small traces and components. By allowing the use of these small traces and components, a significant reduction in power consumption and overall device size may be achieved while still providing better reflection and frequency response characteristics.

Abstract: A variable impedance circuit includes a capacitor and a MOSFET and is connected between the base of a bipolar transistor and a ground node. The capacitor acts to the open for a direct-current component. The MOSFET varies impedance for an alternate-current component. A base voltage ration portion includes first and second resistors, which set a bias applied to the base of the bipolar transistor. More specifically, the base voltage generation portion divides an operating voltage supplied through a voltage terminal by a ratio of the first and second resistors to generate a base voltage of the bipolar transistor.

Abstract: A high frequency power amplifier includes: a multi-finger transistor including transistor cells electrically connected in parallel; an input side matching circuit connected to gate electrodes of the transistor cells; and resonant circuits, each resonant circuit being connected between a gate electrode of a respective one of the transistor cells and the input side matching circuit. The resonant circuits resonate at a second harmonic of the operational frequency of the transistor or at a frequency within a predetermined range centered at the second harmonic and act as a short circuit or exhibit low impedance as seen from the gate electrode.

Abstract: A method for controlling a supply voltage for a radio frequency power amplifier, that includes the steps of: determining (210) at least one parameter; determining (220) a constant voltage based on the at least one parameter; and automatically adjusting (230) the supply voltage to the constant voltage.

Abstract: An active UHF amplifier includes a transistor having a base for receiving signals, a grounded emitter, and a collector for outputting signals, a first inductor having a first end for coupling to a voltage source, the inductance of the first inductor being between 10-100 nano-Henries, a first capacitor having a first end coupled to the first end of the first inductor, a second inductor having a second end coupled to the base of the transistor, the inductance of the second inductor being between 1-100 nano-Henries, a second capacitor having a first end coupled to a first end of the second inductor, the capacitances of the first and the second capacitor being between 10 pico-Farads and 100 nano-Farads, a first resistor, and a second resistor having a resistance divided by the resistance of the first resistor and multiplied by a voltage of the voltage source being between 0.5-0.8 volts.

Abstract: A power transistor, having: a semiconductor having an electrode formed thereon, wherein the electrode comprises a plurality of interdigitated transistors each having input and output terminals; a first output blocking capacitor having a first terminal electrically coupled to the output terminals of the interdigitated transistors of the semiconductor and a second terminal electrically coupled to ground; and a second output blocking capacitor having a first terminal electrically coupled to the first terminal of the first output blocking capacitor and a second terminal electrically coupled to ground.

Abstract: An intermodulation distortion which is output from a final-stage amplifier 15 is fed back to an inter-stage matching circuit 14 via a first control circuit 16 and a second control circuit 17. The first control circuit 16 and the second control circuit 17 control an amplitude and a phase of an intermodulation distortion to be fed back from the final-stage amplifier 15 to the inter-stage matching circuit 14, such that a synthesized scalar of an intermodulation distortion input from a first-stage amplifier 13 to the final-stage amplifier 15 and amplified by the final-stage amplifier 15 and an intermodulation distortion newly generated by the final-stage amplifier 15 is reduced.

Abstract: An object of the present invention is to provide a radio frequency power amplifier of multi stage amplifying method that is designed to reduce instability of output power caused by electromagnetic coupling of bias supply terminals and interconnections of each stage to thereby operate stably. Another object of the present invention is to provide a radio frequency power amplifier that is designed to reduce distortion of output power caused by electromagnetic coupling of bias supply terminals and interconnections of each stage to thereby provide high efficiency.

Abstract: Multi-band or wideband impedance matching in RF amplifiers is disclosed, using variable negative feedback. The feedback is provided by variable impedance connected between the input and output terminals of an inverting amplifier, which may be single-ended, or differential. The variable impedance is used in conjunction with a fixed input impedance matching network to tune the variable impedance to different frequencies. The variable impedance feedback can also be used for gain control, and has the added benefit of stabilizing the amplifier. Both multi-band and wideband amplification can be optimized through the use of the disclosed circuitry and techniques. Use of an output impedance matching network in conjunction with the RF amplifier is optional.

Abstract: A PLL structure comprises a PFD, a loop filter and a VCO, as well as a voltage shift capacitor (Ca) coupling the PFD and the VCO. A voltage shift control circuit (50) is placed in parallel with the voltage shift capacitor. This circuit comprises controlled charging means (51), which are designed to charge the voltage shift capacitor according to a channel control signal. It also comprises controlled pre-charging means (52) which are designed to accelerate the charging of the voltage shift capacitor by the controlled charging means. It further comprises controlled polarization means (53), designed to ensure the polarization of the input during the pre-charging of the voltage shift capacitor.

Abstract: Circuits, methods, apparatus, and code that provide low-noise and high-resolution electronic circuit tuning. An exemplary embodiment of the present invention adjusts a capacitance value by pulse-width modulating a control voltage for a switch in series with a capacitor. The pulse-width-modulated control signal can be adjusted using entry values found in a lookup table, by using analog or digital control signals, or by using other appropriate methods. The capacitance value tunes a frequency response or characteristic of an electronic circuit. The response can be made to be insensitive to conditions such as temperature, power supply voltage, or processing.

Abstract: A circuit and method for emulating a component in a circuit are shown that control a current controlled oscillator with a first current that is proportional to a square of a load current of the component and also charge and discharge a high precision capacitor using the current controlled oscillator. The oscillations of the current controlled oscillator are counted to obtain a count value, which is transformed to a transformed current signal using a predetermined transfer function. The transformed current signal is subtracted from the first current that controls the current controlled oscillator. The transformed current signal is subtracted from a second current that is proportional to a square of the load current to determine whether the count value is incremented or decremented responsive to the oscillations of the current controlled oscillator.

Abstract: A charge supplying apparatus in a frequency synthesizer includes first and second charge supply units. The first charge supply unit is activated for generating a first voltage coupled to a loop filter, and the second charge supply unit is activated for generating a second voltage coupled to the loop filter. A control unit has a mode determining unit that activates one of the first and second charge supply units from comparing a reference frequency with an output frequency. The mode determining unit also generates at least one control signal for adjusting the first voltage by binary increments for decreasing a difference between the reference and output frequencies.

Abstract: A direct division modulator is provided. The direct division modulator includes a symbol mapper converting the input data from a binary bitstream to a desired frequency deviation, such as where the frequency deviation data encodes the information from the bitstream. A converter generates a divide value using the desired frequency deviation information, and a summer adds an average value to the divide value. A converter quantizes the divide value and shapes quantization noise associated with the quantized divide value. A divider modulates a reference signal with the quantized divide value and generates an output signal.

Abstract: The present invention is a method to rapidly lock a type II phase locked loop (PLL) after a frequency jump without degrading the output signal much. The method to decrease the settling time and improve the quality of the output clock during the settling disclosed herein comprises of the following broad steps: Estimate new frequency offset with a separate circuit outside the PLL loop to measure the frequency of the input signal accurately. Ramp integrator to the new frequency offset. Do phase build out or phase pull-in. The remaining phase offset is build out when no edge to edge alignment is required. Otherwise, the remaining phase offset is pulled in while the integrator in the PLL's loop filter is disabled. Reduce the PLL bandwidth and/or lower damping to let the PLL settle. Switch the PLL to final bandwidth and damping required by the application.

Abstract: The invention relates to noise signal generator, comprising a random word generator for generating a sequence of random words, each word representing an input value, a mapping unit for receiving the sequence of random words, mapping each input value to an output value of according to a probability distribution function, and providing a corresponding sequence of output values, and a digital-to-analog converter for generating a noise signal based on the output values.

Abstract: Circuits, methods, and apparatus that provide low-noise, high-stability crystal oscillators having controlled-amplitude differential output signals and DC level control. A crystal oscillator circuit has two feedback loops, one for setting the DC level of its signals, the other for adjusting the amplitude of those signals. The DC level feedback loop can set the DC component of the oscillator signals to a voltage midway between two supply voltages. The amplitude control loop sets the amplitude of the output of the crystal oscillator signal to be within a range. The amplitude can be set to provide a maximum swing without clipping the supply voltages in order to provide high-stability and minimal jitter. The amplitude control circuit can also be digital for improved noise performance. The time constants of these two loops can be separated such that instabilities are avoided.

Abstract: A crystal oscillator that outputs an oscillation output signal of an oscillator circuit oscillated by a crystal resonator as a resonation source via a buffer circuit, includes: a plurality of waveform output circuits provided in the buffer circuit, each converting, when inputted, the oscillation output signal into a different waveform and outputting the converted signal; a circuit selection switch that selects any one of the plurality of waveform output circuits as a waveform output circuit of the buffer circuit; and a memory circuit that stores data used by the circuit selection switch to select any one of the waveform output circuits.

Abstract: A rotary signal coupler having first and second portions 3a, 3b which are rotatable relative to one another and each have a plurality of pairs of inductive communication elements 34a, 34b and capacitive elements 35a, 36a, 35b, 36b which pairs are chosen to have resonant frequencies compatible with the frequency of the signals to be transferred.

Abstract: A slabline structure includes a first slabline having a first orientation and a second slabline having a second orientation that is rotationally offset from the first orientation. The slabline structure also includes a transition interposed between the first slabline and the second slabline.

Abstract: The switch circuit 1 includes a common terminal 10 (common port), a plurality of branch terminals 22, 24, a common path P0 connecting the common terminal 10 and a diverging point N, branch paths P1, P2 connecting the diverging point N and the branch terminals 22, 24 respectively, distributed constant FETs 32, 34 respectively provided in the branch paths P1, P2, and transmission lines 42, 44 provided between the diverging point N on the branch paths P1, P2 and the distributed constant FETs 32, 34 respectively. Here, the transmission lines 42, 44 are longer than 45% of ?/4 but shorter than ?/4, when ? designates a propagation wavelength under an operating frequency.

Abstract: A vertical comb actuator radio frequency (RF) micro-electro-mechanical system (MEMS) switch. The RF MEMS switch includes a substrate; first and second signal lines spaced at a predetermined interval from each other and deposited on an upper surface of the substrate; an actuator positioned over the first and second signal lines when viewed from the upper surface of the substrate and spaced at a predetermined interval from the first and second signal lines; and a fixing portion positioned over the actuator when viewed from the upper surface of the substrate, wherein the fixing portion permits the actuator to come in contact with the first and second signal lines when a predetermined driving voltage is applied. Thus, it is possible to prevent the actuator from sticking to the substrate. In addition, the RF MEMS switch can be operated with a low voltage and insertion loss and power loss can be reduced.

Abstract: A monolithic duplexer and a fabrication method thereof. The monolithic duplexer includes a device wafer, a plurality of elements distanced from each other on a top portion of a device wafer, first sealing parts formed on the top portion of the device wafer, and a plurality of first ground planes formed between the plurality of elements. A cap wafer is also provided having an etched area for packaging the device wafer, a plurality of protrusion parts, a plurality of ground posts, and cavities. Second sealing parts are formed on a bottom portion of the protrusion parts, and a plurality of second ground planes cover the plurality of ground posts. Via holes vertically penetrate the cap wafer to connect to the plurality of the second ground planes, and ground terminals are formed on top portions of the via holes. The first sealing parts and the first ground planes are attached to the second sealing parts and the second ground planes, respectively.

Abstract: There is provided a resonant circuit includes a resonator, an inductor connected in parallel with the resonator, and a capacitor connected in parallel with the resonator. There are also provided a filter and an antenna duplexer having the above-described resonant circuit.

Abstract: A duplexer for bidirectional communication systems includes tunable band reject filters. The tunable band reject filter on the receiver side can be tuned to reject the transmit signal frequency, and the tunable band reject filter on the transmitter side can be tuned to reject the receive signal frequency. Thus, the band reject filters allow for simultaneous tuning of the band reject frequencies on the transmission side and the reception side. The tunable band reject filters can be implemented as resonators including barium strontium titanate (BST) capacitors of which the capacitance can be tuned according to bias voltages applied to the BST capacitors.

Abstract: A microwave bandstop filter comprises a waveguide segment of cross-section that presents longitudinal variation of sinusoidal type modulated by an amplitude function that is continuous, the period of said longitudinal variation of sinusoidal type being the Bragg period for the fundamental guided mode at a center frequency of the band to be stopped. A filter assembly comprises a microwave lowpass filter presenting a cutoff frequency and at least one interfering passband at frequencies higher than said cutoff frequency, and at least one bandstop filter as defined above, connected to the output of said lowpass filter, in which the amplitude and the period of said longitudinal variation, and also the length over which it extends are such that they stop said interfering passband of said lowpass filter. An output multiplexer for a multichannel microwave transmitter includes such a filter assembly.

Abstract: A film bulk acoustic resonator includes a substrate having a cavity at a surface of the substrate; a bottom electrode provided on the surface of the substrate so as to extend over the cavity; a piezoelectric film disposed on the bottom electrode; a top electrode disposed on the piezoelectric film so as to face the bottom electrode and extending over the surface of the substrate; and a seal member configured to seal a capacitor defined by the bottom electrode, the piezoelectric film and the top electrode, and to provide an opening portion of the cavity outside the seal member at the surface of the substrate.

Abstract: An integrated filter including a film bulk acoustic resonator (FBAR) and a surface acoustic wave (SAW) resonator and a method of fabricating the integrated filter. The integrated filter includes: a substrate; a first electrode positioned in a predetermined first area on an upper surface of the substrate; a first piezoelectric layer positioned on the first electrode; a second electrode positioned on the first piezoelectric layer; a second piezoelectric layer positioned in a predetermined second area on the upper surface of the substrate; and at least one inter-digital transducer (IDT) electrode positioned on the second piezoelectric layer. The IDT electrode includes: a first IDT electrode formed in a comb structure on the second piezoelectric layer; and a second IDT electrode formed in a comb structure on the second piezoelectric layer so as to mesh with the first IDT electrode. The first and second piezoelectric layers are formed of an identical material.

Abstract: A plurality of IDT electrodes 2 to 7 each having a large number of electrode fingers extending in a direction perpendicular to a propagation direction of a surface acoustic wave propagating on a piezoelectric substrate 1 are arranged on the piezoelectric substrate 1 along the propagation direction, and each of the two adjacent IDT electrodes out of the plurality of IDT electrodes 2 to 7 comprises a variable pitch section and a fixed pitch section. The electrode finger pitch in the variable pitch section gradually decreases toward the boundary between the two adjacent IDT electrodes, and the minimum electrode finger pitch portion in the two variable pitch sections is on one side spaced apart from the boundary. There can be provided a surface acoustic wave apparatus having a large pass bandwidth, having a low insertion loss, and having improved flatness in a pass band.

Abstract: A pair of balanced terminals is connected to a pair of interdigital-coupled quarter-wave resonators in an electronic device. This electronic device has a first resonance mode that resonates at a first resonance frequency f1 higher than a resonance frequency f0 in each of the pair of quarter-wave resonators when establishing no interdigital-coupling, and a second resonance mode that resonates at a second resonance frequency f2 lower than the resonance frequency f0. The second resonance frequency f2 of a low frequency is set as an operating frequency. This provides an electronic device and a filter that facilitate miniaturization and enable a balanced signal to be transmitted with superior balance characteristics.

Abstract: Filter for microwaves and millimetER waves, characterised in that it comprises a planar transmission medium (1) that it includes a conductor strip (3), metallic ground plane (4) and dielectric substrate (2) and in that it includes at least one split rings resonator (5a, 5b, 5c, 5d, 5e and 5f)

Abstract: A ferroelectric varactor suitable for capacitive shunt switching is disclosed. High resistivity silicon with a SiO2 layer and a patterned metallic layer deposited on top is used as the substrate. A ferroelectric thin-film layer deposited on the substrate is used for the implementation of the varactor. A top metal electrode is deposited on the ferroelectric thin-film layer forming a CPW transmission line. By using the capacitance formed by the large area ground conductors in the top metal electrode and bottom metallic layer, a series connection of the ferroelectric varactor with the large capacitor defined by the ground conductors is created. The large capacitor acts as a short to ground, eliminating the need for vias. The varactor shunt switches can be used to create a bandpass filter and a tunable notch filter. The bandpass filter is implemented by cascading the switches, and the bandpass filter implemented through the use of a resonance circuit.

Abstract: An RF MEMS switch having asymmetrical spring rigidity. The RF MEMS switch has supporting members spaced apart in a certain interval on a substrate, a membrane being a motion member suspended by plural spring members extended on both sides of the membrane, and a bottom electrode being a contact surface on an upper surface of the substrate facing a bottom surface of the membrane, wherein the plural spring members placed on opposite sides of the membrane have asymmetrical rigidity, and a portion of the membrane on a side of stronger spring rigidity is first separated from the contact surface when the RF MEMS switch is turned off. The present invention has an advantage of easy separation of the switch from the contact surface, when the switch is turned off, due to the different rigidity of the springs located on the sides of the membrane.

Abstract: An apparatus for inspecting conveyed works includes a plurality of inspection lines, each of which includes plural kinds of inspection units and a conveyor unit configured to convey the works to each inspection unit one after another. Certain inspection units are commonly used by the inspection lines.

Abstract: A MEMS (Micro Electro Mechanical Systems) switch actuated by electrostatic and piezoelectric forces, includes a substrate; a first contact point positioned in a predetermined first area on an upper surface of the substrate; a support layer suspended at a predetermined distance from the upper surface of the substrate; a second contact point formed on a lower surface of the support layer; a first actuator operative to move the support layer in a predetermined direction using an electrostatic force; and a second actuator operative to move the support layer in a predetermined direction using a piezoelectric force. The first actuator is used to turn on the MEMS switch. The second actuator can be used together with the first actuator to turn on the MEMS switch or can be separately used to turn off the MEMS switch. As a result, a stiction can be prevented from occurring between contact points.

Abstract: A superconducting magnet configuration with a magnet coil (1) of inductance L which is disposed in a cryostat (7) at a cryogenic temperature, for generating a temporally stable magnetic field, in a working volume, which is suitable for NMR measurements, and with current feed lines to an external current source (3) via which a current of a current strength IPS can be supplied, wherein, at a cryogenic temperature, the magnet coil (1) can be exclusively short-circuited via a switch (5), is characterized in that the switch (5) is normally conducting and comprises a mechanically operable bridge (6) with an ohmic resistance R1 which can be predetermined. The inventive magnet configuration ensures straightforward stable permanent operation via a mains supply even at high currents (>1000A) and also effective discharge of the energy released during a quench.

Abstract: In an annular magnet formed by coupling a plurality of arc-shaped divided magnets with each other in an annular shape as well as magnetized with N and S magnetic poles on both the end surfaces thereof in an axial direction, the annular magnet is characterized in that each of the divided magnets has joint portions at both the ends thereof so that the divided magnets are joined to each other as well as each of the joint portions has a joint surface to overlap the joint portions of adjacent divided magnets in the axial direction, the joint surface is magnetized to a magnetic pole different from that of a joint surface to which it is joined, and the divided magnets are coupled with each other by the magnetic attraction force of different magnet poles.

Abstract: An isolated dual-channel transformer is provided, which comprises: a bobbin with a primary coil-winding portion and two secondary coil-winding portions, for coiling a winding; an insulating cover with a plurality of small slots disposed at the two side edges and a large slot disposed at the central part, for covering the bobbin; and a set of cores integrated with the bobbin via the insulating cover; wherein the insulating cover is used to isolate the set of cores from the winding.

Abstract: A thermal fuse comprises: a first insulating film to which a pair of metal terminals are attached; a fusible alloy located above the first insulating film and connected between the leading end portions of the pair of metal terminals; and a second insulating film located above the fusible alloy and attached to the first insulating film so as to define a space with the first insulating film. The fusible alloy includes an Sn—Bi—In—Zn alloy containing 0.5 to 15 weight % of Bi, 45 to 55 weight % of In and 0.5 to 5 weight % of Zn with the balance being Sn.