Patents Issued in March 27, 2007
  • Patent number: 7196401
    Abstract: Chip-packaging with bonding options having a plurality of package substrates. The chip-packaging includes first and second package substrates, a chip, and a lead. The chip having a plurality of bonding pads is mounted on the first package substrate. One of these bonding pads is connected to the first package substrate. Another bonding pad is connected to the second package substrate. The lead is connected to one bonding pad. The first and second package substrates have first and second voltages, respectfully. The first voltage and the second voltage are different, and each can be a GND voltage or a POWER voltage. With connection of these bonding pads with the lead or connection of these bonding pads with two package substrates, input ends or output ends in the chip could be connected to a GND voltage or a POWER voltage, or to one pin of the chip-packaging.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: March 27, 2007
    Assignee: Faraday Technology Corp.
    Inventor: Cheng-Yen Huang
  • Patent number: 7196402
    Abstract: The present invention relates generally to permanent interconnections between electronic devices, such as integrated circuit packages, chips, wafers and printed circuit boards or substrates, or similar electronic devices. More particularly it relates to high-density electronic devices. The invention describes means and methods that can be used to counteract the undesirable effects of thermal cycling, shock and vibrations and severe environment conditions in general. For leaded devices, the leads are oriented to face the thermal center of the devices and the system they interact with. For leadless devices, the mounting elements are treated or prepared to control the migration of solder along the length of the elements, to ensure that those elements retain their desired flexibility.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: March 27, 2007
    Inventor: Gabe Cherian
  • Patent number: 7196403
    Abstract: A semiconductor package with heat spreader is disclosed. In one embodiment, the semiconductor package comprises a device carrier having a plurality of contact areas and a semiconductor die having a plurality of die pads of an active surface, the semiconductor die being mounted on the device carrier. Connection means to electrically connect the die pads to the contact areas and a heat spreading means mounted on the active surface of the die are provided. The heat spreading means includes an upper plate and a foot ring which protrudes from a bottom surface of the upper plate and which is positioned between the die pads on the active surface such that a cavity is formed between the heat spreading means and the active surface. The cavity is filled with an adhering means interconnecting the heat spreading means and the active surface.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: March 27, 2007
    Assignee: Infineon Technologies AG
    Inventor: Abdul Hamid Karim
  • Patent number: 7196404
    Abstract: A method of producing an electronic device electrically and mechanically couples an integrated circuit to a leadframe to produce an intermediate assembly. At least a portion of the intermediate assembly then is encapsulated with a molten encapsulating material. After it is encapsulated, the method permits the molten encapsulating material to substantially solidify. A method of detecting the orientation of a sensor as mounted to an external object also is disclosed.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: March 27, 2007
    Assignee: Analog Devices, Inc.
    Inventors: Mark L. Schirmer, Thomas W. Kelly
  • Patent number: 7196405
    Abstract: A hermetic package for electronic components which is made of metallic silicon is disclosed. The package includes a plurality of silicon elements which are bonded together. A metallic layer of platinum or gold is bonded to an internal surface of the hermetically sealed enclosure. While either metallic layer may serve as a heating element by subjecting the electronic circuit connected thereto with a large current, the platinum layer can also be used as a thermal sensor by passing a lower current there through. An internal heater is included to stabilize the performance of the electronic components.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: March 27, 2007
    Assignee: Bliley Technologies Inc.
    Inventors: Pablo Ferreiro, Kenneth Martin, John Cline
  • Patent number: 7196406
    Abstract: An ESD protection apparatus for an electrical device with a circuit structure having an internal terminal, which is connected to an external terminal of the electrical device via a conductive connection, has a gas-filled cavity, through which the conductive connection extends at least partly, and a reference electrode in the cavity, wherein the conductive connection is disposed such in the cavity, that when applying a potential exceeding a predetermined threshold to the external terminal, a gas discharge occurs from the conductive connection to the reference electrode.
    Type: Grant
    Filed: November 22, 2004
    Date of Patent: March 27, 2007
    Assignee: Infineon Technologies AG
    Inventor: Maksim Kuzmenka
  • Patent number: 7196407
    Abstract: A semiconductor device comprising the multi-chip stack structure that involves improved degree of freedom in routing arrangement and has reduced thickness is provided. A semiconductor device, comprising: a substrate; a lower semiconductor chip provided on the substrate; an upper semiconductor chip provided on the lower semiconductor chip; and a silicon spacer with a rerouting disposed between the lower semiconductor chip and the upper semiconductor chip, and including a protruding portion protruding farther outward than an outer periphery of the lower semiconductor chip, is provided. Second electrode pads provided on the protruding portion and first electrode pads provided on the lower semiconductor chip are connected via interconnects including through electrodes of the silicon spacer with the rerouting.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: March 27, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Nobuaki Takahashi
  • Patent number: 7196408
    Abstract: To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: March 27, 2007
    Inventors: Wen-Kun Yang, Wen-Pin Yang, Shih-Li Chen
  • Patent number: 7196409
    Abstract: The invention relates to a semiconductor device (10) comprising a semiconductor body (11) in which an IC is formed and which has a number of connection regions (1) for the IC on its surface, including at least two connection regions (1A) for a supply connection, the lower side of the semiconductor body (11) being provided with a number of further connection regions (2) which are connected to a connection region (1) by means of an electric connection (3) which is present on a side face of the semiconductor body (11) and electrically insulated therefrom, and the semiconductor body (11) being attached to a lead frame (4) and wire connections (5) being formed between leads (4A) of the frame (4) and connection regions (1) .
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: March 27, 2007
    Assignee: NXP B.V.
    Inventor: Josephus Adrianus Augustinus Den Ouden
  • Patent number: 7196410
    Abstract: A multi-device lid for a micro device wafer has a plurality of micro devices. The multi-device lid includes a multi-lid substrate configured to cover the plurality of micro devices of the micro device wafer. The multi-lid substrate has a trench pattern with intersection portions and non-intersection portions on a first side of the multi-lid substrate. The trench pattern is configured such that the intersection portions of the trench pattern extend adjacent to at least two of the plurality of micro devices when the multi-lid substrate is coupled to the micro device wafer.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: March 27, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chien-Hua Chen, Bradley C. John, Charlotte R. Lanig, Melissa A. Workman
  • Patent number: 7196411
    Abstract: Disclosed herein are IC package devices and related methods of manufacturing. In one embodiment, an package device includes first and second package substrates, and a first IC chip having at least one coupling structure formed on its active region for electrically coupling the first chip to the first substrate. The IC package also includes a second IC chip having at least one coupling structure formed on its active region for electrically coupling the second chip to the second substrate. The IC package also includes a heat spreader configured to disperse heat from the first and second chips, where the heat spreader has a first surface coupled to a backside of the first chip, and a second surface that coupled to a backside of the second chip. Thus, the backsides of the two chips are oriented towards each other. The internal heat spreader also provide support across the IC package to prevent warpage, and thus maintain coplanarity of the IC package.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: March 27, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Shih-Cherng Chang
  • Patent number: 7196412
    Abstract: A multi-chip press-connected type semiconductor device comprises: a plurality of active element chips to control an electric current flowing in one direction; a plurality of diode chips that transmit the current in a direction opposite to the current transmitting direction of said active element chip; and electrode plates for said active element chip and for said diode chip, said electrode plates pressing from above and under with said plurality of active element chips and said plurality of diode chips being interposed therebetween; wherein said diode chips are disposed in all of outermost peripheral chip positions with no-existence of other chips adjacent to at least one side of a chip in a chip disposing region, and are disposed in internal layout positions surrounded with the outermost peripheral chip positions, and said diode chips to be disposed in the internal layout positions are arranged in order of a total number of other chips from the smallest that exist adjacently to at least one of a side and a v
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: March 27, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeru Hasegawa, Hideaki Kitazawa
  • Patent number: 7196413
    Abstract: A heat dissipation assembly in which a heat generator and a heat dissipator are integrated via an electrically insulating and thermally conductive sheet, at least one surface of which a thermally conductive grease is applied to, in which the thermally conductive grease is incompatible with the electrically insulating and thermally conductive sheet. Heat from the heat generator such as a semiconductor device or the like can be effectively dissipated while an electrically insulating condition is maintained over a long period of time.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: March 27, 2007
    Assignees: Nissan Motor Co., Ltd., Fuji Polymer Industries Co., Ltd., Dow Corning Toray Co., Ltd.
    Inventors: Akihiro Shibuya, Motoyuki Furukawa, Mikio Naruse, Atsushi Ehira, Kazuhiro Ogawa, Hirotoshi Oota, Kazuyoshi Abe, Atsushi Ikezawa, Toru Kakehi
  • Patent number: 7196414
    Abstract: A semiconductor package with a heat sink is provided in which at least one chip is mounted on the substrate and covered by a heat sink. The heat sink is formed with a plurality of grooves or holes at positions in contact with the substrate, allowing an adhesive material to be applied between the heat sink and the substrate and filled into the grooves or holes for attaching the heat sink onto the substrate. The adhesive material filled into the grooves or holes provides an anchoring effect for firmly positioning the heat sink on the substrate. Therefore, it is not necessary to form predetermined holes on the substrate for being coupled to fixing members such as bolts, and incorporation of the heat sink would not affect trace routability and arrangement of input/output connections such as solder balls on the substrate and would not lead to cracks of the chip.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: March 27, 2007
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Fu Lin, Han-Ping Pu, Cheng-Hsu Hsiao, Chien Ping Huang
  • Patent number: 7196415
    Abstract: An apparatus and method for a low voltage drop and thermally enhanced integrated circuit (IC) package are described. A substantially planar substrate having a plurality of contact pads on a first surface is electrically connected through the substrate to a plurality of solder ball pads on a second surface of the substrate. An IC die having a first surface is mounted to the first surface of the substrate. The IC die has a plurality of I/O pads electrically connected to the plurality of contact pads on the first surface of the substrate. A heat sink assembly is coupled to a second surface of the IC die and to a first contact pad on the first surface of the substrate to provide a thermal path from the IC die to the first surface of the substrate. The heat sink assembly can also provide an electrical path from the IC die to the first surface of the substrate. The heat sink assembly may have one or two heat sink elements to provide thermal and/or electrical connectivity between the IC die and the substrate.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: March 27, 2007
    Assignee: Broadcom Corporation
    Inventors: Chong Hua Zhong, Reza-ur Rahman Khan
  • Patent number: 7196416
    Abstract: The electronic device (100) is a chip-on-chip construction on a lead frame (10) comprising a heat sink (13) in an encapsulation (80). The first chip (20) and the second chip (30) are mutually connected by first conductive interconnections (24) and the first chip (20) is connected to the lead frame (10) by second conductive interconnections (27) which preferably have a lower reflow temperature than the first conductive interconnections (24). By heating the device (100) the adhesive layer (25) will first shrink, causing a stress, which will be relaxated by reflowing the second conductive interconnections (27).
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: March 27, 2007
    Assignee: NXP B.V.
    Inventors: Hendrik Pieter Hochstenbach, Andrea Henricus Maria Van Eck, Rintje Van Der Meulen
  • Patent number: 7196417
    Abstract: A mold is filled with unsintered SiC particles and a melt of Al or of an Al alloy containing Si is poured into the mold for high pressure casting. Owing to the SiC particles and Si precipitated upon casting, a low expansion material having a low thermal expansion coefficient is produced. A heat transmission path is formed by Al infiltrating spaces between the SiC particles and therefore high heat conductivity is obtained.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: March 27, 2007
    Assignee: Kabushiki Kaisha Toyota Jidoshokki
    Inventors: Tomohei Sugiyama, Kyoichi Kinoshita, Takashi Yoshida, Hidehiro Kudo, Eiji Kono
  • Patent number: 7196418
    Abstract: A semiconductor device includes a semiconductor element having a plurality of electrodes provided on one principal surface thereof and a wiring substrate having a conductive layer on an insulating substrate. The wiring substrate is arranged in a substantially U-shape along an outer edge of the semiconductor element. An end of the conductive layer of the wiring substrate is connected to the electrodes of the semiconductor element. The other end of the conductive layer extends in a direction opposite to the semiconductor element on the other principal surface side of the semiconductor element.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: March 27, 2007
    Assignee: Fujitsu Limited
    Inventors: Takao Ohno, Eiji Yoshida, Hiroshi Misawa
  • Patent number: 7196419
    Abstract: A semiconductor processing system utilizing transport speed monitoring of a wafer boat. The semiconductor processing comprises a process chamber, loading device, and transport speed monitoring device. The loading device transports a boat of wafers into and out of the process chamber where the wafers experience particular treatment. The transport speed monitoring device is responsible for detecting the movement of the wafer boat and asserting an abnormality signal when the transport speed of the wafer boat falls beyond a limit.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: March 27, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chi-Min Liao
  • Patent number: 7196420
    Abstract: A low resistance copper damascene interconnect structure is formed by providing a thin dielectric film such as SiC or SiOC formed on the sidewalls of the via and trench structures to function as a copper diffusion barrier layer. The dielectric copper diffusion barrier formed on the bottom of the trench structure is removed by anisotropic etching to expose patterned metal areas. The residual dielectric thus forms a dielectric diffusion barrier film on the sidewalls of the structure, and coupled with the metal diffusion barrier subsequently formed in the trench, creates a copper diffusion barrier to protect the bulk dielectric from copper leakage.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: March 27, 2007
    Assignee: LSI Logic Corporation
    Inventors: Peter A. Burke, Hongqiang Lu, Sey-Shing Sun
  • Patent number: 7196421
    Abstract: An integrated circuit is provided that includes at least one metallization level having a plurality of dummy conductors. At least one of the dummy conductors has an oriented shape made up of a plurality of non-parallel rectangles in mutual contact. In one embodiment, the at least one dummy conductor is in the form of an “L”. In another embodiment, the at least one dummy conductor is in the form of a Latin cross. In yet another embodiment, the at least one dummy conductor is in the form of a “T”.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: March 27, 2007
    Assignee: STMicroelectronics SA
    Inventor: Michel Vallet
  • Patent number: 7196422
    Abstract: The present invention describes a structure having a multilayer stack of thin films, the thin films being a low-dielectric constant material, the thin films having pores, and a method of forming such a structure.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: March 27, 2007
    Assignee: Intel Corporation
    Inventor: Ebrahim Andideh
  • Patent number: 7196423
    Abstract: An interconnect structure with dielectric barrier and fabrication thereof. The interconnect structure includes a semiconductor substrate and a plurality of stacked structures formed thereon, each stacked structure including a conductive line and a conductive plug thereon. A conformal dielectric barrier is formed over the surfaces of the stacked structures and a blanket second dielectric layer is formed over the dielectric barrier to form an inter-metal layer.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: March 27, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Zhen-Cheng Wu, Ying-Tsung Chen, Yun-Cheng Lu, Syun-Ming Jang
  • Patent number: 7196424
    Abstract: A semiconductor device with a packaging circuit portion connected to a semiconductor chip therein. The semiconductor chip includes a plurality of pad electrodes, and the packaging circuit portion includes wiring connected to the pad electrodes on the semiconductor chip, mounting terminals, and a first signal path for receiving a signal output from the predetermined one of the pad electrodes and transmitting the signal to other one of the pad electrodes. The first signal path includes delay elements comparable to delays in a second signal path extending from the predetermined one of the mounting terminals to the other one of the mounting terminals through the semiconductor chip, and is disposed on a feedback path for phase comparison for synchronizing the phase of an output signal from the second signal path to the phase of an input signal to the second signal path.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: March 27, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Noriyuki Itano, Kinya Mitsumoto
  • Patent number: 7196425
    Abstract: A stacked die integrated circuit assembly comprising: 1) a substrate; 2) a first integrated circuit die mounted on the substrate; 3) a copper interposer mounted on the first integrated circuit die; and 4) a second integrated circuit die mounted on the copper interposer. The copper interposer significantly reduces the warping of the stacked die IC assembly caused by the warping of the substrate due to thermal changes in the substrate. The copper interposer has a significantly higher coefficient of thermal expansion than a conventional silicon (Si) interposer. The higher CTE enables the copper interposer to counteract the substrate warping.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: March 27, 2007
    Assignee: STMicroelectronics, Inc.
    Inventors: Anthony M. Chiu, Tong Yan Tee
  • Patent number: 7196426
    Abstract: A multilayered substrate for a semiconductor device, which has a multilayered substrate body formed of a plurality sets of a conductor layer and an insulation layer, and having a face for mounting a semiconductor element thereon and another face for external connection terminals, the face for mounting a semiconductor device being provided with pads through which the substrate is connected to a semiconductor element to be mounted thereon, and the face for external connection terminals being provided with pads through which the substrate is connected to an external electrical circuit, wherein a reinforcing sheet is respectively joined to the face for mounting a semiconductor element thereon and the face for external connection terminals of the multilayered substrate body.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: March 27, 2007
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Jyunichi Nakamura, Tadashi Kodaira, Shunichiro Matsumoto, Hironari Aratani, Takanori Tabuchi, Takeshi Chino
  • Patent number: 7196427
    Abstract: Two or more semiconductor packages are stacked with an intervening element that is positioned between within an area surrounded by conductive bumps of a bottom surface of the overlying package. Different shapes of the intervening element are used depending upon how many sides of the bottom surface have conductive bumps. In one form the intervening element extends laterally from the stack and is bent downward to contact or extend through an underlying substrate. Contact to the intervening element at the backside of the substrate may be made. In another form the intervening element is bent upward for enhancing thermal properties. The intervening element is adhesive to prevent non-destructive removal of the packages thereby adding increased security for information contained within the packages. Selective electrical shielding between packages is also provided.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: March 27, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Marc A. Mangrum
  • Patent number: 7196428
    Abstract: An integrated circuit chip is provided, which includes a bond pad structure. The bond pad structure includes a bond pad, a first metal plate, and a second metal plate. The first metal plate is located under the bond pad. The first metal plate has a first outer profile area. The second metal plate is located under the first metal plate. A cumulative top view outer profile area of the first metal plate and the second metal plate is larger than the first outer profile area of the first metal plate. The second metal plate may have a second outer profile area that is substantially equal to or larger than the first outer profile area. A first vertical axis may extend through a centroid of the first metal plate, and a centroid of the second metal plate may be laterally offset relative to the first vertical axis.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: March 27, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Hsien-Wei Chen
  • Patent number: 7196429
    Abstract: An integrated circuit capable of operating despite a profile shift is disclosed. Overlay marks on the integrated circuit are surrounded by a trench that tends to relieve the effect of a profile shift caused by stress applied to the integrated circuit. The position of the overlay marks tends, therefore, not to be affected by the stress.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: March 27, 2007
    Assignee: Macronix International Co., Ltd.
    Inventors: Yu-Lin Yen, Ching-Yu Chang
  • Patent number: 7196430
    Abstract: A Partial-Powered Series Hybrid Driving System enables an engine to run with high power and high speed for normal or high load driving. If the load is driven under low-power, low-speed light loading conditions, the present system operates in a series hybrid driving configuration to improve efficiency and reduce pollution by the engine.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: March 27, 2007
    Inventor: Tai-Her Yang
  • Patent number: 7196431
    Abstract: A device for prompting a controller in a vehicle to switch the controller from a normal operating state into an idle state includes a prompting device which switches a power supply through to the controller when activated to bring it into the normal operating state. The prompting device is connected in series to a first condenser and a resistor between power supply lines. A central tap between the first condenser and the resistor is connected directly or indirectly with the control input of a first transistor. An output of the first transistor is connected directly or indirectly with a control input of a second transistor that switches the supply current for the controller to be prompted. A connection line led back from the second transistor to the node between central tap and control input of the first transistor.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: March 27, 2007
    Assignee: DaimlerChrysler AG
    Inventors: Gerhard Eckert, Walter Huber, Gerhard Nagel, Hans-Peter Schoener
  • Patent number: 7196432
    Abstract: In the device a controllable switch is built into the control device which enables the start authorization and by means of which the supply voltage with which this controllable switch is supplied can be switched off. To check a start authorization a diagnosis can be undertaken which is realized with known resistance elements in the voltage supply line between identification device holder and control device. This allows the voltage drops across the elements to be compared with the corresponding required values. Simple short circuiting of the starter or the ignition is thus no longer possible since this would be detected by the control device as a result of the changes in voltage drop. In addition a fault in the supply voltage or the feed lines can be definitively detected.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: March 27, 2007
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ulrich Emmerling, Axel Müller
  • Patent number: 7196433
    Abstract: A multi-output circuit device with preset power supply priority that provides higher safety, wherein, the load of inferior priority depending on the preset overload breaking sequence is cut off first when the total load amperage exceeds the rated amperage while maintaining power supply to the load of superior priority under the operation status of variable local loads.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: March 27, 2007
    Inventor: Tai-Her Yang
  • Patent number: 7196434
    Abstract: The present invention provides an electrical isolation apparatus having independently controllable contactors. The isolation apparatus includes a contactor for each phase or pole of an electrical device as well as each phase or pole of a load. Each contactor is constructed so that each includes multiple contact assemblies that may be independently controlled to open and close. Moreover, the contactors within a single contactor assembly or housing can be independently controlled so that the contacts of one contactor can be opened without opening the contacts of the other contactors in the contactor assembly. Additionally, the contactors are constructed and controlled such that a single line side contactor and a single load contactor open simultaneously when an open circuit condition is desired.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: March 27, 2007
    Assignee: Eaton Corporation
    Inventors: Xin Zhou, Michael T. Little, James Kinsella, Christopher J. Wieloch
  • Patent number: 7196435
    Abstract: A solid state relay coupleable to first and second phase busses of an AC power source for switching power from the first and second phase busses to a load comprises: first and second power semiconductor switches connected in a series circuit configuration and coupleable to the first and second phase busses for switching power from the first and second phase busses to the load, each of the first and second power semiconductor switches controllably operative in conductive and non-conductive states; first and second power diodes coupled respectively across the first and second power semiconductor switches; and a control circuit for monitoring a polarity relationship of the first and second phase busses and controlling the first and second switches between conductive and non-conductive states based on the monitored polarity relationship. A method of operating the solid state relay is further disclosed.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: March 27, 2007
    Assignee: Goodrich Corporation
    Inventors: Michael M. Kugelman, Steven C. Simshauser
  • Patent number: 7196436
    Abstract: A solid state relay coupleable to first and second phase busses of an AC power source for switching power from the first and second phase busses to a load including a reactive component comprises: first and second power semiconductor switches connected in a series circuit configuration and coupleable to the first and second phase busses for switching power from the first and second phase busses to the load, each of the first and second power semiconductor switches controllably operative in conductive and non-conductive states; first and second power diodes coupled respectively across the first and second power semiconductor switches; and a control circuit for monitoring a voltage across the first and second phase busses and a current of the load, and for controlling the first and second switches to a conductive state based on the monitored voltage and to a non-conductive state based on the monitored load current. A counterpart method is also disclosed.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: March 27, 2007
    Assignee: Goodrich Corporation
    Inventor: Michael M. Kugelman
  • Patent number: 7196437
    Abstract: A contraction type actuator 10 is provided which can efficiently and evenly apply a bias magnetic field to a magnetostrictive rod to obtain a large contraction amount, while having a small and simple structure. In the contraction type actuator 10, a giant magnetostrictive rod 12 flexibly expands and contracts by controlling the strength of a magnetic field applied by a magnet coil 14. A bias magnet comprises a first bias magnet 16 and a second bias magnet 18. The fist bias magnet 16 in an approximately cylindrical shape is coaxially disposed around the giant magnetostrictive rod 12. The second bias magnet 18 is disposed in the inner space 16A of the first bias magnet 16, and is polarized in the direction of drawing a part of a magnetic field generated by the first bias magnet 16 into the inner space 16A.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: March 27, 2007
    Assignee: TDK Corporation
    Inventor: Teruo Mori
  • Patent number: 7196438
    Abstract: A resilient isolation member is configured for use with an electric machine having a housing, a stator within the housing, and an end shield. The resilient isolation member includes first and second end portions, a sidewall extending between the first and second end portions, and a lip is disposed along an outer surface of the sidewall. The resilient isolation member is sized for mounting between the end shield and the stator, with the first and second end portions respectively abutting against a first inner portion of the end shield and a portion of the stator and with the lip abutting against a second inner portion of the end shield and a portion of the housing.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: March 27, 2007
    Assignee: Emerson Electric Co.
    Inventors: Donald J Williams, Gary E Horst, Chetan O Modi, Michael L McCelland
  • Patent number: 7196439
    Abstract: The invention concerns a rotating electrical machine, in particular an alternator or an alterno-starter for a motor vehicle, comprising: a rotor (1) centered and fixed on a rotating shaft (2) supported by at least one rear bearing (4), the rear bearing (4) including radial cooling fluid outlets (4a, 4d); a stator (3) enclosing the rotor, the stator including a field coil (7) including windings constituting phases of the electrical machine; an electronic power circuit (15) connected to the windings of the stator phases; a heat dissipation bridge (16) including a first surface whereon is mounted the electronic power circuit and a second surface, opposite said first surface and oriented towards the rear bearing, said second surface forming a longitudinal wall of a passageway (17) for cooling fluid circulation, another longitudinal wall of said passageway (17) being formed by the rear bearing (4) supporting the stator wherein the second surface of the heat dissipating bridge (16) comprises cooling means (18) arra
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: March 27, 2007
    Assignee: Valeo Equipements Electriques Moteur
    Inventors: Jean-Marie Pierret, Michel Fakes, Dirk Schulte, Jean Julien Pfiffer
  • Patent number: 7196440
    Abstract: A hand power tool that is driven via an electric motor (20), the electric motor (20) having a commutator (28) which is formed of disklike annular segments or laminations (32), is made more secure against contact spark development by providing that at least one of the laminations (32) has at least one central recess (42, 44, 46).
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: March 27, 2007
    Assignee: Robert Bosch GmbH
    Inventor: Justus Lamprecht
  • Patent number: 7196441
    Abstract: The present invention provides an AC generator for a vehicle, capable of improving the cooling capability and environmental resistance of a rectifier. The rectifier of the vehicle AC generator includes a positive electrode side radiating fin and negative electrode side radiating fin disposed in piles in a axial direction, a positive electrode side rectifying elements and negative electrode side rectifying elements provided in the radiating fins, respectively, and a terminal board. The positive electrode side radiating fin is equipped with cylindrical fixing portions to which the positive electrode side rectifying elements are fixed and radial sub-fins extending radially from the fixing portions. An opening portion surrounded by the fixing portion, the radial sub-fin and others forms an axial air flow passage.
    Type: Grant
    Filed: March 18, 2004
    Date of Patent: March 27, 2007
    Assignee: Denso Corporation
    Inventors: Kenji Ueda, Motoki Ito
  • Patent number: 7196442
    Abstract: An encoder mounted on a motor axle of an AC servomotor has a single bipolarly magnetized rotational disk, magnetic sensors for outputting X- and Y-signals that differ in phase by 90° in association with the rotation thereof, and a signal processing unit. The signal processing unit computes at predetermined cycles a rotor angle ?a of a motor rotor on the basis of the X- and Y-phase signals, generates three-phase magnetic pole signals U, V, and W that differ in phase by 120° on the basis of the number M of magnetic poles of a motor, a magnetic pole reference angle ?o, and the rotor angle ?a; and generates A- and B-phase signals with predetermined pulse cycles that differ in phase by 90° on the basis of the rotor angle ?a. An encoder that is advantageous for reducing the size and weight of an AC servomotor can be realized because it is sufficient to provide a single assembly composed of a rotational disk and magnetic sensors.
    Type: Grant
    Filed: November 22, 2004
    Date of Patent: March 27, 2007
    Assignee: Harmonic Drive Systems Inc.
    Inventors: Kunio Miyashita, Junji Koyama
  • Patent number: 7196443
    Abstract: In a rotary electric machine, each stator coil includes a bobbin that is fitted to one of teeth of a stator core and a phase coil is wound around the bobbin. Each bobbin includes a bobbin terminal for connecting opposite ends of the phase coil. A stator housing includes an insert mold and a plurality of stator terminals embedded in the insert mold to be connectable to an outside electric device. Each stator terminal has a first contact portion and each bobbin terminal has a second contact portion in contact with the first contact portion when the stator core is accommodated in the stator housing.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: March 27, 2007
    Assignee: Denso Corporation
    Inventors: Kiyoshi Kimura, Shigeru Yoshiyama, Masashi Hori
  • Patent number: 7196444
    Abstract: There is provided a stepping motor comprising: a stator assembly; a rotor assembly rotatably disposed inside the stator assembly, and including a rotary shaft rotatably supported by bearings, a sleeve fixedly attached onto the rotary shaft, and at least one magnet disposed outside the sleeve; and a preloading mechanism disposed between the sleeve and one of the bearings, and including a coil spring, and a spring holder which is composed of an outer case shaped in a cup-like configuration and an inner case shaped in a cup-like configuration, and which is adapted to house the coil spring. In the stepping motor described above, the spring holder of the preloading mechanism is formed of reinforced polyamide resin, and a washer member having a high sliladability is disposed between the preloading mechanism and the one bearing.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: March 27, 2007
    Assignee: Minebea Co., Ltd.
    Inventors: Masato Hata, Yazuru Suzuki, Atsushi Fukushima, Naoyuki Harada
  • Patent number: 7196445
    Abstract: A permanent-magnet rotating machine includes a rotor having a rotor core carrying on a curved outer surface multiple permanent magnets arranged in two rows along an axial direction. The permanent magnets in one row are skewed from those in the other row in a circumferential direction by a row-to-row skew angle (electrical angle) ?e. A stator having a tubular stator core in which the rotor disposed, includes stator coils for producing a rotating magnetic field for rotating the rotor. A lower limit of the row-to-row skew angle ?e larger than 30 degrees (electrical angle). A ratio, of cogging torque occurring in the absence of skew to cogging torque occurring when the permanent magnets are skewed, at a row-to-row skew angle of 30 degrees is calculated based on the cogging torque ratio, the row-to-row skew angle ?e, and B-H curve properties of the stator core.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: March 27, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinichi Yamaguchi, Haruyuki Kometani, Tomohiro Kikuchi, Takashi Miyazaki
  • Patent number: 7196446
    Abstract: The invention relates to a rotor for an electric motor comprising an essentially cylindrical rotor core having a central aperture, and comprising permanent magnets which are embedded in the rotor core and extend essentially like spokes through the rotor core, the radially inner ends of selected adjacent permanent magnets being magnetically coupled by at least one auxiliary magnet.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: March 27, 2007
    Assignee: Minebea Co., Ltd.
    Inventor: Helmut Hans
  • Patent number: 7196447
    Abstract: A rotating electric machine comprises a stator having stator salient poles, three-phases windings wound around the stator salient poles, a rotor rotatable held inside the stator, and permanent magnets inserted into the rotor and positioned opposite to the stator salient poles. Three-phase windings, which are concentratively wound around each of the stator salient poles, are wound around more than one stator salient pole. The windings of each phase have a phase difference of voltage between at least one of the windings and the other.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: March 27, 2007
    Assignees: Hitachi, Ltd., Hitachi Car Engineering Co., Ltd.
    Inventors: Fumio Tajima, Yutaka Matsunobe, Shouichi Kawamata, Suetaro Shibukawa, Osamu Koizumi, Keijiro Oda
  • Patent number: 7196448
    Abstract: A stator structure. A first stator part includes a first engaging portion. A second stator part includes a second engaging portion corresponding to the first engaging portion. The first and second stator parts are of the same material. When the first stator part is assembled with the second stator part, the first engaging portion is engaged with the second engaging portion so as to form the stator structure with a waist post.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: March 27, 2007
    Assignee: Delta Electronics, Inc.
    Inventors: Lee-Long Chen, Shih-Wei Huang, Shih-Ming Huang, Wen-Shi Huang
  • Patent number: 7196449
    Abstract: A two-axis device is provided. The two-axis device includes a first substrate having a plurality of electrodes, a first connecting layer located on the first substrate, an actuating layer, a second connecting layer and a cover. The actuating layer is connected to the first substrate via the first connecting layer and includes a circular portion, an actuating portion, a first shaft and a second shaft. The second connecting layer is connected to the actuating layer and the cover is connected to the actuating layer via the second connecting layer. In addition, a vacuum concavity is formed by the first substrate, the first connecting layer, the actuating layer, the second connecting layer and the cover. The actuating portion and the first shaft are located in the vacuum concavity, and the second shaft extends outside of the vacuum concavity.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: March 27, 2007
    Assignee: Walsin Lihwa Corp.
    Inventors: Mingching Wu, Hsueh-An Yang, Hung-Yi Lin, Weileun Fang
  • Patent number: 7196450
    Abstract: Electromechanical systems utilizing suspended conducting nanometer-scale beams are provided and may be used in applications, such as, motors, generators, pumps, fans, compressors, propulsion systems, transmitters, receivers, heat engines, heat pumps, magnetic field sensors, kinetic energy storage devices and accelerometers. Such nanometer-scale beams may be provided as, for example, single molecules, single crystal filaments, or nanotubes. When suspended by both ends, these nanometer-scale beams may be caused to rotate about their line of suspension, similar to the motion of a jumprope (or a rotating whip), via electromagnetic or electrostatic forces. This motion may be used, for example, to accelerate molecules of a working substance in a preferred direction, generate electricity from the motion of a working substance molecules, or generate electromagnetic signals. Means of transmitting and controlling currents through these beams are also described.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: March 27, 2007
    Assignee: Ambient Systems, Inc.
    Inventors: Joseph F Pinkerton, John C Harlan