Patents Issued in April 24, 2007
  • Patent number: 7208828
    Abstract: A semiconductor package includes a substrate formed of a board material, a semiconductor die bonded to the substrate, and an encapsulant on the die. The package also includes an array of external contacts formed as multi layered metal bumps that include a base layer, a bump layer, and a non-oxidizing outer layer. The external contacts are smaller and more uniform than conventional solder balls, and can be fabricated using low temperature deposition processes, such that package warpage is decreased. Further, the external contacts can be shaped by etching to have generally planar tip portions that facilitate bonding to electrodes of a supporting substrate. Die contacts on the substrate can also be formed as multi layered metal bumps having generally planar tip portions, such that the die can be flip chip mounted to the substrate.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: April 24, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Victor Tan Cher 'Khng, Lee Kian Chai
  • Patent number: 7208829
    Abstract: A semiconductor component that is able to be produced simply, quickly, and yet reliably and that usable for power applications, and including a semiconductor chip, a lower, first main electrode layer formed on a first side of the semiconductor chip, a lower control electrode layer formed on the first side, an insulation layer formed on the first side between the lower first main electrode layer and the lower control electrode layer and which partly covers the lower first main electrode layer, an upper first main electrode layer which is formed on the lower first main electrode layer, an upper control electrode layer which is formed on the lower control electrode layer and the insulation layer and extends on the insulation layer partially above the lower first main electrode layer, and a second main electrode layer formed on a second side of the semiconductor chip.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: April 24, 2007
    Assignee: Robert Bosch GmbH
    Inventors: Henning Hauenstein, Rainer Topp, Jochen Seibold, Dirk Balszunat, Stefan Ernst, Wolfgang Feiler, Thomas Koester, Stefan Hornung, Dieter Streb
  • Patent number: 7208830
    Abstract: In one embodiment of the invention, an integrated circuit package includes an integrated circuit, a package substrate, a first bump, a second bump and a shunt to provide for current distribution and reliability redundancy. The first and second bumps provide a first and second electric current pathway between the integrated circuit and package substrate. The shunt provides a third electric current pathway between the first bump and the second bump.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: April 24, 2007
    Assignee: Intel Corporation
    Inventors: Mark Bohr, Jun He, Fay Hua, Dustin P. Wood
  • Patent number: 7208831
    Abstract: A method for manufacturing a semiconductor device includes a step of forming a first groove in a first insulating film, forming a conductive film in the first groove, a step of selectively forming a second insulating film on the conductive film and the first insulating film, a step of forming a second groove by removing part of the conductive film using the second insulating film as a mask, the second groove being formed so as to form a connecting portion of the conductive film under the second insulating film and form a first wiring layer by forming the connecting portion with a bottom of the first groove integrally with each other as one unit.
    Type: Grant
    Filed: January 8, 2004
    Date of Patent: April 24, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuji Fukazawa
  • Patent number: 7208832
    Abstract: A semiconductor device includes a plurality of insulating layers laminated on a substrate to cover passive elements such as a capacitor, an inductor, and the like, and to fix an IC chip in a face up state in one of the insulating layers. The insulating layers have similar structures in each of which the passive element or the semiconductor chip is disposed in at the bottom, a plug is formed in the insulating layer to pass therethrough in the thickness direction for extending an electrode of one of these elements to the top surface, and a conductive layer is provided as wiring on the top surface of the insulating layer to be connected to the plugs for electrically connecting respective elements or rearranging the electrode position. Also, an insulating layer is provided on the top for protecting the semiconductor device and for providing an external connecting electrode.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: April 24, 2007
    Assignee: Sony Corporation
    Inventor: Osamu Yamagata
  • Patent number: 7208833
    Abstract: An electronic circuit device comprises: a semiconductor element having a first surface and a second surface, with the first and second surfaces being on first and second sides of the semiconductor element, respectively, and facing in opposite directions; a first electrode on the first surface; a second electrode on the second surface; a first circuit board electrically connected to the first electrode via a metallic plate such that the metallic plate and the semiconductor element are on the first circuit board; a second circuit board on the second side of the semiconductor element, the second circuit board having a control circuit for the semiconductor element; and a metallic wire for directly electrically interconnecting the second electrode and the second circuit board.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: April 24, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Nobori, Satoshi Ikeda, Yasushi Kato, Yasufumi Nakajima
  • Patent number: 7208834
    Abstract: A cylindrical bonding structure and its method of manufacture. The cylindrical bonding structure is formed over the bonding pad of a silicon chip and the chip is flipped over to connect with a substrate board in the process of forming a flip-chip package. The cylindrical bonding structure mainly includes a conductive pillar and a solder cap. The conductive pillar is formed over the bonding pad of the silicon chip and the solder cap is attached to the upper end of the conductive pillar. The solder cap has a melting point lower than the conductive pillar. The solder cap can be configured into a cylindrical, spherical or hemispherical shape. To fabricate the cylindrical bonding structure, a patterned mask layer having a plurality of openings that correspond in position to the bonding pads on the wafer is formed over a silicon wafer. Conductive material is deposited into the openings to form conductive pillars and finally a solder cap is attached to the end of each conductive pillar.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: April 24, 2007
    Assignee: Megica Corporation
    Inventors: Jin-Yuan Lee, Chien-Kang Chou, Shih-Hsiung Lin, Hsi-Shan Kuo
  • Patent number: 7208835
    Abstract: An integrated circuit (IC) package and IC assembly. The IC assembly comprises the IC package, an insulating substrate and an adhesive film. The IC package comprises a chip body and a plurality of bumps. The bumps are disposed on a first surface of the chip body, each bump having a patterned pressing surface. The insulating substrate comprises a plurality of electrode pads corresponding to the bumps. Each electrode pad has a second surface pressed on the pressing surface of each bump. The adhesive film is disposed between the IC package and the insulating substrate, for covering the bumps and the electrode pads.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: April 24, 2007
    Assignee: AU Optronics Corp.
    Inventors: Yu-Jen Tsou, Yi-Lung Fang
  • Patent number: 7208836
    Abstract: A semiconductor processing method of forming a plurality of conductive lines includes, a) providing a substrate; b) providing a first conductive material layer over the substrate; c) providing a first insulating material layer over the first conductive layer; d) etching through the first insulating layer and the first conductive layer to the substrate to both form a plurality of first conductive lines from the first conductive layer and provide a plurality of grooves between the first lines, the first lines being capped by first insulating layer material, the first lines having respective sidewalls; e) electrically insulating the first line sidewalls; and f) after insulating the sidewalls, providing the grooves with a second conductive material to form a plurality of second lines within the grooves which alternate with the first lines. Integrated circuitry formed according to the method, and other methods, is also disclosed.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: April 24, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Monte Manning
  • Patent number: 7208837
    Abstract: A reinforced bonding pad structure includes a bondable metal layer defined on a stress-buffering dielectric layer, and an intermediate metal layer damascened in a first inter-metal dielectric (IMD) layer disposed under the stress-buffering dielectric layer. The intermediate metal layer is situated directly under the bondable metal layer and is electrically connected to the bondable metal layer with a plurality of via plugs integrated with the bondable metal layer. A metal frame is damascened in a second IMD layer under the first IMD layer. The metal frame is situated directly under the intermediate metal layer for counteracting mechanical stress exerted on the bondable metal layer during bonding, when the thickness of said stress-buffering dielectric layer is greater than 2000 angstroms, the damascened metal frame may be omitted. An active circuit portion including active circuit components of the integrated circuit is situated directly under the metal frame.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: April 24, 2007
    Assignee: United Microelectronics Corp.
    Inventors: Kun-Chih Wang, Bing-Chang Wu
  • Patent number: 7208838
    Abstract: A semiconductor device includes a semiconductor device body section having a substrate and an electrode formed on the substrate. A through-hole is formed through the electrode and the substrate in a stacking direction of the electrode and the substrate, and a conductive member is inserted into the through-hole. An insulating material which faces at least the through-hole is formed on the electrode. The conductive member is formed over the insulating material from the through-hole and is connected with the electrode.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: April 24, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Kazuhiro Masuda
  • Patent number: 7208839
    Abstract: Methods relating to forming interconnects through injection of conductive materials, to fabricating semiconductor component assemblies, and to resulting assemblies. A semiconductor component substrate, such as a semiconductor die or other substrate, has dielectric material disposed on a surface thereof, surrounding but not covering interconnect elements, such as bond pads, on that surface. A second semiconductor component substrate, such as a carrier substrate with interconnect elements such as terminal pads, is adhered to the first semiconductor component substrate, forming a semiconductor package assembly having interconnect voids between the corresponding interconnect elements. A flowable conductive material is then injected into each interconnect void using an injection needle that passes through one of the substrates into the interconnect void, forming a conductive interconnect between the bond pads and terminal pads of the substrates.
    Type: Grant
    Filed: May 6, 2005
    Date of Patent: April 24, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Charles E. Larson
  • Patent number: 7208840
    Abstract: First alignment marks are provided on a film substrate in a manner that they are located at positions offset from the disposed positions of second alignment marks provided on a semiconductor chip. The amount of expansion or contraction of the film substrate is obtained by measuring the distance between the first alignment marks. Based on the amount of expansion or contraction, the semiconductor chip is shifted with respect to the film substrate and mounted thereon.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: April 24, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Hideki Yuzawa
  • Patent number: 7208841
    Abstract: A semiconductor device (51) is provided. The device (51) comprises a die (53) having a contact pad (61) thereon, a redistribution conductor (59) having a base portion (64) which is in electrical communication with the contact pad (61) and a laterally extending portion (63), a bumped contact (65) which is in electrical communication with the redistribution conductor (59), and a passivation layer (57) disposed between the laterally extending portion (63) of the redistribution conductor (59) and the die (53). Preferably, the redistribution conductor (59) is convoluted and is adapted to peel or delaminate from the passivation layer (57) under sufficient stress so that it can shift relative to the passivation layer (57) and base portion (64) to relieve mechanical stress between substrate (69) and the die (53). Bump and coiled redistribution conductor (59) accommodating small CTE mis-match strain without failure allows DCA flip-chip to be reliable without underfill or additional assembly process.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: April 24, 2007
    Assignee: Motorola, Inc.
    Inventors: James Jen-Ho Wang, Jin-Wook Jang, Alfredo Mendoza, Rajashi Runton, Russell Shumway
  • Patent number: 7208842
    Abstract: A semiconductor chip for flip chip bonding, a mounting structure for the semiconductor chip, and methods for forming a semiconductor chip for flip chip bonding and for fabricating a printed circuit board for a mounting structure of a semiconductor chip are provided which may improve connection between a solder bump of the semiconductor chip and a substrate of the printed circuit board without having to use an underfill material. A polymer core of the solder bump may be supported between a 3-dimensional UBM and a 3-dimensional top surface metallurgy, so as to establish connection strength of the solder bump without using underfill material, and to absorb the stresses which may concentrate on the solder bump due to the difference in coefficients of thermal expansion between metals.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: April 24, 2007
    Assignee: Samsung Electronics Co., Ltd
    Inventor: Se-Young Jeong
  • Patent number: 7208843
    Abstract: A novel pad structure for an integrated circuit component that utilizes a bump interconnect for connection to other integrated circuit components that produces a relatively uniform current distribution within the bump of the bump interconnect is presented. The pad structure includes an inner pad implemented on an inner conductive layer of the integrated circuit component, an outer pad implemented on an outer conductive layer of the integrated circuit component, and a plurality of vias connecting the inner pad and outer pad. The outer pad is sealed preferably around its edges with a passivation layer, which includes an opening exposing a portion of the outer pad. The vias connecting the inner pad and outer pad are preferably implemented to lie in a via region within the footprint of the pad opening.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: April 24, 2007
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Wayne Patrick Richling, Walter John Dauksher, William S. Graupp
  • Patent number: 7208844
    Abstract: A semiconductor device including a substrate having a main surface including a first area, a second area surrounding the first area, and a third area surrounding the second area; a first insulating protective film that is provided in the first area and formed in a shape having no angles; a second insulating protective film provided in the third area; a semiconductor chip that is provided on the first insulating protective film and has a bottom surface facing to the first insulating protective film; and a sealing resin covering the semiconductor chip, wherein the bottom surface of the semiconductor chip covers the first area.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: April 24, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Seiji Andoh
  • Patent number: 7208845
    Abstract: A vibration based power generator. In a described embodiment, an electrical power generating system includes a vibrating assembly including a vortex shedding device which sheds vortices in response to fluid flow across the vibrating assembly. A generator generates electrical power in response to vibration of the vibrating assembly. The vortex shedding device sheds the vortices at a frequency which is substantially equal to a resonant frequency of the vibrating assembly.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: April 24, 2007
    Assignee: Halliburton Energy Services, Inc.
    Inventors: Brett Masters, Brooks Radighieri, Marcel Huigsloot, Gert Muller, Andries Du Plessis, Marthinus Van Schoor, Matt Schaefer, Chris Ludlow
  • Patent number: 7208846
    Abstract: A method and an apparatus of generating electric power by recycling waste wind energy produced by a heat dissipating ventilation machine of an air conditioning equipment comprise: a motive power end producing waste wind energy during its operation; a passive select driver installed at the motive power end for receiving the transmission of the waste wind energy, so that the passive select driver starts running and converts mechanical energy into electric energy; an electric power converter for receiving electric current sent from the passive select driver and outputting power after regulating and modulating AC and DC. The motive power end is used to produce waste wind energy which is converted into electric energy, so as to save the use of electric power and provide a better effect of providing electric power. In the meantime, the waste energy can be reused and thus complying with the requirements for environmental protection.
    Type: Grant
    Filed: October 25, 2005
    Date of Patent: April 24, 2007
    Inventor: Chao-Hsiung Liang
  • Patent number: 7208847
    Abstract: A vehicular electric power generating system includes a vehicular electric generator rotatable by an engine mounted on a vehicle, and a rotational speed changing device for transmitting rotational power generated by said engine to said vehicular electric generator to rotate said vehicular electric generator selectively in a relatively high first rotational speed range and a relatively low second rotational speed range. An ECU controls the speed ratio of the rotational speed changing device based on the running state of the vehicle and the charged state of a battery on the vehicle, to control the vehicular electric generator to rotate selectively in the first rotational speed range and the second rotational speed range.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: April 24, 2007
    Assignee: Denso Corporation
    Inventor: Makoto Taniguchi
  • Patent number: 7208848
    Abstract: A device for power reduction during an operation of an inductive load, which is operated in a turn-on phase with an increased supply voltage and in a holding phase statically or in PWM operation with the on-board voltage, has a transistor disposed between the on-board voltage source and the inductive load as a switch. A further transistor is connected in series with this transistor and both the source terminals and also the gate terminals of both transistors are connected to one another. With this circuit configuration unwanted current flows are prevented through the substrate diodes of both transistors.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: April 24, 2007
    Assignee: Siemens Aktiengesellschaft
    Inventor: Stephan Bolz
  • Patent number: 7208849
    Abstract: A detachable transmission shift lever theft deterrent arrangement is provided that includes a transmission shift stub accessible from a vehicle interior. A detachable shift lever is provided and arranged to slideably engage the transmission shift stub. A locking mechanism is positioned on the shift lever and arranged to engage the shift stub. A security system including a transponder is positioned on the shift lever, and the transponder is arranged to receive power from an antenna positioned on the shift stub and send a unique signal back to the antenna upon positioning the shift lever within a predetermined range of the antenna. A vehicle ignition system is then enabled when the antenna receives the unique signal from the transponder.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: April 24, 2007
    Assignee: DaimlerChrysler Corporation
    Inventors: Eric A. Seppala, Michael E Brown
  • Patent number: 7208850
    Abstract: A transfer switch is provided for transferring the supply of electrical power to a load between a utility source and a generator that generates electrical power when started. The transfer switch includes a transfer relay that selectively connects the load to one of the utility source and the generator in response to the application of electrical power on the coil of the transfer relay by the generator. A generator relay having a coil operatively connected to the utility source is also provided. The generator relay provides a signal to the generator to start in response to the absence of electrical power on the coil of the generator relay by the utility source.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: April 24, 2007
    Assignee: Generac Power Systems, Inc.
    Inventor: Chris Turner
  • Patent number: 7208851
    Abstract: A circuit arrangement for the reliable switching of electrical circuits contains two series paths, two switching elements being arranged in parallel with one another in one of the series paths, the switching inputs of said switching elements being connected to the input point of the series path and the switching outputs of said switching elements being connected to the input side of a respective winding of a transformer.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: April 24, 2007
    Assignee: Wurth Elektronik eiSos Gmbh & Co., KG
    Inventor: Fritz Frey
  • Patent number: 7208852
    Abstract: An electronic tripping device for low-voltage circuit-breakers comprises means for detection and calculation of a ground-fault current operatively connected to tripping means of said circuit-breaker. The means for detection and calculation comprise: current-sensor means, which supply, for each pole, a signal proportional to the current; means for detection of the sign of the current, which, for each pole, supply a signal representing the sign of the current; current-rectifying means, which, for each pole, supply a rectified signal proportional to the current circulating in said pole; and first numerical-processing means, which supply a value with sign representing a ground fault by means of a numerical-processing operation comprising the multiplication of the signal representing the sign by the corresponding rectified signal.
    Type: Grant
    Filed: March 4, 2004
    Date of Patent: April 24, 2007
    Assignee: ABB Service S.r.l.
    Inventors: Severino Colombo, Antonio Maria Gabello
  • Patent number: 7208853
    Abstract: A fastener assembly includes a grommet, a dampening subassembly, and a pin. The pin is secured to the grommet and the dampening subassembly. The pin is configured to rotate between a locked position and an unlocked position with respect to the grommet. The pin secures to the grommet in the locked position, and is removable from the grommet in the unlocked position.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: April 24, 2007
    Assignee: Illinois Tool Works Inc
    Inventors: Andrew B. Terrill, Wayne M. Hansen, Brock T. Cooley, David W. Edland
  • Patent number: 7208854
    Abstract: A wound field synchronous machine includes direct oil cooling along a conductive sleeve with elongated semi-arcuate shaped channels which alternate with damper bar channels containing tie-rod supports structures. With a reduction in sleeve thickness permitted by the direct cooling, the overall weight of the machine is reduced.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: April 24, 2007
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Daniel M. Saban, Jeffrey Hoobler
  • Patent number: 7208855
    Abstract: Apparatus, systems and methods are provided for transmission of optical signals through a wellbore whereby optic fibers are protected from exposure to harsh downhole fluids and conditions. The system comprises a power cable assembly running down hole from the surface and comprising both electrical leads and at least one fiber-optic lead, an electric submersible motor apparatus having optic fibers and optic fiber leads as an integral part of the motor and internal to the motor casing, and a connection(s) between the optic fibers internal to the motor casing and downhole sensors and other equipment requiring optical communication.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: April 24, 2007
    Assignee: Wood Group ESP, Inc.
    Inventor: Raymond E. Floyd
  • Patent number: 7208856
    Abstract: Claw-shaped magnetic poles are alternately disposed along the rotation plane of a rotor of an electric rotating machine, and a permanent magnet is disposed between the claw-shaped magnetic poles. Surface of the permanent magnet is coated with a coating layer. The coating layer is composed of a anticorrosive material performing sacrificial anticorrosion (metal flake in a coating film rusts prior to a matrix resulting in protection of the matrix) such as inorganic material containing zinc and a film of the anticorrosive material is formed by spraying. Ionization tendency of zinc is larger than that of iron composing the permanent magnet, and the permanent magnet is difficult to be rusted owing to the sacrificial anticorrosion. Consequently, anticorrosion of the permanent magnet disposed between the claw-shaped magnetic poles is improved.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: April 24, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Daisuke Imai, Yoshihito Asao, Masahiko Fujita
  • Patent number: 7208857
    Abstract: A method and system of calibrating a drive includes changing an electrode voltage between a first set of electrodes and a second set of electrodes in the drive divided by an electrode gap, determining a threshold voltage for the electrode voltage at which an electrostatic attractive force causes the first set of electrodes to be drawn to the second set of electrodes and calculating an operational electrode voltage between the first set of electrodes and the second set of electrodes using the threshold voltage that allows the drive to operate while one or more external accelerations are acting upon the drive.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: April 24, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Donald J. Fasen
  • Patent number: 7208858
    Abstract: An ultrasonic cleaning tank for use in cleaning electronic parts having a top portion and a bottom portion operably divided by a perforated dispersion plate. The cleaning tank is assembled to avoid internal projections or obstructions within the top portion to create a piston-like, laminar flow region. The dispersion plate is constructed to provide a backpressure within the bottom portion so as to promote even flow of a cleaning fluid through the perforations. The cleaning fluid flows upward past an electronic part. At the same time, an ultrasonic transducer supplies ultrasonic energy within the cleaning fluid creating cavitation such that any particulate matter is scrubbed from the electronic parts. The particulates are subsequently carried upward by the laminar flow and over a tank lip. The cleaning tank can be used in either a batch or recirculating mode.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: April 24, 2007
    Assignee: Forward Technology A Crest Group Company
    Inventors: Russell Manchester, Wayne Mouser
  • Patent number: 7208859
    Abstract: A bonded substrate includes a lithium tantalate substrate and a sapphire substrate to which the lithium tantalate substrate is bonded, a bonded interface of the lithium tantalate and the sapphire substrate includes a bonded region in an amorphous state having a thickness of 0.3 nm to 2.5 nm. The bonded region in the amorphous state is formed by activating at least one of the lithium tantalate substrate and the sapphire substrate in the bonded interface with neutralized atom beams, ion beams or plasma of inert gas or oxygen. It is possible to bond the piezoelectric substrate to the supporting substrate having different lattice constants without the high-temperature thermal treatment and realize the bonded substrate having an excellent bonding strength and being less warped.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: April 24, 2007
    Assignees: Fujitsu Media Devices Limited, Fujitsu Limited
    Inventors: Michio Miura, Masanori Ueda, Shunichi Aikawa, Toru Uemura, Kunihisa Wada, Naoyuki Mishima
  • Patent number: 7208860
    Abstract: A surface acoustic wave device has a high electromechanical coefficient and reflection coefficient, and also has an improved frequency-temperature characteristic that is achieved by forming a SiO2 film on an IDT so as to prevent cracking from occurring on a surface of the SiO2 film so that desired properties can be reliably obtained. The surface acoustic wave device includes at least one IDT, which is composed of a metal or an alloy having a density higher than that of Al and is formed on a 25° to 55° rotation-Y plate X propagation LiTaO3 substrate, and a SiO2 film disposed on the LiTaO3 substrate so as to cover the at least one IDT for improving the frequency-temperature characteristic.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: April 24, 2007
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Michio Kadota, Takeshi Nakao, Masakazu Mimura
  • Patent number: 7208861
    Abstract: In manufacturing electromechanical drive elements, vibration properties are defined in a test environment. These properties are found to give a good operation when being arranged in a motor. Two flexural vibration modes are defined. One is an s-mode connected to an element being strapped at two supports at respective outer portions. The s-mode have three nodal points. The other vibration mode is an ?-mode connected to an element being strapped at the supports and at a drive pad arranged at a middle portion. The ?-mode has one nodal point at each side of the middle portion and the middle portion has a stroke amplitude that is smaller than stroke amplitudes at portions between the middle portion and the nodal points. An average of the resonance frequencies of the s-mode strapped at two and three points, respectively, differs from and the ?-mode resonance frequency by less than 25%.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: April 24, 2007
    Assignee: Piezomotor Uppsala AB
    Inventors: Andreas Danell, Stefan Johansson, Johan Abrahamsson, Jonas Eriksson
  • Patent number: 7208862
    Abstract: A piezoelectric component includes piezoelectric layers and electrode layers between at least some of the piezoelectric layers. The electrode layers define a middle segment in an interior of the piezoelectric layers and end segments located between ends of at least some of the electrode layers and an end of at least one of the piezoelectric layers. The piezoelectric layers include a first piezoelectric material at the end segments and a second piezoelectric material at the middle segment between electrode layers. The first piezoelectric material has a first expansion that is less than a second expansion of the second piezoelectric material.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: April 24, 2007
    Assignee: Epcos AG
    Inventors: Heinz Florian, Sigrid Ragossnig
  • Patent number: 7208863
    Abstract: A light emitting OLED apparatus including a microcavity OLED device having a broad-band light emitting organic EL element and configured to have angular-dependent narrow-band light emission, and a patterned light-integrating element provided over a portion of a light emitting region of the microcavity device, wherein the light-integrating element integrates the angular-dependent narrow-band emission from different angles from the microcavity OLED device to form an integrated light emission with decreased angular dependence in accordance with the pattern of the light-integrating element, and the apparatus maintains relatively angular-dependent emission in light emitting regions of the microcavity device not provided with the light-integrating element.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: April 24, 2007
    Assignee: Eastman Kodak Company
    Inventor: David R. Strip
  • Patent number: 7208864
    Abstract: The metallic substrate of this cathode has a thickness ?100 ?m and contains a plurality of reducing agents as Si or Al and on the top face 111, 0.005%<Mg?0.1%, Si or Al?0.025%, and W?3%, on the bottom face 122, Mg weight concentration is inferior to the Mg weight concentration on the top face, and Si or Al weight concentration is superior to Si or Al weight concentration on the top face and superior to 0.02%. Lifetime is maximized and turn-on-time is minimized.
    Type: Grant
    Filed: July 21, 2003
    Date of Patent: April 24, 2007
    Assignee: Thomson Licensing
    Inventors: Jean-Michel Roquais, Donald John Wierschke
  • Patent number: 7208866
    Abstract: A field emission display device includes three parts: a cathode emitter unit, an electron amplification unit, and a faceplate unit. The primary emission of electrons emitted from the cathode emitter unit bombards an electrode layer that includes an electron amplification material in order to generate secondary emissions of electrons. The secondary emissions of electrons bombard a light-emitting layer of the faceplate unit to generate fluorescence. Then, the fluorescence is transmitted through a transparent faceplate for viewing.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: April 24, 2007
    Assignee: Industrial Technology Research Industry
    Inventors: Jeng-Maw Chiou, Jon-Lian Kwo, Kwan-Jon Chang, Shy-Wen Lai, Ai-Kang Li, Hong-Jen Lai, Meiso Yokoyama
  • Patent number: 7208867
    Abstract: An electron source includes a planar emission region for generating an electron emission, and a focusing structure for focusing the electron emission into an electron beam.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: April 24, 2007
    Assignee: Hewlett-Packard Development Company, LP.
    Inventors: Huei-Pei Kuo, Henryk Birecki, Si-Ty Lam, Steven Louis Naberhuis
  • Patent number: 7208868
    Abstract: A light-emitting device comprises a layer including an emission region and provided between an anode and a cathode wherein the anode has a visible light (with a wavelength of 380 to 780 nm) transmittance ranging from 35 to 75%, and the anode has a work function of 3.0 to 7.0 eV whereby the device has an improved contrast characteristic while keeping high luminance.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: April 24, 2007
    Assignee: Sony Corporation
    Inventors: Naoyuki Ueda, Yasunori Kuima, Shinichiro Tamura
  • Patent number: 7208869
    Abstract: An easier method is provided to manufacture a light emitting device that can display a full-color image using a polymeric organic compound. In the present invention, some of polymeric organic compounds are dissolved in a protic solvent while the others are dissolved in an aprotic solvent and the obtained solutions are applied to form organic compound films having laminate structures. A conductive film to serve as an etching stopper is formed on the organic compound films, so that portions of the organic compound films that do not overlap the conductive film are etched away. By using wet etching and dry etching in combination, different organic compound films each composed of a plurality of polymeric organic compounds can be formed in different light emitting elements on the same substrate.
    Type: Grant
    Filed: September 14, 2004
    Date of Patent: April 24, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyofumi Ogino, Noriko Shibata
  • Patent number: 7208870
    Abstract: An organic electroluminescent panel having a silver alloy is disclosed, which has a substrate; a plurality of the first electrodes; a plurality of the second electrodes; a plurality of conducting lines containing a silver alloy; a plurality of isolating walls; and a plurality of organic electroluminescent media. The first electrodes are arranged in parallel on the substrate. The organic electroluminescent media are disposed on the first electrodes. The second electrodes are disposed on the organic electroluminescent media. The conducting lines containing the silver alloy connect to the first electrodes or the second electrodes. The silver alloy contained in the conducting lines has 80 to 99.8 mol % of silver; 0.1 to 10 mol % of copper; and 0.1 to 10 mol % of at least one transition metal selected from the group consisting of palladium (Pd), magnesium (Mg), gold (Au), platinum (Pt), and the combinations thereof.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: April 24, 2007
    Assignee: RiTdisplay Corporation
    Inventors: Yih Chang, Shang-Wei Chen, Tien Wang Huang, Tien-Rong Lu, Hsin Tzu Yao, Chih-Jen Yang
  • Patent number: 7208871
    Abstract: A luminous element (1) comprising a conductor (2), which is associated with an electroluminescent material (3). An electrode (4, 8, 9) is associated with said electroluminescent material and the luminous element (1) is arranged to emit light, when electric voltage is applied between the conductor (2) and said electrode (4, 8, 9). At least either the conductor (2) or the electrode (4, 8, 9) is insulated along at least a section of the luminous element (1) through the electroluminescent material (3) along said element section.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: April 24, 2007
    Inventor: Kennet Jonson
  • Patent number: 7208872
    Abstract: A multilayer barrier film structure of an organic EL display panel has a multilayered body formed on a surface of a supporting substrate. The multilayered body includes an intermediate film sandwiched between inorganic films. The film structure includes a sealing region provided so as to surround the multilayered body on the surface of the supporting substrate. In a method of manufacturing an organic EL display panel comprising an organic EL device and a supporting substrate, a first inorganic film is formed so as to cover a surface of a supporting substrate, an intermediate film is formed on the first inorganic film, a second inorganic film is formed on the intermediate film, an organic EL device is formed on the second inorganic film, and a perimeter outside the organic EL device is subjected to heating or irradiation, to form a sealing region.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: April 24, 2007
    Assignee: Pioneer Corporation
    Inventor: Toshiyuki Miyadera
  • Patent number: 7208873
    Abstract: The present invention relates to an organic electroluminescence display device capable of reducing the width of wiring without a voltage drop by contacting the lower lines and the upper lines with a contact member such as a solder ball, conductive paste or ACF in a sealing process, thereby forming a double structure of common power supply bus lines and/or cathode bus lines after, when forming source/drain electrodes of thin film transistors, forming lower lines of common power supply bus lines and/or cathode bus lines formed on a peripheral part of the organic electroluminescence display device and forming upper lines at positions on an encapsulating substrate corresponding to the lower lines, and a method for fabricating the organic electroluminescence display device.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: April 24, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Seung-Jae Jeong
  • Patent number: 7208874
    Abstract: A transmission secondary electron emitter is provided which emits secondary electrons generated by the incidence of primary electrons. The transmission secondary electron emitter includes a secondary electron emitting layer which is made of diamond or a material containing diamond as a main component, and of which one surface is the surface of incidence for making the primary electrons incident thereon, and the other surface is the surface of emission for emitting the secondary electrons. Also included is a voltage applying arrangement for applying a predetermined voltage between the surfaces of the incidence and the emission of the secondary electron emitting layer to form an electric field in the secondary electron emitting layer.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: April 24, 2007
    Assignee: Hamamatsu Photonics K. K.
    Inventors: Minoru Niigaki, Shoichi Uchiyama, Hirofumi Kan
  • Patent number: 7208875
    Abstract: A plasma display panel. A first substrate and a second substrate are provided opposing one another with a predetermined gap therebetween. Address electrodes are formed on the second substrate. Barrier ribs are mounted between the first substrate and the second substrate, the barrier ribs defining a plurality of discharge cells and a plurality of non-discharge regions. Phosphor layers are formed within each of the discharge cells. Discharge sustain electrodes are formed on the first substrate. The non-discharge regions are formed in areas encompassed by discharge cell abscissas and ordinates that pass through centers of each of the discharge cells. Further, each of the discharge cells is formed such that ends thereof increasingly decrease in width along a direction the discharge sustain electrodes are formed as a distance from a center of the discharge cells is increased along a direction the address electrodes are formed.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: April 24, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Jae-Ik Kwon, Kyoung-Doo Kang
  • Patent number: 7208876
    Abstract: A plasma display panel. A first substrate and a second substrate are provided opposing one another with a predetermined gap therebetween. Address electrodes are formed on the second substrate. Barrier ribs are mounted between the first substrate and the second substrate, the barrier ribs defining a plurality of discharge cells. Also, red, green, and blue phosphor layers are formed within each of the discharge cells. Discharge sustain electrodes are formed on the first substrate. The barrier ribs comprise first barrier rib members formed substantially parallel to the direction of the address electrodes, and second barrier rib members obliquely connected to the first barrier rib members and intersecting over the address electrodes. The second barrier rib members are formed to different widths according to discharge cell color such that red, green, and blue discharge cells have different volumes.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: April 24, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Kyoung-Doo Kang, Woo-Tae Kim, Hun-Suk Yoo, Seok-Gyun Woo, Jae-Ik Kwon
  • Patent number: 7208877
    Abstract: A full color three electrode surface discharge type plasma display device that has fine image elements and is large and has a bright display. The three primary color luminescent areas are arranged in the extending direction of the display electrode pairs in a successive manner and an image element is composed by the three unit luminescent areas defined by these three luminescent areas and address electrodes intersecting these three luminescent areas. Further, phosphors are coated not only on a substrate but also on the side walls of the barriers and on address electrodes. The manufacturing processes and operation methods of the above constructions are also disclosed.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: April 24, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Tsutae Shinoda, Noriyuki Awaji, Shinji Kanagu, Tatsutoshi Kanae, Masayuki Wakitani, Toshiyuki Nanto, Takeo Miyahara, legal representative, Shizuko Miyahara, legal representative, Mamaru Miyahara, deceased
  • Patent number: 7208878
    Abstract: An RMIM electrode, a method for manufacturing the RMIM electrode, and a sputtering apparatus using the RMIM electrode, wherein the RMIM electrode includes a magnet unit including a cylinder-shaped magnet located at a center of the magnet unit and a plurality of ring-shaped magnets having increasingly larger diameters surrounding the cylinder-shaped magnet; and a driver unit for supporting and for off-axis-rotating the magnet unit, wherein in the magnet unit, adjacent magnets have opposite magnetization directions.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: April 24, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jai-kwang Shin, Seong-gu Kim, Young-kyou Park, Hyeon-ill Um