Abstract: A power efficient startup circuit for activating a bandgap reference circuit is disclosed. The startup circuit uses a voltage supply having a voltage level to initiate the flow of a startup current used to activate the bandgap reference circuit. When the bandgap reference circuit starts, the startup circuit slowly charges a capacitor using the voltage supply when the startup current is flowing. The startup circuit disables quiescent current when the bandgap reference circuit is activated and a voltage of the capacitor exceeds a value equal to the difference between the voltage of the voltage supply when powered on and a voltage threshold of a switching device which disables the quiescent current. The capacitor is discharged when the voltage supply is turned off.

Abstract: A bandgap voltage regulator is arranged such that, when a desired output voltage is present between its output and common terminals, current densities in a pair of bipolar transistors having unequal emitter areas are maintained in a fixed ratio. The difference in the transistors' base-emitter voltages is across a resistor, which thus conducts a PTAT current. The regulator also generates a CTAT current, and both the PTAT and CTAT currents are made to flow in another resistor, with the resulting voltages added by superposition. The regulator's resistors are sized such that Vout is an integral or fractional multiple of Vbg, where Vbg is the bandgap voltage for the fabrication process used to make the regulator's transistors, such that Vout is temperature invariant, to a first order. The resistors are preferably realized using unit resistors having a predetermined resistance, or series and/or parallel combinations of unit resistors.

Abstract: A circuit for generating a constant current includes a reference voltage generating circuit configured to generate a reference voltage and a constant current circuit including one or more resistors configured to determine an amount of an electric current generated in response to the reference voltage, the one or more resistors being formed of a metal thin film.

Abstract: A voltage detector used to determine if an exposed or unexposed wire or terminal is “hot.” The voltage detector includes a low density EMF field detecting circuit and a high density EMF field detecting circuit each coupled to an indicator to inform the user that the “hot” wire or terminal is nearby. In the preferred embodiment, the voltage detector includes an LED flashlight that uses a voltage multiplying circuit that enables it to use a single AA or AAA battery. The voltage multiplying circuit raises the battery voltage from 1.5 volts to approximately 5 volts required to sufficiently energize the main LED. In the preferred embodiment, the LED's reflector acts as the sensor probe for detecting the presence of electric field densities.

Abstract: A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.

Abstract: A test circuit for identification of locations with low speed performance. A grid of ring oscillator units and switches connect or disconnect the ring oscillator units to or from each other, such that the locations with low speed performance are identified according to frequencies of oscillation signals generated by rows and columns of ring oscillators respectively formed by operating the test circuit in two different modes.

Abstract: Apparatus and methods are provided for measuring the potential for mutual coupling in an integrated circuit package of any type or configuration using a network analyzer in conjunction with a coaxial test probe. Simple, low-cost test fixturing and methods of testing may be used to measure the parasitic capacitance and inductance of one or more I/O leads of an integrated circuit package, the measured parasitic capacitances and inductances providing an indication of the susceptibility of the integrated circuit package to mutual coupling between electrical leads of the package or between an electrical lead and other components of the integrated circuit package.

Abstract: Various embodiments related to an integrated lid and test device for a socket, such as a land grid array (LGA) socket, that functions as a lid, as a testing device, and/or as a pick and place lid. Specifically, the integrated lid may provide test capability, in manufacturing of the socket and/or a printed circuit board (PCB) such as a motherboard, onto which the socket is attached. Thus the integrated lid may allow for testing the socket and/or the PCB for correct assembly and connectivity without requiring removal of the integrated lid to insert a test device prior to testing, or removal of a test device and replacement of the lid after testing.

Abstract: A channel for use in automatic test equipment and adapted for coupling to a device-under-test is disclosed. The channel includes a driver and respective AC and DC-coupled signal paths. The AC-coupled signal path is disposed at the output of the driver and is configured to propagate signal components at and above a predetermined frequency. The DC-coupled signal path is disposed in parallel with the AC-coupled signal path and is configured to propagate signal components from DC to the predetermined frequency.

Abstract: A test tray includes a rectangular shaped frame and a plurality of transport modules to receive a plurality of semiconductor devices. A precise location-determining unit mounted on both sides of the frame to precisely determines and fixes the test tray location. According to one embodiments, the precise location-determining unit includes a locking hole to receive a positioner, a bushing to prevent locking hole wear, a protection bar to cover the frame and the bushing. The test tray prevents yield reduction and handler malfunction, e.g., sudden stopping of the handler, by precisely fixing tray and semiconductor device position during loading, unloading, and testing. The test tray can be extensively without repair or replacement because locking hole, with protective bushing therein, enjoys little or no wear.

Abstract: A contactless rotary shaft rotation sensor includes a two-pole annular magnet attached directly to the shaft, pairs of diametrically opposed magnetic field sensors, and electronic processing circuits to produce linear output signals proportional to shaft speed and position. The annular magnet has two diametrically opposed poles on its outside circumference and is magnetized with a magnetic iron pole piece temporarily placed through its inner diameter to magnetically shape the poles and provide an extremely linear flux variation over plus and minus sixty degrees from the neutral position between the poles. Positioning one pair of magnetic field sensors around the magnet enables provision of a voltage signal that is proportional to the angular position and/or speed of the shaft through 120 degrees of rotation. Placing three pairs of magnetic field sensors around the magnet with 120-degrees of spacing provides three linear sensor output segments, each with a useful range of 120-degrees of shaft rotation.

Abstract: A 360-degree magnetoresistive rotary position sensor comprises a magnetic linear sensor and a magnetic angular sensor, formed on a semiconductor substrate. The linear sensor detects a sense of a magnetic field, and the angular sensor detects an angular position of the magnetic field up to 180-degrees. With the linear sensor indicating that a positive sense of the magnetic field is detected, the angular sensor detects a first 180-degrees of angular position. With the linear sensor indicating that a negative sense of the magnetic field is detected, the angular sensor detects a second 180-degrees of angular position. As a result, the position sensor detects a full 360 degrees of rotation.

Abstract: A two-wire type current output sensor includes two external connection terminals to one of which a power supply flows from an outside and from the other one of which the power supply flows to the outside, a detecting element capable of outputting a detection signal, a signal processing circuit for changing a current supplied to a power supply side of the signal processing circuit based on the detection signal of the detecting element and outputting the changed current, and a connection switching circuit for switching a connection between the two external connection terminals and the signal processing circuit such that one of the external connection terminals at a higher voltage is connected to the power supply side of the signal processing circuit while the other one of the external connection terminals at a lower voltage is connected to an output side of the signal processing circuit.

Abstract: A precise, consistent, reliable, and high resolution magnetism metric controller applied in electronic and information devices is comprised of a scrolling wheel mechanism to drive by rotation a permanent magnet to retrieve signals of changed magnetic field due to displacement of magnetic poles of the permanent magnet.

Abstract: A robust, low cost, compact and highly accurate rotary position sensor is disclosed for measuring the relative angular position (within a range ?180°) of a housing or stator and a rotor. The housing carries a galvanomagnetic sensing element and is adapted for fixation to a relatively fixed portion of a host system. The rotor carrying a magnet is disposed for rotation about a fixed axis with respect to the stator and is interconnected to a relatively moving portion of the host system through intermediate linkage. The magnet is juxtaposed in substantially axial alignment with the galvanomagnetic sensing element for magnetic interaction therewith. The housing defines a cavity to receive potting material for encasing the galvanomagnetic sensing element and an adjacent buffer cavity interconnected by a weir, which diverts ant excess potting material into the buffer cavity.

Abstract: A method for determining the angular position of a rotating object and rotary encoder is disclosed. In one embodiment, the method includes a method for determining the angular position of an object rotating about a rotation axis in a rotation direction and having a coding pattern, using a sensor that senses the coding pattern, including ascertaining the coarse angular position of the rotating object with respect to the sensor whilst taking account of the coding pattern at a first instant. The exact angular position of the rotating object is ascertained with respect to the sensor whilst taking account of the coarsely ascertained angular position and also whilst taking account of at least one section of the coding pattern which extends counter to the rotation direction proceeding from that location of the coding pattern which is assigned to the coarse angular position. An output signal is provided containing items of information about the exact angular position of the rotating object with respect to the sensor.

Abstract: There is described a sensor comprising an excitation winding, a signal generator operable to generate an excitation signal and arranged to apply the generated excitation signal to the excitation winding, a sensor winding electromagnetically coupled to the excitation winding and a signal processor operable to process a periodic electric signal generated in the sensor winding when the excitation signal is applied to the excitation winding by the signal generator to determine a value of a sensed parameter. The excitation signal comprises a periodic carrier signal having a first frequency modulated by a periodic modulation signal having a second frequency, the first frequency being greater than the second frequency. In this way, the sensor is well suited to using digital processing techniques both to generate the excitation signal and to process the signal induced in the sensor windings. In an embodiment, the sensor is used to detect the relative position of two members.

Abstract: A pair of cores are arranged such that first end portions thereof face to each other with a gap via a conveying path through which a medium to be detected passes. Coils wound at the first end portions of the cores, respectively, are connected in series to each other, thereby constituting a first coil. Coils wound at second end portions on a side opposite to the first end portions are connected in series to each other, thereby constituting a second coil. There are provided an exciting coil which generates a detection magnetic field passing the cores and the gap, and a convergent magnetic field generating unit which generates, in the gap, a convergent magnetic field for converging the detection magnetic field in a direction perpendicular to a direction in which the first end portions of the cores are connected to each other.

Abstract: In a fluxgate sensor integrated in a semiconductor substrate and a method for manufacturing the same, the fluxgate sensor includes a soft magnetic core formed on the semiconductor substrate, an excitation coil winding the soft magnetic core and being insulated by first and second insulating layers deposited above and below the soft magnetic core, respectively, and a pick-up coil, winding the soft magnetic core and being insulated by third and fourth insulating layers deposited above and below the excitation coil, respectively.

Abstract: A non-contact magnetic sensor system according to one embodiment includes a substrate and a magnetic medium spaced from the substrate and having a data track thereon. A sensor element is mounted to the substrate. A guiding element biases the substrate towards the magnetic medium. A first magnetic track is positioned on the substrate. A second magnetic track is positioned on the magnetic medium. Orientations of the magnetizations of the magnetic tracks are such that the substrate experiences a vertical force away from the magnetic medium.

Abstract: A magnetic resonance imaging method is presented for forming an image of an object, wherein a stationary magnetic field and temporary magnetic fields having a position dependent field pattern are applied, magnetic resonance signals are acquired by at least one receiver antenna, spins are excitated in a part of the object, MR signals are acquired during application of the position-dependent field patterns (G1, G2, . . . ) and a magnetic resonance image is derived from the sampled magnetic resonance signals. The field patterns are substantially non-linear, the number N of total field patterns is larger than 3, and at least N?1 field patterns are independently controllable in field strength. The magnetic resonance signals are acquired in a sub-sampling fashion.

Abstract: In a method for operating a magnetic resonance apparatus with a steady-state pulse sequence and a magnetic resonance apparatus for implementing the method, to reduce magnetization in an examination subject outside of a slice of interest, an RF pulse acting selectively on a slice of interest and an RF pulse acting non-selectively on a slice of interest are alternately emitted to an examination subject in a steady-state pulse sequence.

Abstract: A novel magnetic resonance (MR) imaging or spectroscopy method is presented, in which a main magnetic field is generated in an object by a main magnet and superimposed magnetic fields and adiofrequency fields are generated according to an MR sequence for forming images or spectra. Object signals are acquired from the object with at least one object detector during execution of the MR sequence. Further, additional data are acquired from at least one monitoring field probe positioned in the vicinity of and surrounding the object, during execution of the MR sequence. The additional data from the monitoring field probes are used for adjusting the MR sequence such as to correct for imperfections in the field response of the object detectors, and the additional data from the monitoring field probes are used in conjunction with the object signals for reconstruction of the images or spectra.

Abstract: The invention relates to a magnetic resonance device comprising a magnet that generates a base magnetic field, at least one eddy-current generator and at least one electrically conductive structure, in which eddy currents can be produced by means of the eddy-current generator, in such a way that Lorentz forces act on the structure in the base magnetic field. The structure is equipped with a force generator, which is configured and controlled in such a way that it generates forces which counteract the Lorentz forces, thus preventing a displacement and deformation of the structure.

Abstract: A magnetic resonance system and method are described for performing an improved magnetic resonance ductography which gives better resolution and higher signal to noise ratio than known systems and methods. Use is made of a small coil together with a post processing technique addressed to the improvement of the sensitivity of the coil. The magnetic resonance sequence used is a fat suppressed T2 weighted turbo spin echo sequence.

Abstract: A first room-temperature space is formed penetrating through a cryostat along a center axis of a split-type multi-layer cylindrical superconducting coil system which has a ratio of the maximum empirical magnetic field to the central magnetic filed of not larger than 1.3 and is horizontally arranged such that the center axis of the coil is in the horizontal direction, a room-temperature shim coil system is arranged in said first room-temperature space to improve the homogeneity of the magnetic field, a second room-temperature space is formed penetrating through the cryostat and passing through the center of said split gap in the vertical direction, and a sample to be measured and an NMR probe having a solenoid-type probe coil are inserted in said second room-temperature space. Further, the NMR analyzer has a new function constituted by a system for irradiating and detecting the electromagnetic waves having wavelengths of shorter than 0.1 mm.

Abstract: Embodiments of the invention include a test circuit having an auxiliary low power test signal generator, filters, and a detector to test a power switch. The generator sends an auxiliary low power test signal having a different frequency than a power signal for the switch to an input of the switch. The detector detects the auxiliary low power test signal at an output of the switch. Test circuit filters are used to filter out the power signal from reaching the auxiliary low power test signal generator or the detector circuit. A circuit of the test circuit is tuned to the test signal's different frequency to ensure that the detector only detects the test signal when the switch is in one position. Thus, by detecting or sensing the test signal across the switch, the detector can detect whether the switch is operating properly.

Abstract: A method for testing for a defect condition on a node-under-implicit-test of an electrical device is presented. The technique according to the invention includes stimulating a first node of the electrical device that is capacitively coupled to the node-under-implicit-test with a known source signal, and capacitively sensing a signal on a second node of the electrical device that is capacitively coupled to the node-under-implicit-test. A defect condition such as a short or open can be determined from the capacitively sensed signal.

Abstract: A sensor for picking up partial discharges in an electrical equipment tank filled with a dielectric fluid includes an antenna responsive to the electromagnetic waves generated by such partial discharges. In the sensor, the antenna is formed by two electrodes that are separated from each other by a dielectric resonator. With this arrangement, the sensor has improved sensitivity in the UHF range, while being of dimensions that are considerably smaller than dimensions of a conventional antenna for use in the UHF range.

Abstract: Methods are provided for measuring the potential for mutual coupling in an integrated circuit package of any type or configuration using a network analyzer in conjunction with a coaxial test probe. Simple, low-cost test fixturing and methods of testing may be used to measure the parasitic capacitance and inductance of one or more I/O leads of an integrated circuit package, the measured parasitic capacitances and inductances providing an indication of the susceptibility of the integrated circuit package to mutual coupling between electrical leads of the package or between an electrical lead and other components of the integrated circuit package.

Abstract: The invention relates to a flexible, resilient capacitive sensor suitable for large-scale manufacturing. The sensor comprises a dielectric, an electrically conductive detector and trace layer on the first side of the dielectric layer comprising a detector and trace, an electrically conductive reference layer on a second side of the dielectric layer, and a capacitance meter electrically connected to the trace and to the conductive reference layer to detect changes in capacitance upon interaction with detector. The sensor is shielded to reduce the effects of outside interference.

Abstract: An electrostatic capacitance detection device includes an electrostatic capacitance detection element arranged in M rows and N columns. The electrostatic capacitance detection element includes a signal detection element that retains a charge in proportion to the electrostatic capacitance. The signal detection element includes a capacitance detection electrode and a capacitance detection dielectric layer formed on the capacitance detection electrode. The capacitance detection dielectric layer includes a first semiconductor layer and an insulator disposed between the capacitance detection electrode and the first semiconductor layer. A signal amplification element amplifies a signal corresponding to the retained charge in the signal detection element. The signal amplification element includes a second semiconductor layer different from the first semiconductor layer. A power supply line supplies a power source to the electrostatic capacitance detection element.

Abstract: A device and method for detecting environmental change of automobile windshield includes a plane capacitor having two electrodes disposed on a common plane on the inner surface of the windshield, and with a total area of said two electrodes less than 100 sq. centimeters. A sensor detection circuit is responsive to the change of capacitance of the plane capacitor to produce a control signal to control equipment work.

Abstract: A method and apparatus is described according to various embodiments, for flowing current from one region of a coil to another region of the coil. The flowing induces—through flux linkage —a voltage across a second coil. A second current substantially does not flow though the second coil. The method and apparatus also includes measuring the current with the voltage between the two coils.

Abstract: It is an object of the present invention to provide an arch type probe capable of enduring a load caused by overdriving even if the probe is miniaturized, and a probe card using the same. An arch type probe 200 has a shape including a first quarter circle arc portion 210 which is supported at one end thereof by the base plate 100 and a second quarter circle arc portion 220 which is connected to the other end of the first quarter circle arc portion 210, extending toward the base plate and a little shorter than the first quarter circle arc portion 221. The top portion of the arch type probe 200 serves as a contact surface brought into contact with an electrode of a semiconductor water B.

Abstract: A method of preparing a planar view TEM sample of a planar portion of a circuit layer structure formed on a substrate. The method includes polishing the substrate circuit layer structure until a cross-sectional polishing face has substantially reached a first side face of the planar portion of the circuit layer structure; forming a trench structure in the cross-sectional polishing face. The trench structure extends into the cross-sectional polishing face substantially in the direction parallel to the substrate such that top and bottom faces of the planar portion of the circuit layer structure are exposed, wherein the planar portion of the circuit layer structure extends substantially parallel to the substrate from the first side face. The method further includes performing a cut around the first side face to free the planar portion of the circuit layer structure.

Abstract: There is provided a contact probe that is smaller than 50 ?m in a pitch between a signal electrode and a ground electrode and can correctly conduct a high-speed high-frequency measurement, a measuring pad used for the contact probe, and a method of manufacturing the contact probe. The contact probe includes: a tip member having a signal electrode 10a and a ground electrode 11a that are put into contact with an object to be measured; and a coaxial cable 1 having a core 1b electrically connected to the signal electrode 10a and an outer covering conductor 1a electrically connected to the ground electrode 1a, wherein the tip member is formed on a printed wiring board 2, and wherein the signal electrode 10a and the ground electrode 11a are constructed of fine coplanar strip lines formed on an insulating board 2a.

Abstract: Test modules, systems, and methods employing capacitors for the testing of the solder joint connections between a printed circuit board (PCB) and a socket of a device are presented in embodiments of the current invention. A test module having capacitors in parallel, and in particular embedded capacitors, can be used to test tied traces and their solder joint connections by measuring the total capacitance of the capacitors. Embodiments of the current invention present no-power tests that can be used with a variety of testing platforms and test fixtures, such as in-circuit testing (ICT) and manufacturing defect analysis (MDA.) Additionally, the test module can be used with a variety of sockets, such as a ball grid array, a pinned grid array, and a land grid array.

Abstract: Test system for testing integrated chips and an adapter element for a test system.

Abstract: Parallel dies testing, mostly implemented on memory ICs—Integrated Circuits, significantly reduced overall test time. In order to minimize the need for physical probing, wafer probe card technology to allow simultaneous probing, ATE—Automated Test Equipment with enough channels and CPU power to handle the parallel testing. While new devices are designed with enough channels, and probe cards are designed and manufactured for each new device, the need to purchase new ATE to benefit from the technology is a heavy burden on parallel testing. It is proposed to interpose a multiplexer between the probe card and the ATE accompanied by a system that optimizes tester resources. The proposed system will allow test houses to benefit most from their investment without paying the full penalty of keeping less capable ATE.

Abstract: A probe support carriage for use during probing an electrical device includes a body, means for supporting and positioning the body, a plurality of flux sensors and a position sensor. The body has a first end and a second end. The plurality of flux sensors are operatively connected to the body. Each flux sensor includes a probe having a core and a coil. The core includes a material having high initial permeability and high resistivity characteristics. The probe is adapted to being supported so that a sensing portion of the core is maintained in a contact-free spaced relationship between a predetermined surface of the electrical device and the sensing portion of the core. The position sensor is adapted to determine position along a longitudinal axis of the electrical device.

Abstract: Two or more integrated circuit (IC) chips are separated by a significant distance relative to their communication frequency such that pseudo-differential signaling is used to improve signal detection. A derived reference voltage is generated that tracks the variations of the driver and receiver side power supply variations that normally reduce noise margins. The derived reference voltage is filtered to reduce high frequency response and coupled as the reference to differential receivers used to detect the logic levels of the communication signals.

Abstract: The present invention discloses an on die termination circuit. The on die termination circuit used in a DDR2 employs transmission gates as pull-up and pull-down switches, equalizes pull-up and pull-down resistance values by changing connection relations between switches and resistors, and maintains a constant voltage of an input pin.

Abstract: Circuits and methods are provided for producing a rail-to-rail output voltage. A circuit includes a level shifter, a source follower, and a current compensation circuit. The level shifter receives an input signal and applies a compensation voltage to the input signal relative to a voltage level of the input signal in steady-state. The source follower produces an output signal and, responsive to variations in the voltage level of the input signal, changes the voltage level of the output signal using a biasing current. The current compensation circuit, responsive to a difference between the voltage levels of the input and output signals, varies an amount of the biasing current.

Abstract: In one embodiment, a programmable interconnect includes SERDES circuits dedicated to communicating high-speed data and input/output (I/O) circuits dedicated to communicating low-speed data. A routing structure is configurable to couple a SERDES circuit to another SERDES circuit, a SERDES circuit to an I/O circuit, an I/O circuit to a SERDES circuit, and an I/O circuit to another I/O circuit over routing paths having deterministic routing delays. In another embodiment, the routing structure includes a high-speed routing structure for communicating high-speed data to and from a SERDES circuit and a low-speed routing structure for communicating low-speed data to and from an I/O circuit.

Abstract: A programmable look up table (LUT) structure that offers higher logic packing capacity over conventional LUT structures for programmable logic devices is disclosed. A programmable LUT structure comprising a first stage and one or more intermediate stages and a last stage, wherein at least one of said intermediate stages or the last stage further comprises: a primary input received in true and compliment logic levels, and an output; and two LUT values, said primary input coupling one of said LUT values to said output, wherein at least one of said LUT values further comprises: a secondary input and a configurable data value; and a programmable means to select either the secondary input or the data value as the LUT value.

Abstract: A tristate operating mode setting device is proposed, which is designed for use with an electronic circuit unit for providing the electronic circuit unit with a tristate operating mode setting function, and which is characterized by the utilization of a specially-designed logic circuit and logic control signal generator to allow the electronic circuit unit to be selectively set to one of three different operating modes during startup through a connecting pad that can be externally connected in three different ways. This feature allows one single pad for the provision of three different operating mode settings, whereas prior art is only capable of providing two different settings. The electronic circuit unit is therefore able to use fewer number of pads to provide an increased number of operating mode settings, with the benefit of reducing layout space on circuit board.

Abstract: In a semiconductor device in which an applying voltage higher than a power supply voltage VDD is inputted to a terminal BUS, when the voltage VBUS is less than a voltage of the power supply voltage VDD plus a threshold voltage Vthp, a voltage obtained by subtracting a threshold voltage Vthn from the power supply voltage VDD is applied to the gate terminal G4 and the PMOS transistor P4 becomes conductive. The power supply voltage VDD is supplied to the gate terminal G2 to turn the PMOS transistor P2 off. When the voltage VBUS is equal to or higher than the voltage of the power supply voltage VDD plus the threshold voltage Vthp, the voltage VBUS is supplied to the gate terminal G4 to turn the PMOS transistor P4 off, and the PMOS transistor P3 conducts and supplies the voltage VBUS to the gate terminal G2 to turn the PMOS transistor P4 off. The voltage level is correctly maintained without an undesirable leak current from the terminal BUS regardless of the applying voltage VBUS.

Abstract: The signal level conversion circuit has a first terminal for a signal of a low power voltage; a second terminal for a signal of a high power voltage higher than the low power voltage; a level shifter which is disposed in a signal path from the first terminal to the second terminal to convert the low power voltage signal into the high power voltage signal; and a first input buffer including a first inverter of P1 and N1 whose gates are connected to the first terminal, and a one-way device between a voltage supply of the low power voltage and a source of P1.

Abstract: A differential comparator with reduced offset. The differential comparator includes a first transistor coupled to a first input current and a second transistor coupled to a second input current. The first and second transistors are biased as diodes during a reset phase to store an offset voltage on parasitic capacitances of the first and second transistors. The first and second transistors are connected together as a latch to provide an output during a latch phase. Drain currents of the first and the second transistors substantially equal the first and the second input currents, respectively, during the reset phase and at the beginning of the latch phase. During the latch phase, currents approximately twice as large as differential-mode signal currents provided by the first and the second input currents are provided to the first and the second transistors, respectively.