Abstract: A semiconductor structure (100, 900) includes a substrate (110) having a surface (111) and also includes one or more semiconductor chips (120) located over the substrate surface. The semiconductor structure further includes an electrical isolator structure (340) located over the substrate surface, where the electrical isolator structure includes one or more electrical leads (341, 342) and an organic-based element (343) molded to the electrical leads. The semiconductor structure also includes a solder element (350) coupling together the electrical isolator structure and the substrate surface.

Abstract: A method and apparatus for forming a substrate support is provided herein. In one embodiment, the substrate support is fabricated by a process that includes forming a groove in a body, disposing a heater element in the groove, and welding the groove to enclose the heater element, wherein the welding forces at least a portion of the body into intimate contact with the heater element. In another embodiment, a method of forming a substrate support is provided that includes forming a groove in a body, disposing a heater element in the groove and stir welding the groove closed to encase the heater element.

Abstract: Disclosed are embodiments of a stacked die package including a thermally conductive block disposed in the substrate. The die stack may include a lower die thermally coupled with the conductive block and one or more upper die disposed on the lower die. The upper die may be electrically interconnected to one another and with the lower die by a number of thru-vias, and the die stack may also be electrically coupled with the substrate. Other embodiments are described and claimed.

Abstract: An apparatus and associated method to provide localized cooling to a microelectronic device are generally described. In this regard, according to one example embodiment, a cooling apparatus comprising a heat spreader and one or more thermoelectric cooler(s) thermally coupled to the heat spreader provides cooling to one or more hot spot(s) of a microelectronic device, the one or more thermoelectric cooler(s) having a single heat exchanging element of a single material.

Abstract: A thermal management device comprises an electronic device (20) encased in thermal management structures (10, 26, 28) comprising anisotropic carbon encapsulated in an encapsulating material.

Abstract: A bake unit includes a cooling plate for cooling a substrate and a lift pin assembly for loading a substrate on the cooling plate. When a wafer is cooled on the cooling plate, a guide groove is formed at the cooling plate to allow a space between the wafer and the cooling plate to communicate with the exterior. Thus, an inner pressure of the space is maintained to be equal to an outer pressure thereof.

Abstract: It is an object of the present invention to provide a circuit device in which a plurality of circuit elements including a circuit element having a hollow inside are sealed with resin, and to provide a method of manufacturing the same. A circuit device (10) has a first circuit element (13A) having a hollow inside and a plurality of second circuit elements (13B) electrically connected to the first circuit element (13A). The first and second circuit elements (13A) and (13B) are sealed with sealing resin (15). The distances by which the first circuit element (13A) is separated from the second circuit elements (13B) are longer than those by which the second circuit elements (13B) are separated from each other.

Abstract: Disclosed is a mounting structure for mounting an IC on a substrate, and particularly useful in a Multi-Chip Module (MCM). The mounting structure intervenes between the IC and the MCM substrate, and promotes heat dissipation from the IC. The mounting structure is insulative, and preferably comprises a direct bond to copper (DBC) board. A heat spreading region to which the IC is affixed is formed on a surface of the mounting structure with bond pad areas are around the heat spreading region. The other side of the mounting structure is mounted to the substrate, which also has bond pads. Bond pads on the IC are connected to the bond pad areas on the mounting structure, and the bond pad areas on the mounting structure are further coupled to the bond pads on the substrate. Each of these connections is preferably made by wirebonding. Thermal vias can be used in the mounting structure and/or in the substrate to further promote heat dissipation.

Abstract: A semiconductor component and production method is disclosed. In one embodiment, the semiconductor component includes at least one vertical semiconductor power device having an upper side which includes at least one output electrode and a lower side which includes at least one input electrode and at least one control electrode. A contact clip with at least one peripheral rim portion is disposed on and electrically connected to the output electrode. The peripheral rim portion extends over and spaced from an edge of said semiconductor power device and terminating in a clip rim surface with is substantially coplanar with the source electrode and gate electrode. A thermally conductive, electrically insulating isolation layer is disposed on the upper surface of the contact clip and an electrically conductive layer is disposed on at least regions of isolation layer. The electrically conductive layer lies at a free potential and provides a connection surface for heat dissipating means.

Abstract: A semiconductor device comprising a semiconductor chip (101) assembled on a first copper cuboid (110); the cuboid has sides of a height (111). The device further has a plurality of second copper cuboids (120) suitable for wire bond attachment; the second cuboids have sides of a height (121) substantially equal to the height of the first cuboid. The back surfaces of all cuboids are aligned in a plane (130). Encapsulation compound (140) is adhering to and embedding the chip, the wire bonds, and the sides of all cuboids so that the compound forms a first surface (140b) aligned with the plane of the back cuboid surfaces and a second surface (140a) above the embedded wires. For devices intended for stacking, the devices further comprise a plurality of vias (160) through the encapsulation compound from the first to the second compound surfaces; the vias are filled with copper, and the via locations are matching between the devices-to-be-stacked.

Abstract: Mechanical stress on solder joints that hold BGA modules to computer motherboards is reduced by adding to the motherboard a topmost layer, and forming V-shaped channels into the layer next to the BGA module so that stress is shielded from the BGA module and its solder joints.

Abstract: A semiconductor device includes a substrate a first wiring layer and a bonding wiring layer. On the substrate, semiconductor elements are formed. The first wiring layer is laminated on the substrate. The bonding wiring layer is bondable and laminated on the first wiring layer. The first wiring layer includes a plurality of wirings and an insulating film. The plurality of wirings is arranged in parallel along a same direction. The insulating film is filled between respective the plurality of wirings in the first wiring layer such that the insulating film supports the bonding wiring layer.

Abstract: The present invention relates to an integrated chip device in a package, including an integrated chip, a substrate comprising a redistribution wiring, a contact element and a contact pad on a common surface of the substrate, wherein the contact element is in electrical contact with the contact pad, wherein the substrate is divided in at least two parts each of which is securely attached to a respective portion of the chip to form the device, wherein between at least two of the parts of the substrate a gap is provided to accommodate a thermal expansion of at least one of the parts of the substrate, a bond wire which is provided to connect the contact pad and the further contact pad of the substrate with the integrated chip through the gap.

Abstract: A device comprises a plurality of first electrodes which are arranged on a surface of a substrate at predetermined space, a component which has an elasticity and a longitudinal axis, a plurality of conductors which are applied to a surface of said component at predetermined space, and each of which are connected to a corresponding one of said first electrodes, and a plurality of second electrodes which are arranged on a surface of a electronic component at predetermined space, and each of which are connected to a corresponding one of said conductors.

Abstract: A method of fabricating a vertically mountable integrated circuit (IC) package is presented. An integrated circuit is mounted on a printed circuit board (PCB) and electrically coupled to a bond pad on the PCB. The bond pad is coupled with a via that is embedded in the PCB. The IC, the bond pad, the via, and a portion of the PCB are singulated in order to create a vertically mountable IC package. The via is cut through cross-sectionally during singulation so as to expose a portion of the via and thereby provide a mountable area for the IC package. The IC package may be encapsulated or housed in a dielectric material. In addition, the via may be treated with a preservative or other suitable electroless metal plating deposition that prevents oxidation and promotes solderability.

Abstract: The disclosed invention relates to masked silicon structures and methods for making porous silicon in selected areas of a silicon substrate via anodic etching. The masked silicon structures comprise: (1) a frontside barrier layer; and (2) a backside opaque ohmic contact layer. The frontside barrier layer includes a plurality of discrete barrier openings bounded by a contiguous frontside portion of the barrier layer, thereby defining a first aperture having a first shape and a first center point. The backside opaque ohmic contact layer includes a second aperture bounded by a contiguous backside portion of the ohmic contact layer, thereby defining a second aperture having a second shape and a second center point. The first and second center points share a perpendicular axis. The first shape is substantially the same as the second shape but slightly larger, and is trans-concentrically positioned relative to the second shape about the shared axis.

Abstract: A method of forming a wiring level and an electrical isolation associated with the wiring level on a surface of a semiconductor wafer comprises the steps of providing the semiconductor wafer having said surface, forming a plurality of electrically conductive wiring lines upon said surface, each of the wiring lines having a spacing with respect to neighboring one of the wiring lines, depositing a first layer of amorphous carbon upon the wiring lines by means of non-conformal plasma enhanced chemical vapor deposition (PECVD), such that air-filled voids formed below the first layer within the spacings between neighboring wiring lines. Alternatively, OSG (organo-silicon glass) or FSG (fluorine doped silicon glass) may be deposited to yield air-filled voids within the spacings. According to an embodiment, the carbon, OSG or FSG layers are used as an IMD-layer (line-to-line isolation), added by a further layer of a dielectric material, which then serves as an ILD-layer (level-to-level isolation).

Abstract: A chip-packaging composition includes a thermosetting resin and at least one of an N-heterocyclic carbene adduct, an imidazole, and a cycloaliphatic amine hardener. The chip-packaging composition is applied to flip-chip technology during no-flow underfill mounting of the flip-chip to a mounting substrate. The mounting substrate can be further mounted on a board. A process includes formation of the chip-packaging composition. A method includes assembly of the chip-packaging composition with the flip-chip, and further can include assembly of the mounting substrate to a board. A computing system is also included that uses the chip-packaging composition.

Abstract: According to one or more aspects of the present invention, a flip chip BGA packaging or mounting arrangement is disclosed where a grounding connection of implemented on the back of the chip. The grounding connection comprises one or more metal strips that are situated between the back of the chip and a printed circuit board upon which the chip is operatively coupled via BGA, or between that back of the chip and a heat spreader that is itself operatively coupled to the printed circuit board. The backside grounding connection enhances stability in switching applications, for example, particularly where the chip includes silicon on insulator (SOI) wafer processing.

Abstract: A semiconductor module includes a driver IC chip and a plurality of memory IC chips on a common wiring board. Some of the memory IC chips nearer to the driver IC chip than the other memory IC chips are mounted on an interposer substrate mounted on the wiring board, providing a uniform line length among a species of signal lines for the memory IC chips.

Abstract: A semiconductor component and a method for its production in semiconductor chip size, can have a semiconductor chip, which has external contacts of the semiconductor component that are arranged in the manner of a flip-chip on its active upper side. The semiconductor chip can be encapsulated by a plastic compound at least on its rear side and its side edges. The outer contacts, which can be arranged on external contact connecting areas, can project from the active upper side.

Abstract: A sensor includes: a semiconductor chip having a sensing portion; a circuit chip; and first and second films. The sensing portion is disposed on a first side of the semiconductor chip. The first side of the semiconductor chip is electrically connected to the circuit chip through a bump. The first side of the semiconductor chip faces the circuit chip. The first film is disposed on the first side of the semiconductor chip. The first film covers the sensing portion, and is made of resin, and the second film is made of resin, and disposed on a second side of the semiconductor chip.

Abstract: A semiconductor package includes a substrate having a plurality of lead fingers. A plurality of stud bumps is attached to the plurality of lead fingers. A die having a plurality solder bumps is provided. The plurality of solder bumps is attached to the plurality of stud bumps to form a plurality of electrical connections and provide controlled collapse of the plurality of solder bumps. An encapsulant encapsulates the die, the electrical connections, and the plurality of lead fingers to expose a lower surface of the plurality of lead fingers. The plurality of stud bumps may include a plurality of clusters of stud bumps.

Abstract: The present invention relates to a die comprising a die core (10) of a hard material and at least two pre-stressed rings (60, 70) of increasing diameter placed around the die core and methods of making and using the same. The die core (10) is held in place by a force generated through deformation of mating geometric features on the die and the rings (60, 70) of increasing diameter.

Abstract: A semiconductor device has a circuit carrier with a number of internal contact areas is disclosed, which includes a first material with a first electrochemical potential, and a semiconductor chip with an active surface and a number of chip contact areas, which include a second material with a second electrochemical potential. Bonding wire connections are arranged between the chip contact areas and the internal contact areas of the leadframe and comprise a third material with a third electrochemical potential. The connecting points between the chip contact areas and the bonding wires and/or the connecting points between the internal contact areas and the bonding wires are coated with an anticorrosive layer.

Abstract: A semiconductor chip package includes a first semiconductor chip, that is an MEMS chip having a movable structure. The movable structure has a movable section. The first semiconductor chip includes a plurality of first electrode pads, and a first sealing section. The first sealing section is a closed loop formed on the top face of the frame section surrounding the movable structure. The first semiconductor chip also includes a thin plate member for sealing the movable structure. The semiconductor chip package also includes a second semiconductor chip. The second semiconductor chip has a plurality of second electrode pads. The semiconductor chip package also includes a substrate. The substrate has third electrode pads. The first and second semiconductor chips are mounted on the substrate. First bonding wires connect the first electrode pads to the second electrode pads. Second bonding wires connect the second electrode pads to the third electrode pads.

Abstract: A bonding pad including an insulating layer, a pad metal layer, at least a patterned layer, a passivation layer and a conductive layer is described. The insulating layer is disposed on a substrate. The pad metal layer is disposed over the insulating layer. The at least a patterned layer is disposed in at least one of the positions of between the insulating layer and the substrate and between the insulating layer and the pad metal layer so that the in insulating layer or the pad metal layer has an uneven surface. The passivation layer is disposed over the pad metal layer. The conductive layer is disposed over the passivation layer, and the conductive layer is electrically connected to the pad metal layer.

Abstract: Structure and method are provided for plastic encapsulated semiconductor devices having reduced package cross-talk and loss. Semiconductor die are first coated with a buffer region having a lower dielectric constant ? and/or lower loss tangent ? than the plastic encapsulation. The encapsulation surrounds the buffer region providing a solid structure. The lower ? buffer region reduces the stray capacitance and therefore the cross-talk between electrodes on or coupled to the die. The lower ? buffer region reduces the parasitic loss in the encapsulation. Low ? and/or ? buffer regions can be achieved using low density organic and/or inorganic materials. Another way is to disperse hollow microspheres or other fillers in the buffer region. An optional sealing layer formed between the buffer region and the encapsulation can mitigate any buffer layer porosity. The buffer region desirably has ? less than about 3.0 and/or ? less than about 0.005.

Abstract: Structure and method are provided for plastic encapsulated semiconductor devices having a buffer layer of low dielectric constant and/or low loss tangent material separating the die surface from the plastic encapsulation. Semiconductor wafers with substantially completed SC die are coated with the buffer layer. The buffer layer is patterned to expose the die bonding pads but leave the buffer layer over some or all of the other die metallization. The die are then separated, mounted on a lead-frame or other support, wire bonded or otherwise coupled to external leads, and encapsulated. The plastic encapsulation surrounds the die and the buffer layer, providing a solid structure. The buffer layer reduces the parasitic capacitance, cross-talk and loss between metallization regions on the die. An optional sealing layer may also be provided at the wafer stage between the buffer layer and the plastic encapsulation to mitigate any buffer layer porosity.

Abstract: An integrated circuit package is disclosed having a semiconductor chip, a hermetically sealed device supported by the semiconductor chip, and a molding compound sealing the semiconductor chip and the device together as a composite package. A method of manufacturing the package is also disclosed.

Abstract: Structure and method are provided for plastic encapsulated semiconductor devices. The encapsulation comprises a plastic binder having a dielectric constant ?b and loss tangent ?b and a filler mixed therewith having lower ?f and/or ?f so that ?m and/or ?m of the mix is less than ?b, ?b, respectively. Hollow microspheres of varied sizes are preferred fillers, desirably in the size range of about 0.3 to 300 micrometers. These should comprise at least about 50%, more preferably 60 to 70% or more of the mixture by volume so that the resulting mix has ?m<3, preferably <2.5 and ?m<0.005. The encapsulant mixture is placed in proximity to or on the die so that the fringing electric fields of the die, die wiring and/or die connections are exposed to a lower ? and/or ? than that of a plastic encapsulation without the filler.

Abstract: The interposer comprises a base 8 formed of a plurality of resin layers 68, 20, 32, 48; thin-film capacitors 18a, 18b buried between a first resin layer 68 of said plurality of resin layers and a second resin layer 20 of said plurality of resin layers, which include first capacitor electrodes 12a, 12b, second capacitor electrodes 16 opposed to the first capacitor electrode 12a, 12b and the second capacitor electrode 16, and a capacitor dielectric film 14 of a relative dielectric constant of 200 or above formed between the first capacitor electrode 12a, 12b and the second capacitor electrode 16; a first through-electrode 77a formed through the base 8 and electrically connected to the first capacitor electrode 12a, 12b; and a second through-electrode 77b formed through the base 8 and electrically connected to the second capacitor electrode 16.

Abstract: A semiconductor structure less affected by stress and a method for forming the same are provided. The semiconductor structure includes a semiconductor chip. Stress-sensitive circuits are substantially excluded out of an exclusion zone to reduce the effects of the stress to the stress-sensitive circuits. The stress-sensitive circuits include analog circuits. The exclusion zone preferably includes corner regions of the semiconductor chip, wherein the corner regions preferably have a diagonal length of less than about one percent of the diagonal length of the semiconductor chip. The stress-sensitive analog circuits preferably include devices having channel lengths less than about five times the minimum channel length.

Abstract: A stacked alignment mark. The stacked alignment mark comprises a first alignment mark and a second alignment mark. The first alignment mark is located in a first film layer, wherein the first alignment mark is composed of a plurality of conductive wires. The second alignment mark is located in a second film layer under the first film layer. The first alignment mark is located in a first region corresponding to a second region in which the second alignment mark is located. Moreover, the second alignment mark at least contains a third region directly under a space between each two adjacent first conductive wires.

Abstract: According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, a p-type impurity diffusion layer formed on the semiconductor substrate, and Ni silicide formed on the diffusion layer, wherein an alignment mark for lithography is formed on the Ni silicide.

Abstract: The portable scent delivery device employs a housing and scent generator which selectively releases scent. The housing is suitably a headset, hat, shoulder harness or personal electronic device like a mobile telephone. The scent travels to the user's nose by diffusion.

Abstract: A method and apparatus for the improved formation of beads or particles. The apparatus comprises a spinning disk including a vibration inducing material. Said vibration inducing material excites the liquid material as it proceeds towards the outer perimeter of said spinning disk, controlling the droplet break-off frequency.

Abstract: Disclosed is a method for making polystyrene foam which utilizes one or more atmospheric gases, particularly combinations of HFCs and CO2, as the blowing system in combination with a polymer processing aid (PPA), typically an ester that is relatively non-volatile at the extrusion temperature range. The blowing system and the PPA may both be introduced into the molten thermoplastic polystyrene resin or the PPA may be incorporated in the solid source polystyrene resins. The resulting foams will typically exhibit improved dimensional stability at ambient temperatures.

Abstract: A method for preparing a polymeric article including the steps of admixing a visually differentiable granule-based coloring system into a fluidic polymeric base material, such as by coextruding, co-laminating, or injection molding. An applied hydraulic force, such as applied along a planar direction and in cooperation with a separate linear directed hydraulic force associated with a sheet article formation step, causes associated and high aspect granules to align in substantially parallel and evenly dispersed fashion. A further step includes “roughening” the surface of the article created, such as by the removal of a selected thickness of material to reveal a top layer of the entrained granules to create a fully exposed stone surface associated with the faux article, this further resulting in a scratch/mar, heat and light resistant article.

Abstract: A method and apparatus for molding panels, the apparatus including upper and lower mold dies, a sprayer that sprays resin onto the lower mold die, and a wiper seal ring that's disposed in a position to form a vacuum chamber between the upper and lower mold dies as the mold dies are moving together from an initial sealing position to a closed position. A vacuum source draws air from the vacuum chamber as the mold dies are closing. The vacuum draws trapped air from within the sprayed-on resin to provide a superior class-A surface.

Abstract: The invention relates to a method and an apparatus for producing a spunbonded fabric of a thermoplastic material, wherein the filaments resulting from broken fibers are additionally tempered and/or drawn, and have different diameters and different fiber lengths.

Abstract: Plastic compositions formed from post consumer plastic waste and methods for making such plastic compositions are provided. In one aspect, a method for forming a plastic product includes providing a first composition comprising at least 30 weight percent of a first plastic and at least 30 weight percent paper products. The method also includes providing a second composition comprising at least 90 weight percent of a second plastic. The first and second compositions are each shredded and commingled to form a shredded mixture. The shredded mixture is heated to form a shapeable plastic, which is molded and cooled to form the plastic product.

Abstract: A film composed of a number of layers having different refractive indices and alternately laminated one upon another has characteristic optical properties by light interference. Conventional films having such structure have problems of poor interlaminar adhesivity and low tear strength. The problems are solved by a film having the following constitution. A biaxially drawn multilayer laminated film composed of alternately laminated 1st layers and 2nd layers at a total layer number of 11 or more. Each layer has a thickness of 0.05 to 0.5 ?m. The 1st layer is made of a crystalline thermoplastic resin and the 2nd layer is made of a crystalline thermoplastic resin having a composition different from that of the resin constituting the 1st layer. The maximum light reflectance of the film within the wavelength range of 350 to 2,000 nm is higher than the base line reflectance obtained from a light reflectance curve within the wavelength range of 350 to 2,000 nm by 20% or over.

Abstract: Use of a starting solution to form a plurality of filler elements in a composite, wherein the starting solution includes a miscible solution of at least one protein and at least one further compound, with the plurality of filler elements being formed from the at least one further compound. This starting solution enables further materials imparting different properties to be incorporated into the extruded proteins. A method of forming a composite material containing a plurality of filler elements is described, in which the starting solution is induced to separate into a bulk phase and a minor phase. Such method can be carried out in an apparatus having a storage compartment for the starting material, and a phase separation compartment in which the protein and the further compound of the composite forming mixture are phase separated into a bulk material containing a plurality of filler elements.

Abstract: Disclosed are a method and an apparatus for continuously producing an artificial marble plate capable of simultaneously and uniformly hardening a raw material compound for an artificial marble plate, preventing the warpage of the artificial marble plate, and improving heat transmission efficiency and productivity.

Abstract: An expandable material is shaped to form a part that can provide functional attributes such as reinforcement to a structure of article of manufacture such as an automotive vehicle.

Abstract: A mounting structure for an EA material is provided in which the EA material can be easily mounted to a member such as a trim, and EA materials of various shapes, sizes, and hardness degrees can be securely mounted to the member. An EA material 1 made of a synthetic resin such as rigid urethane foam is mounted to a trim 2, which serves as a member, via a rib 3 and a clip 4. The EA material 1 is mounted to the trim 2 by applying the EA material 1 to the trim 2 while inserting the rib 3 into a concave slit 7. When the EA material 1 is pressed against the trim 2, ribs 3 and 3A are pressed into concave slits 7 and 7A while sliding against the leading ends of respective pawls 5. Then, the leading ends of the respective pawls 5 dig into the side circumferential surfaces of the ribs 3 and 3A, and the ribs 3 and 3A are prevented from escaping from the concave slits 7 and 7A. Thereby, the EA material 1 is mounted to the trim 2.

Abstract: A composite item is fabricated in a device for infusing a layup. The device include a mandrel, vacuum cup and bagging film. The mandrel is to receive the layup. The mandrel includes a reinforcement receiving zone and a resin receiving zone substantially adjacent to the reinforcement receiving zone. The vacuum cup is in cooperative alignment with the resin receiving zone. The bagging film is to generate a gas tight envelope surrounding the reinforcement receiving zone and the resin receiving zone. The vacuum cup is sealed upon the bagging film to generate a chamber above the resin receiving zone.

Abstract: A flexible molding component used with a base mold improves on existing methods of forming fiber reinforced composite parts. The molding component is formed of a flexible body structure having an interfacing surface and a perimeter region including a perimeter seal configured for sealing engagement with the base mold. Resin and vacuum distribution channels are formed in the interfacing surface to deliver resin to a fiber lay up disposed on the base mold and draw the resin across and through the lay up, respectively, to properly mix the resin/fiber combination which forms the desired part. Application of the vacuum causes the perimeter seal of the flexible body structure to sealingly engage with the base mold to enclose materials between the body structure and the mold, as well as causing the interfacing surface to draw against the resin/fiber combination, and the mold to shape the combination into the desired part.

Abstract: The present invention provides a method of fabricating an annular fiber structure, the method comprising the steps consisting in: providing a first fiber sheet made up of substantially unidirectional elements; forming a transverse, first annular sheet by laying the first fiber sheet in alternation in one direction and in the opposite direction between coaxial outer and inner circular rings with the sheets being held at said rings; providing a second fiber sheet made up of substantially unidirectional elements; forming a circumferential, second annular sheet by depositing the second fiber sheet in a circumferential direction between said outer and inner rings; bonding the transverse and circumferential annular sheets to each other; and driving the transverse and circumferential annular sheets in rotation about the axis of the outer and inner rings so as to perform a plurality of complete revolutions in order to obtain a thick annular fiber structure having layers made up by the transverse sheet alternating wit