Patents Issued in August 14, 2007
  • Patent number: 7256636
    Abstract: A voltage controlled delay line (VCDL). The VCDL includes one or more cells. Each of the one or more cells includes two or more inputs and an output. Each of the one or more cells is configured to provide a delay as well as an interpolation function and a multiplexer function. The VCDL may be used to provide delay in a delay locked loop (DLL).
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: August 14, 2007
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Rohit Kumar, Anand Daga, Sanjay Sethi
  • Patent number: 7256637
    Abstract: A switching arrangement for a high voltage load provides high voltage pulses to the load. The switching arrangement includes switching modules, where n is typically (75). A load capacitance is Cd is required to avoid voltage overshoot at the load and is provided by a capacitance of nCd arranged in parallel with each switch.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: August 14, 2007
    Assignee: E2V Technologies (UK) Limited
    Inventors: Stephen Mark Iskander, Robert Richardson, Paul Andrew Gooch
  • Patent number: 7256638
    Abstract: The apparatus includes a series active continuous time voltage regulator operating in conjunction with a alternating current power source and one or more loads. The alternating current power source is a voltage source that induces currents at a first end of the apparatus. At a second end of the apparatus one or more loads consume power from the apparatus. The series buck-boost regulator is composed of a pure monochromatic voltage source of frequency equal to that of the alternating current power source, and of constant phase with respect to the alternating current power source. The regulator is further composed of a sampling network that provides a scaled continuous time sample of the voltage delivered by the power conditioner to the loads. Finally, the regulator is composed of a high gain differential amplifier.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: August 14, 2007
    Inventor: Michael Wendell Vice
  • Patent number: 7256639
    Abstract: Systems and methods for integrated circuits comprising multiple body bias domains. In accordance with a first embodiment of the present invention, an integrated circuit is constructed comprising active semiconductor devices in first and second body bias domains. A first body biasing voltage is coupled to the first body bias domain, and a second body biasing voltage is coupled to the second body bias domain. The first and the second body biasing voltages are adjusted to achieve a desirable relative performance between the active semiconductor devices in the first and the second body bias domains.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: August 14, 2007
    Assignee: Transmeta Corporation
    Inventors: Kleanthes G. Koniaris, James B. Burr
  • Patent number: 7256640
    Abstract: Protecting the devices of a charge pump includes the connection of a high-voltage transistor between the output node of the charge pump and the load being supplied, and in controlling this transistor with a fraction of the output voltage of the charge pump. This control is accomplished by connecting the control node of the high-voltage transistor to a node of connection between two stages of the multi-stage charge pump onto which a fraction of the controlled output voltage of the multi-stage charge pump is produced. The high-voltage output transistor protects the low voltage devices of the multi-stage charge pump, by preventing the controlled output voltage from undergoing excessively abrupt variations, that could damage the transistors of the last stage of the charge pump.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: August 14, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventors: Carmelo Ucciardello, Rosa Di Mauro, Domenico Pappalardo, Francesco Sorrentino, Giuseppe Maganuco, Gaetano Palumbo
  • Patent number: 7256641
    Abstract: A semiconductor device includes a three or more-stage semiconductor charge pump. The capacitance of a pumping capacitor that increases and decreases the potential of a final-stage node on the output side is larger than that of a pumping capacitor that increases and decreases the potential of another-stage node.
    Type: Grant
    Filed: February 8, 2005
    Date of Patent: August 14, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshimasa Namekawa, Hiroshi Ito
  • Patent number: 7256642
    Abstract: A conventional circuit requires a booster circuit for generating a voltage higher than an external power supply voltage, thus low power consumption is difficult to be achieved. In addition, a display device incorporating the aforementioned conventional switching element for booster circuit has problems in that the current load is increased and the power supply becomes unstable with a higher output current.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: August 14, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 7256643
    Abstract: A voltage reference generating method, source, memory device and substrate containing the same include a voltage reference generator comprised of a bandgap voltage reference circuit including a first complementary-to-absolute-temperature (CTAT) signal and a second complementary-to-absolute-temperature (CTAT) signal. The voltage reference generator further includes a differential sensing device for generating a reference signal substantially insensitive to temperature variations over an operating temperature range by differentially sensing the first and second CTAT signals. The method includes generating first and second complementary-to-absolute-temperature (CTAT) signals and generating a reference signal that is substantially insensitive to temperature variations over an operating temperature range.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: August 14, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Dong Pan, Greg A. Blodgett
  • Patent number: 7256644
    Abstract: Resistance elements are inserted into a main power supply line and a main ground line so that offset differential amplifiers receive voltages developed across the same. The differential amplifiers control transistors connected to a sub power supply line and a sub ground line. Thus, a leakage current flowing from the sub power supply line to the main ground line and that flowing from the main power supply line to the sub ground line are regularly kept constant. Consequently, it is possible to prevent an operation delay in an initial stage of a standby state while keeping an effect of reducing a subthreshold leakage current in a semiconductor circuit device having a hierarchical power supply structure.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: August 14, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Tsukasa Ooishi, Hideto Hidaka
  • Patent number: 7256645
    Abstract: Sub-circuits of an integrated circuit can act as noise sources on common conductors such as power supply lines and the substrate. Each of these conductors may act as a noise medium capable of transferring noise signals from the noise source to other sub-circuits. One or more feedback circuits are coupled between input and output points on opposite sides of where a circuit to be protected is connected to such a medium, so that a output of the feedback circuit is coupled to the noise medium closer to certain noise sources than the input of the feedback circuit. Preferably, multiple feedback circuits are cross-coupled and have transfer connections so that coupling between the input and outputs of different feedback circuit is at least partially suppressed.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: August 14, 2007
    Assignee: NXP B.V.
    Inventors: Jose De Jesus Pineda De Gyvez, Rosario Capor
  • Patent number: 7256646
    Abstract: An differential LNA has first and second input MOS transistors, with differential inputs applied to their respective control gates and differential outputs taken at their respective drains. The gate-to-drain, Cgd, feedback capacitances of the first and second input MOS transistors are neutralized by respective gate-to-source, Cgs, capacitances in the two neutralizing MOS transistors. A first neutralizing MOS transistor has its control gate coupled to the control gate of the first input MOS transistor, its source node coupled to the drain node of the second input MOS transistor, and its drain node coupled to a fixed potential. A second neutralizing MOS transistor has its control gate coupled to the control gate of the second input MOS transistor, its source node coupled to the drain node of the first input MOS transistor, and its drain node coupled to the same fixed potential.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: August 14, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Salem Eid, Gregory A. Blum
  • Patent number: 7256647
    Abstract: An output of a common mode differential amplifier is initialized to a known state, which includes inputting a voltage to a network conductor of an electronic assembly, where the network conductor is coupled to a first input node of a first differential input of the amplifier. The amplifier is on an integrated circuit chip of the assembly and has a self-bias node. Circuitry of the amplifier normally adjusts to obtain an equilibrium voltage on the self-bias node in response to the inputted voltages. To initialize the amplifier output, however, preset circuitry on the integrated circuit chip overrides the normal equilibrium voltage on the self-bias node, forcing the self-bias node to a predetermined voltage regardless of the amplifier input voltages. In response, the amplifier produces an desired initial output state on a first output node of the amplifier.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: August 14, 2007
    Assignee: International Business Machines Corporation
    Inventors: Albert A. DeBrita, Michael J. Lencioni
  • Patent number: 7256648
    Abstract: In one embodiment, the present invention includes a circuit comprising an amplifier having an input terminal, an output terminal, a positive supply voltage, and a negative supply voltage. The amplifier is configured to have a first gain. A variable feedback circuit is coupled between the input terminal and the output terminal. The difference between the voltage on the output terminal and input terminal is received by the variable feedback circuit, which changes the gain of the circuit and reduces distortion.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: August 14, 2007
    Assignee: PacificTech Microelectronics, Inc.
    Inventors: Hideto Takagishi, Simon Tsai
  • Patent number: 7256649
    Abstract: An intermodulation product reduction or cancellation amplifier received two input signals that are split in quadrature wherein the inphase outputs are summed and then amplified as an inphase signal, and the quadrature outputs are fixed-phase phase-shifted, then summed and then amplified as a quadrature signal. The inphase and quadrature signals are fed into an output hybrid for canceling intermodulation products, where the fixed-phase phase shift is +/?60° for reducing 3rd order, +/?36° for reducing 5th order, and +/?25.71° for reducing 7th order intermodulation products, for examples, for improved signal communications of the two signals over a common antenna or link.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: August 14, 2007
    Assignee: The Aerospace Corporation
    Inventors: David A. Ksienski, Keven S. MacGowan, Samuel S. Osofsky, Albert M. Young, Thomas T. Tam
  • Patent number: 7256650
    Abstract: A system is provided for detecting the output power of power amplifier circuitry in a transmitter of a mobile terminal. Balanced power amplifier circuitry is provided having in-phase power amplifier circuitry and quadrature phase amplifier circuitry. A power detection system provides a power detection signal indicative of the output power of the balanced power amplifier circuitry based on an in-phase detect signal indicative of some measurable parameter that varies with power, such as current, in a final amplifier stage of the in-phase amplifier circuitry and a quadrature phase detect signal indicative of some measurable parameter that varies with power, such as current, in a final stage of the quadrature phase amplifier circuitry.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: August 14, 2007
    Assignee: RF Micro Devices, Inc.
    Inventor: Terry Stockert
  • Patent number: 7256651
    Abstract: A system and a method are disclosed for providing a constant swing high-gain complementary differential limiting amplifier. High gain for the differential amplifier is created by providing a current to the driving transistors that is a combination of any of (a) constant current, (b) transconductance based current, and (c) temperature compensated based current. A constant differential output swing is created by providing a varying differential current to the output load resistors of the differential amplifier that tracks process and temperature variations within the output load resistors.
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: August 14, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Ramsin M. Ziazadeh, Yongseon Koh
  • Patent number: 7256652
    Abstract: A differential receiver circuit. In one embodiment, the circuit includes first and second input transistors, each having a first terminal coupled to a bias node (a first and second bias node, respectively), as well as first and second bias transistors, each having a first terminal coupled to the first and second bias nodes, respectively. The circuit further includes a first current source coupled to provide current to the first bias node and a second current source coupled to the second bias node. The differential receiver circuit is coupled to first and second, which receive first and second voltages, respectively. The first and second current sources provide current to the first and second bias nodes, respectively, such that the voltage present on the first and second bias nodes remains with approximately a threshold voltage of a midpoint between the voltages present on the first and second voltage nodes.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: August 14, 2007
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Emerson S. Fang, Thomas J. Hirsch
  • Patent number: 7256653
    Abstract: A temperature compensation circuit 145 included in a collector voltage generation section 130a applies an offset voltage Vofs(T) to a power control signal Vctrl according to a device temperature. The resulting temperature compensation circuit output voltage Vctrl? (T) is applied to a collector terminal of a bipolar transistor 110 through a voltage regulator 140 and a choke inductor 170.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: August 14, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Oki Maya, Kazuki Tateoka
  • Patent number: 7256654
    Abstract: A power amplifier includes amplifier stages. An amplifier stage includes a transistor, and at least one amplifier stage comprises a driver stage. The amplifier stages include a first amplifier stage having a first transistor and associated with a first output power, and a second amplifier stage having a second transistor and associated with a second output power. A current sharing coupling couples the first amplifier stage and the second amplifier stage. The first amplifier stage and the second amplifier stage share a current through the current sharing coupling. The current sharing coupling facilitates scaling of the first output power and the second output power.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: August 14, 2007
    Assignee: Raytheon Company
    Inventors: Mikel J. White, Scott M. Heston, John G. Heston
  • Patent number: 7256655
    Abstract: A PLL device includes a first hybrid PLL and a second digital phase/frequency detection module. The second digital phase/frequency detection module and the first hybrid PLL's oscillator, switching unit, and analog control signal generating module are capable of forming a second hybrid PLL. The switching unit selectively activates either the first hybrid PLL or the second hybrid PLL according to a selection signal to generate an analog control signal with the analog control signal generating module for controlling the oscillator, in order to control the frequency of a clock signal generated by the oscillator.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: August 14, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventor: Wei-Hung He
  • Patent number: 7256656
    Abstract: An all-digital phase-locked loop (ADPLL) includes: a digital phase frequency detector (PFD) for generating a detection signal by detecting frequency difference and phase difference between a reference signal and a feedback signal; a digital phase difference counter coupled to the digital PFD for sampling the detection signal according to an oscillator signal to thereby generate a count value; a digital filter coupled to the digital phase difference counter for generating a control signal according to the count value; a digital controlled oscillator (DCO) coupled to the digital filter for generating the oscillator signal according to the control signal; and a frequency divider coupled to the DCO and the digital PFD for generating the feedback signal by dividing the oscillator signal.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: August 14, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventor: Shiao-Yang Wu
  • Patent number: 7256657
    Abstract: A VCO has a plurality of MIGFETs coupled to provide phase adjustment in response to receiving digital phase adjustment control signals. The VCO includes a ring oscillator implemented as a plurality of serially coupled inverters. A phase adjustment circuit is coupled to the output of each inverter. The phase adjustment circuit of each stage comprises a predetermined number of MIGFETs. In one embodiment, half of the MIGFETs are used to speed-up the phase/frequency of the OUTPUT signal a predetermined amount in response to receiving speed-up control signals. The other half of the MIGFETs are used to slow-down the phase/frequency of the OUTPUT signal a predetermined amount in response to the receiving slow-down control signals. The VCO requires relatively less surface area, is simple, and is easy to implement.
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: August 14, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hector Sanchez, Zhonghai Shi
  • Patent number: 7256658
    Abstract: A surface mount quartz crystal oscillator includes: a quartz crystal unit having a plurality of first connection terminals on its bottom surface, and a mounting substrate formed with a depression, which accommodates an IC chip inside the depression. The side of the mounting substrate having the opening of the depression bonds with the bottom surface of the crystal unit. The IC chip integrates an oscillation circuit that employs the crystal unit and a temperature compensation circuit. Second connection terminals corresponding to the first connection terminals are provided on the upper surface of the frame wall that encloses the depression in the mounting substrate. A notched portion is formed in the frame wall, and resin is injected from this notched portion into the depression to fill at least the region between the first connection terminals.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: August 14, 2007
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventor: Fumio Asamura
  • Patent number: 7256659
    Abstract: A temperature compensated crystal oscillator has a package body, a crystal blank hermetically sealed in a first recess of the package body, and an IC chip which includes an oscillation circuit electrically connected to the crystal blank, and a temperature compensating mechanism for compensating the crystal blank for the frequency-temperature characteristic. The oscillation circuit and temperature compensating mechanism are integrated into the IC chip. The IC chip is received in a second recess of the package body such that a circuit formation surface thereof faces the bottom face of the package body. External write terminals are formed on a principal surface of the IC chip, which is not the circuit formation surface, for writing temperature compensation data into the temperature compensating mechanism.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: August 14, 2007
    Assignee: Nihon Dempa Kogyo Co., Ltd.
    Inventors: Hiroaki Mizumura, Akio Yamazaki
  • Patent number: 7256660
    Abstract: A CMOS LC-tank oscillator includes a pair of symmetric inductors and a differential pair of transistors. The inductors have a first one of their terminals interconnected at a supply node to which a voltage supply is applied through a supply resistor and a second terminal connected to the drain of a respective one of the transistors. The transistors have their sources interconnected at a tail node which is connected to ground through a tail resistor. A current control loop controls a core current between the supply and tail nodes so as to keep a voltage drop across the tail resistor at a level determined by a reference voltage. The current control loop keeps the core current between the supply and tail nodes at the required level so that a resistor may replace the upstream supply voltage regulator and another resistor may replace the downstream bias regulator. Consequently, sources of noise injected into the LC-tank type oscillator are eliminated.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: August 14, 2007
    Assignee: Texas Instruments Deutschland, GmbH
    Inventors: Frank Gelhausen, Karlheinz Muth
  • Patent number: 7256661
    Abstract: A multi-channel circulator or isolator well suited for use in phased array antennas or other RF devices where space and packaging constraints make the implementation of a conventional circular or isolator difficult or impossible. The multi-channel circulator/isolator can be configured as an isolator by the inclusion of one or more load resistors at one of its ports. In various configurations two or more ferrite substrates are provided that each provide a plurality of transmission ports. One or more permanent magnets are used to simultaneously provide the magnetic flux field through both of the substrates. The substrates can be configured such that they are spaced apart by a small distance, or positioned face to face in contact with one another. One or a plurality of magnets can be used depending upon RF requirements. Each substrate forms an independent electromagnetic wave propagation channel that limits the propagation of RF energy between its ports in one direction only.
    Type: Grant
    Filed: April 8, 2005
    Date of Patent: August 14, 2007
    Assignee: The Boeing Company
    Inventors: Ming Chen, Jimmy S Takeuchi, Douglas A Pietila
  • Patent number: 7256662
    Abstract: A common mode signal suppressing circuit comprises: a first winding (11) inserted to a conductor line (3); a second winding (12) that is inserted to a conductor line (4) and coupled to the first winding (11) through a magnetic core (10) and that suppresses common mode signals in cooperation with the first winding (11); and a third winding (13) coupled to the first and second windings (11, 12) through the core (10). The common mode signal suppressing circuit further comprises a phase-inverted signal transmitting circuit (15) connected to the third winding (13) and to the conductor lines (3, 4). The phase-inverted signal transmitting circuit (15) detects a common mode signal on the conductor lines (3, 4), and supplies a phase-inverted signal to the third winding (13), the phase-inverted signal having a phase opposite to the phase of the common mode signal.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: August 14, 2007
    Assignee: TDK Corporation
    Inventors: Masaru Wasaki, Hitomi Wasaki, Yoshihiro Saitoh
  • Patent number: 7256663
    Abstract: A balun device, a balance filter device, and a wireless communication apparatus are provided. An intermediate electrode is disposed between a balanced resonance electrode and a GND electrode. More specifically, the balun device includes a pair of GND electrodes formed on a dielectric layer, an unbalanced resonance electrode formed on a dielectric layer, and a balanced resonance electrode formed on a dielectric layer. The unbalanced resonance electrode and the balanced resonance electrode are disposed between the pair of GND electrodes by laminating the corresponding dielectric layers. The intermediate electrode is interposed between the balanced resonance electrode and the GND electrode positioned close to the balanced resonance electrode.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: August 14, 2007
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Hisahiro Yasuda, Shinichi Sugiyama
  • Patent number: 7256664
    Abstract: A preferred embodiment of the present invention comprises at least first and second thermistors, arranged into a classical Tee, Pi, or Bridged Tee attenuator design, a heating element, a temperature sensor, and a control circuit. The thermistors have different temperature coefficients of resistance and are in close proximity to the heating element and the temperature sensor. The control circuit receives a voltage signal from the temperature sensor, compares that signal with a voltage signal specifying a desired temperature, and applies electrical energy to the heating element until receiving a signal from the temperature sensor that the temperature of the thermistors matches the desired temperature. As a result, the attenuation of the attenuator can be changed at a controlled rate by varying the temperature of the thermistors, while the impedance of the attenuator remains within acceptable levels.
    Type: Grant
    Filed: April 15, 2005
    Date of Patent: August 14, 2007
    Assignee: Smiths Interconnect Microwave Components, Inc.
    Inventors: Robert J. Blacka, Nelson Roldan
  • Patent number: 7256665
    Abstract: A power divider for a waveguide between a single electromagnetic microwave generator input and two output ports, the divider including two tuner networks, each comprising a moveable capacitive probe with a pair of fixed flanking inductive posts.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: August 14, 2007
    Assignee: RF Technologies, LCC A Ferrite Company
    Inventor: George M. Harris
  • Patent number: 7256666
    Abstract: A band rejection filter with attenuation poles includes a plurality of series resonant circuits having end terminals connected in common and other end terminals connected in series via a plurality of transmission lines each having a length that is an odd multiple of about the one-quarter wavelength at the resonance frequency of the plurality of series resonant circuits, and a jump-coupling circuit for roughly coupling two of the plurality of series resonant circuits, which are not adjacent to each other, to each other.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: August 14, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiromitsu Uchida, Moriyasu Miyazaki, Yoshihiko Imai, Norio Umemura, Junko Nakayama, Hirotaka Kamino
  • Patent number: 7256667
    Abstract: A monolithic micromachined waveguide device or devices with low-loss, high-power handling, and near-optical frequency ranges is set forth. The waveguide and integrated devices are capable of transmitting near-optical frequencies due to optical-quality sidewall roughness. The device or devices are fabricated in parallel, may be mass produced using a LIGA manufacturing process, and may include a passive component such as a diplexer and/or an active capping layer capable of particularized signal processing of the waveforms propagated by the waveguide.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: August 14, 2007
    Assignee: Sandia National Laboratories
    Inventor: Michael A. Forman
  • Patent number: 7256668
    Abstract: A circuit for guiding electromagnetic waves includes a substrate for supporting components of the circuit. The circuit includes a control device which includes a first conductive element on the substrate for connection to a first component of the circuit and a second conductive element on the substrate for connection to a second component. The control device is made up of a variable impedance switching material on the substrate which exhibits a bi-stable phase behavior. The compound has a variable impedance between a first impedance state value and a second impedance state value which can be varied by application of energy thereto to thereby affect the amplitude or phase delay of electromagnetic waves through the circuit.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: August 14, 2007
    Assignee: Science Applications International Corporation
    Inventors: N. Convers Wyeth, Albert M. Green
  • Patent number: 7256669
    Abstract: Processes for preparing contacts on microswitches have been invented. The first is a wet process, involving the use of one or more acids, bases and peroxides, in some formulations diluted in water, to flush the contacts. The second process involves exposing the contacts to plasmas of various gases, including (1) oxygen, (2) a mixture of carbon tetrafluoride and oxygen, or (3) argon.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: August 14, 2007
    Assignee: Northeastern University
    Inventors: Richard H. Morrison, Jr., Nicol E. McGruer, Jeffrey A. Hopwood
  • Patent number: 7256670
    Abstract: A micro-electromechanical (MEM) RF switch provided with a deflectable membrane (60) activates a switch contact or plunger (40). The membrane incorporates interdigitated metal electrodes (70) which cause a stress gradient in the membrane when activated by way of a DC electric field. The stress gradient results in a predictable bending or displacement of the membrane (60), and is used to mechanically displace the switch contact (30). An RF gap area (25) located within the cavity (250) is totally segregated from the gaps (71) between the interdigitated metal electrodes (70). The membrane is electrostatically displaced in two opposing directions, thereby aiding to activate and deactivate the switch.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: August 14, 2007
    Assignee: International Business Machines Corporation
    Inventors: Christopher V. Jahnes, Jennifer L. Lund, Katherine L. Saenger, Richard P. Volant
  • Patent number: 7256671
    Abstract: An improved switch interface is provided that does not rely on direct contact by the user interface element to the switch apparatus. This feature enables the switch to be enclosed within a sealed housing, thereby improving reliability and longevity of the switch mechanism.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: August 14, 2007
    Inventor: Brian Preaux
  • Patent number: 7256672
    Abstract: A magnetic field generating device is disclosed having an arrangement of permanent magnets, each permanent magnet (PM) having a north end and a south end, and each aligned in the same north-south orientation. The PM arrangement is configured to have a surface at the north polarity end, a surface at the south polarity end, or a surface at both ends. A layer of ferromagnetic material is securely disposed at one of the surfaces of the PM arrangement, the layer having a thickness equal to or less than about 15 millimeters.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: August 14, 2007
    Assignee: General Electric Company
    Inventors: Jinhua Huang, Hongliang Lu
  • Patent number: 7256673
    Abstract: A coil assembly for reducing variations in characteristic impedance includes a winding section having a first surface and a second surface on the opposite side of the winding section from the first surface, a plurality of first protrusions provided on the first surface, and a plurality of second protrusions provided on the second surface. These protrusions are identical in shape to each other and are arrayed linearly on their respective surfaces so that the first protrusions are offset from the second protrusions. Two conducting wires are wound between neighboring protrusions such that one wire contacts one of the neighboring protrusions, while the other wire contacts the other neighboring protrusion.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: August 14, 2007
    Assignee: TDK Corporation
    Inventors: Takeshi Okumura, Hiroshi Suzuki, Toshihiro Kuroshima, Eizou Hara, Katsumi Saito, Yuichiro Igarashi
  • Patent number: 7256674
    Abstract: A power module located on a substrate. In one embodiment, the power module includes power conversion circuitry with a magnetic device and at least one switch. The magnetic device includes a magnetic core with a shielding structure located about the magnetic core configured to create a chamber thereabout. The power module also includes an encapsulant about the power conversion circuitry. The shielding structure is configured to limit the encapsulant entering the chamber thereby allowing the encapsulant to surround a portion of the magnetic core within the chamber.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: August 14, 2007
    Assignee: Enpirion, Inc.
    Inventors: Ashraf W. Lotfi, Mathew Wilkowski, John D. Weld
  • Patent number: 7256675
    Abstract: An energy transfer apparatus is developed for reducing a conductivity electromagnetic interference and manufacturing method. The energy transfer apparatus comprises a core, an input winding, an output winding, a supply voltage and a supply winding. The supply winding includes a shielding winding and an auxiliary winding. The input winding receives an input voltage for outputting the output voltage through the core and the output winding. The shielding winding and the auxiliary winding generate the supply voltage through the core. By setting of wire size and winding turns of the shielding winding, the conductivity electromagnetic interference is reduced for stabilizing an electric potential between an input-grounding terminal and an output-grounding terminal of the energy transfer apparatus.
    Type: Grant
    Filed: April 10, 2006
    Date of Patent: August 14, 2007
    Assignee: System General Corporation
    Inventor: Chien-Liang Chen
  • Patent number: 7256676
    Abstract: A multi-layer printed circuit board. The multi-layer printed circuit board includes a first winding, and a first via connected to the first winding. The first winding includes a first edge. The first edge defines a first footprint. The first footprint surrounds and is proximate an opening defined by the printed circuit board. At least a portion of the first via is between the first footprint and the opening.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: August 14, 2007
    Assignee: Artesyn Technologies, Inc.
    Inventor: Ian Poynton
  • Patent number: 7256677
    Abstract: The present invention is directed to a transformer having a stacked core, which includes upper and lower yokes and first and second outer legs. The core also includes one or more inner legs. Each of the upper and lower yokes is formed from a stack of plates and has a rectangular cross-section. Each inner leg is formed from a stack of plates and has a cruciform cross-section. Each of the first and second outer legs is formed from a stack of plates and may have a cruciform cross-section.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: August 14, 2007
    Assignee: ABB Technology AG
    Inventors: William E. Pauley, Jr., Charlie H. Sarver, Rush B. Horton, Jr.
  • Patent number: 7256678
    Abstract: A controllable inductor, comprising first and second coaxial and concentric pipe elements, where said elements are connected to one another at both ends by means of magnetic end couplers, a first winding wound around both said elements, and a second winding wound around at least one of said elements, where the winding axis for the first element is perpendicular to the elements' axes and the winding axis of the second winding coincides with the elements' axes, characterized in that said first and second magnetic elements are made from anisotropic magnetic material such that the magnetic permeability in the direction of a magnetic field introduced by the first of said windings is significantly higher than the magnetic permeability in the direction of a magnetic field introduced by the second of said windings.
    Type: Grant
    Filed: February 3, 2006
    Date of Patent: August 14, 2007
    Assignee: Magtech AS
    Inventors: Espen Haugs, Frank Strand
  • Patent number: 7256679
    Abstract: A stick lever unit is provided that is capable of eliminating uncomfortable feeling during manipulation of the stick, as well as, minimizing breaking of a wiring conductor of the variable resistor. The stick lever unit includes a fixing member, a first variable resistor attached to the fixing member, a first rotational member rotatably journalled to the fixing member for rotationally controlling the first variable resistor, a second variable resistor attached to the first rotational member, and a second rotational member having a stick lever and being rotationally journalled to the first rotational member to rotationally control the second variable resistor. The wiring conductors of the second variable resistor are derived out from the lead-out hole in the rotational shaft of the first rotational member, which is attached to the second variable resistor.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: August 14, 2007
    Assignee: Futaba Corporation
    Inventors: Masahiro Arai, Masashi Tokita, Takahiro Isono
  • Patent number: 7256680
    Abstract: A remote control apparatus for a saddle-type vehicle such as a two-wheeled vehicle includes a transmission antenna for transmitting a signal to a normal portable transmitter carried by a vehicle user. The transmitted signal urges the portable transmitter to transmit an ID signal to a receiver positioned on the vehicle and operably connected to a handlebar lock module. The transmission antenna is disposed within the vehicle body cover at a position spaced away from the handlebar lock module. Upon receipt of the ID signal, a handlebar lock module provides a handlebar lock cancellation operation allowing operation of the vehicle. The invention greatly increases the degree of freedom in arrangement of the transmission antenna.
    Type: Grant
    Filed: October 11, 2004
    Date of Patent: August 14, 2007
    Assignee: Honda Motor Co., Ltd.
    Inventors: Takeshi Konno, Fuminori Kamemizu
  • Patent number: 7256681
    Abstract: Transponders capable of providing identification information and possibly additional information are detected from wireless access points of a computer network as a substitute for closed radio frequency identification (RFID) systems while providing numerous additional functionalities and applications. Total asset visibility or responses to more limited queries are provided by inclusion of a geographic information system software application. Location reporting of proximity of devices/transponders to access points can be enhanced to a fine-grained level by triangulation or other algorithms including neural networks.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: August 14, 2007
    Assignee: Lockheed Martin Corporation
    Inventors: John O. Moody, Eric R. Steinbrecher
  • Patent number: 7256682
    Abstract: A method and apparatus for performing the remote identification of the contents of containers by means of multiple radio frequency identification systems.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: August 14, 2007
    Assignee: Odin Technologies, Inc.
    Inventor: Patrick J. Sweeney, II
  • Patent number: 7256683
    Abstract: The circuit monitoring device is disclosed. The device is for monitoring circuit resistance. At configurable thresholds digital flags are triggered, the device can be used as a Security/Building management system. The device uses open technology is fully scaleable and allows programmable logic controllers to be used as security management systems. Using a soft logic option a PC could take the place of the PLC.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: August 14, 2007
    Inventor: Eric Bullmore
  • Patent number: 7256684
    Abstract: A network node determines the suitability of coupled devices for being remotely line powered before actually powering them. The node scan its ports to determine which ports are coupled to devices. The node then interrogates the coupled devices. A unique discovery tone or bit pattern is generated and sent to devices coupled to ports. The node then monitors the port for a return signal. If there is a return signal, it is compared to the transmitted discovery signal. The signal will be identical after allowing for line losses if the coupled device is suitable for remote line powering. If the comparison yields a match, the network node supplies remote line power to the device.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: August 14, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Luca Cafiero, Maurilio De Nicolo, Thomas Edsall, Karl Nakamura, Soei-Shin Hang
  • Patent number: 7256685
    Abstract: An applause device including a sound generator capable of generating at least one applause sound. The sound generator preferably can generate at least one sound which can indicate approval or disapproval, such as clapping, hollering, whistling, booing, and hissing. A switch permits the user to select between each of the sounds. The device also preferably comprises illumination structure so as to illuminate at least a portion of the sound generation device. In a preferred embodiment, the applause device is shaped substantially, at least in part, in the shape of an open hand. A method for generating applause sounds and a system for remotely controlling the applause device is also disclosed.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: August 14, 2007
    Inventor: Bradley Gotfried