Abstract: A squaring cell comprises a first circuit responsive to an input voltage to produce a corresponding current, and a second circuit, preferably in the form of an absolute modulator circuit, responsive to the current produced by the first circuit and to the input voltage to produce an output current that corresponds to the square of the input voltage. In one embodiment, the first circuit comprises an absolute value voltage-to-current converter; in another, the first circuit comprises a linear voltage-to-current converter. Techniques to improve accurate square law performance of the cell, independent of temperature, and of broad input voltage range and frequency, are presented.

Abstract: One embodiment of the present invention is directed to an apparatus for reducing errors affecting the intercept of a logarithmic device, the apparatus including a first switching device coupled to an input of the logarithmic device. The first switching device for switches the input of the logarithmic device between an input signal and a reference signal. The apparatus further includes a polarity switching device coupled to an output of the logarithmic device. The polarity switching device is configured to switch the polarity of an output signal of the logarithmic device when the logarithmic device is receiving one of the input signal and the reference signal. The apparatus further includes a low pass filter coupled to the polarity switching device.

Abstract: A method and apparatus for boosting the gate voltages of a CMOS switch used in an integrated circuit designed in a sub-micron CMOS process is disclosed. The CMOS switch is coupled to Vin and Vout nodes, and contains PMOS and NMOS gates. Two boosting circuits are used to change the voltage on the PMOS and NMOS gates, respectively. The voltage at the NMOS gate is boosted from VDD to (VDD+K×VDD). The voltage at the PMOS gate is decreased from VGND to (VGND?k×VGND). The factor k is chosen such that Vout can be sampled through the entire range of Vin=VGND to VDD, even where VDD approaches the sum of the absolute values of the threshold voltages of the respective PMOS and NMOS transistors.

Abstract: A semiconductor device capable of achieving downsizing without reducing the power supply efficiency and capable of reducing switching noises and a memory card using the same are disclosed. The device comprises a plurality of stages of voltage booster circuits for potentially raising a power supply voltage up to a final output voltage, a voltage control unit for controlling an output voltage at a nearby location of the final stage, and one or more internal elements to which the final output voltage is supplied. A primary voltage booster circuit at the first stage includes an inductance element, a switching element, a diode and a driver circuit. At a metal core part of the inductance element, a metal wiring line is used, which was formed by use of a fabrication process of semiconductor integrated circuits, while employing for its core part an inter-wiring layer dielectric film that was formed using the fabrication process.

Abstract: In the present semiconductor device a positive, driving pump circuit is driven by an external power supply potential EXVDD (for example of 1.8V) to generate a positive voltage VPC (for example of 2.4V). A negative pump circuit for internal operation is driven by the positive voltage VPC to generate a negative voltage VNA (for example of ?9.2V) required in an erasure or similar internal operation for a word line. The negative pump circuit for internal operation can have a smaller number of stages of pump and hence consume a smaller area than when the circuit is driven by the external power supply voltage EXVDD (for example of 1.8V) as conventional.

Abstract: A circuit device having a transistor-based switch topology that substantially eliminates the possibility of latchup of the device. A series-connected low voltage threshold (LVT) N-channel transistor and a pull-up resistor are coupled across a switching (P-channel) transistor so that an integral body connection is provided for the switching transistor, which connects the body of the switching transistor to a node between the pull-up resistor and source terminal of the LVT transistor. The LVT transistor is connected with its gate and drain terminal connected to the output terminal of the switching transistor. The resistor is connected at its other end to the power supply side terminal of the switching transistor. The addition of these components in the particular configuration allows the body connection of the switching transistor to be automatically switched to the highest potential diffusion node.

Abstract: A bias generator and a method of generating a bias reference are disclosed. A reference transistor is connected in a diode configuration. An n-channel transistor connects in series with the reference transistor. A resulting reference current through the two transistors is controlled by the gate voltage on the n-channel transistor. A p-channel transistor configured as a first current mirror of the reference transistor generates a mirrored current. A voltage is developed across an impedance element connected in the path of the mirrored current. A feedback buffer connects between the voltage and the gate of the n-channel transistor to close a feedback loop stabilizing at a point where the reference current and mirrored current are proportional. A second current mirror supplies an output current. An optional n-channel transistor, configured in series with the second current mirror, may generate an output voltage proportional to the output current.

Abstract: A trap filter comprises a delay circuit made up of switched capacitors for delaying an input signal and outputting a delay signal, and an adding circuit for adding the input signal and the delay signal.

Abstract: A multi-input power combiner includes a balun with a plurality of layers. A plurality of transmission lines are associated with the plurality of layers. The balun has a largest dimension that is less than half of a ¼ wavelength in a selected material.

Abstract: A Doherty microwave amplifier having a main amplifier and a peaking amplifier, distributing and inputting an input signal to the main amplifier and the peaking amplifier to obtain an output signal by combining an output from the main amplifier and an output from the peaking amplifier, comprises a first coupler which branches and outputs a part of the input signal, a second coupler which branches and outputs a part of the output signal, and a bias control unit which feedback-controls a bias signal to the peaking amplifier, based on a difference between a level of a signal branched and output from the first coupler and a level of a signal branched and output from the second coupler.

Abstract: A method of controlling output power in a power amplifier having a driver stage and an output stage. The driver current is measured and the output stage biased in dependence upon the measured driver current.

Abstract: An amplifier pre-distorter method and apparatus squares an input signal and splits the signal into inphase and quadrature parts which are processed to generate a polynominal predistortion signal. This simplifies the apparatus and enables implementation in an application specific integrated circuit.

Abstract: New technology is described to calculate and optimize a pre-distorter avoiding the need of time-alignment between input and output of the amplifier. An analog output spectrum is used to compute an optimum pre-distorter, either in digital or analog format. The output spectrum is used to optimize intermodulation performance rather than trying to match the input spectrum to the output spectrum. The output spectrum (except for a possible gain constant) can be used as input to the optimization procedure. Since the intermodulation products usually are of much lower amplitude than the carriers themselves, it can be taken as the input spectrum without major loss of confinement. Mathematical procedures to calculate a pre-distorter using only the output signal are outlined.

Abstract: A threshold value adjustment circuit for adjusting a predetermined threshold value is provided in a stage followed by a protection circuit which starts protection operation when a load current flowing into an MOSFET exceeds the threshold value. A voltage proportional to a drain current and generated between the opposite ends of a current detection resistor Rd inserted between the high-side MOSFET and a positive power supply +V, and an output of an output voltage detection circuit for detecting the voltage amplitude of an analog signal from a low pass filter for modulating an output of a class D amplifier stage are inputted to the threshold value adjustment circuit. The threshold value adjustment circuit adjusts the threshold value in such a manner that a limit current of the MOSFET is set as the threshold value when the output voltage is large, and protection operation is started in response to a lower current than the limit current when the output voltage is small.

Abstract: A combined analog and digital calibration circuit and method for adjusting an output offset voltage of a differential amplifier circuit are provided. The circuit comprises a digitally controlled voltage divider positioned between at least one isolated well and a controllable voltage source, a controllable voltage source controlled by an initial constant current and a variable current, and a controller to modify the variable current to continuously adjust the back gate control voltage. The method comprises adjusting a control voltage of at least one of a pair of input transistors using a back gate control voltage, providing an analog current to establish a back gate control voltage, and altering the analog current when the back gate control voltage causes an output offset voltage to differ from a reference voltage by more than a predetermined quantity.

Abstract: Provided are a low voltage differential signal driver circuit and a method for controlling the same. The differential signal driver circuit includes: a differential amplification signal generator disposed between a power supply voltage terminal and a ground terminal, and outputting first and second differential amplification signals to first and second output terminals in response to first and second differential input signals, respectively; a common mode voltage generator for generating a common mode voltage in response to DC (direct current) offset voltages of the first and second differential amplification signals; and a variable load portion for controlling a resistance between the power supply voltage terminal and the first output terminal and a resistance between the power supply voltage terminal and the second output terminal in response to the common mode voltage such that the first and second differential amplification signals have constant DC offset voltages.

Abstract: Offset voltages in differential amplifiers are minimized by controlling compensation currents through the load impedances of the amplifiers. The currents are varied while sensing the polarity of the offset voltage. When the polarity changes, the current values are latched to keep the offset voltage at a minimum.

Abstract: A transconductance device has substantially linear characteristics. The transconductance device includes a differential pair that receives a differential input voltage signal and produces a differential output current signal and a current source coupled to the differential pair. The current source produces a current having a constant portion and a variable portion, such that the derivative of the transconductance with respect to the differential input voltage is constant across a very large range of the differential input voltage and across a very high range of frequencies of the differential input signal. This linearization technique produces no extraneous noise at the differential output current.

Abstract: A method for compensating a power amplifier based on operational-based changes begins by measuring one of a plurality of operational parameters of the power amplifier to produce a measured operational parameter. The method continues by comparing the measured operational parameter with a corresponding one of a plurality of desired operational parameter settings. The method continues by, when the comparing of the measured operational parameter with the corresponding one of a plurality of desired operational parameter settings is unfavorable, determining a difference between the measured operational parameter and the corresponding one of a plurality of desired operational parameter settings. The method continues by calibrating the one of the plurality of operational settings based on the difference.

Abstract: Pre-matching of distributed push-pull and power transistors enabling the effective use of high-power and high-frequency transistor arrays. In accordance with the invention, a pre-matching element is connected between stages of multi-transistor arrays. The pre-matching element serves to transform the impedance at a connecting point between stages toward an impedance level that is less sensitive to transmission line losses. In one embodiment of the invention the pre-matching element is a shunt inductor.

Abstract: A preamplifier includes a negative-feedback amplifier circuit that converts a current signal from a photodetector into a voltage signal; and a conversion-gain control circuit that simultaneously controls a resistance value of a feedback resistor portion of the negative-feedback amplifier circuit and a resistance value of a load resistor portion of the negative-feedback amplifier circuit, based on the voltage signal from the negative-feedback amplifier circuit. Each of the feedback resistor portion and the load resistor portion includes a fixed resistor element, a MOSFET element, and a diode-connected transistor, connected in parallel.

Abstract: Systems and methods for detecting phase-locked loop circuit lock. In particular, a lock detector configured to detect PLL stability for a user-defined period of time prior to asserting a PLL-lock-detected output. Stability may be indicated by a counter inserted into a PLL circuit and arranged between a phase-frequency detector and a charge pump. Because the counter value is acted upon by the phase-frequency detector, PLL lock is indicated by counter value stability. The digital counter value may be provided to a digital charge pump and a lock detector simultaneously. The lock detector includes registers and difference detectors to determine when the difference between counter values is below a user-defined tolerance. The lock detector may include a variable timer to avoid false indications of lock which may occur when counter values are sampled with the same frequency as a fluctuation frequency of the counter value.

Abstract: Improved voltage controlled oscillator circuits and phase-locked loop circuits are disclosed. For example, a voltage controlled oscillator circuit comprises a first linear amplifier, the first linear amplifier generating a coarse-tuning voltage from an input voltage, a second linear amplifier, the second linear amplifier generating a fine-tuning voltage from the input voltage, and a voltage controlled oscillator comprising a coarse-tuning input coupled to the first linear amplifier, a fine-tuning input coupled to the second linear amplifier, and a clock signal output, wherein a frequency of a signal on the clock signal output is changeable as a function of the input voltage. Such a voltage controlled oscillator circuit may be employed in a phase-locked loop circuit.

Abstract: In order to reduce the area of a charge pump PLL, one may separate proportional component and integral component of the loop filter voltage, and add additional circuitry so as to make the integral component appear as though it is affected by a much larger value of capacitance than is actually used. In an aspect, a current mirror may be used to subtract a portion of the integral component of the loop filter voltage from the total loop filter voltage. The difference signal is then used to drive an oscillator in the charge pump PLL. In another aspect, a third integrator or auto-calibration loop is used to set a center frequency of the oscillator.

Abstract: A loop filter for a phase-locked-loop is provided, comprising a set of capacitor banks coupled in parallel to form the loop filter, and a detection circuit for identifying and isolating defective capacitor banks. A method for providing a loop filter for a phase-locked-loop in accordance with an embodiment of the present invention includes the steps of forming the loop filter using a set of capacitor banks coupled in parallel, detecting any defective capacitor banks in the set of capacitor banks, isolating each defective capacitor bank, providing a set of redundant capacitor banks, and replacing each defective capacitor bank with a redundant capacitor bank from the set of redundant capacitor banks.

Abstract: In one embodiment, an apparatus comprises a voltage-controlled oscillator (VCO) that comprises a circuit coupled to receive an input control voltage to the VCO and configured to generate a second voltage responsive to the input control voltage, a summator coupled to receive the input control voltage and the second voltage, and an oscillator coupled to receive the output voltage of the summator. The summator is configured to combine the input control voltage and the second voltage to generate the output voltage. The oscillator is configured to oscillate an output signal, wherein a frequency of oscillation of the output signal is controlled by the output voltage of the summator.

Abstract: A novel form of an integrated variable inductor uses an on-chip transformer together with a variable capacitor. The variable capacitor can either be a varactor or a switched capacitor array and is connected to the secondary coil of the transformer. By changing the capacitance at the secondary coil of a transformer, the equivalent inductance looking into the primary coil of the transformer can be adjusted. With another capacitor in parallel to the primary coil, two different modes of resonance inherently exist, and a very wide frequency tuning range can be achieved by combining the two modes.

Abstract: Circuits and methods and for generating oscillator outputs using standard integrated circuit components. The basic circuit generally includes two inverters and a variable capacitor to configure a delay of the circuit input and/or output. The oscillator circuit generally includes a plurality of inverter circuits, at least one of which uses a variable capacitor to adjust a delay between stages, and thereby adjust a frequency of oscillation. Thus, the oscillator outputs may be tuned using a single control voltage. The method generally includes the steps of (1) applying an operating voltage to a ring oscillator comprising a plurality of stages; and (2) applying a control voltage to a variable capacitor coupled to a node between at least two of those stages. The circuits have particular advantage in quadrature oscillators, and may be easily implemented using widely available CMOS technology.

Abstract: In a voltage controlled oscillator including an amplifier, a feedback circuit and a crystal oscillator, two MOS transistors M1, M2 are connected for use as variable capacity elements for the frequency adjustment of the voltage controlled oscillator. Drains of the MOS transistors M1, M2 are respectively connected to an XT terminal and an XTB terminal of the crystal oscillator. Sources of the MOS transistors M1, M2 are made common and connected to a grounding terminal via a capacitor C3. Gates of the MOS transistors M1, M2 are made common, and an added voltage signal of a temperature compensating signal voltage and an external frequency control signal voltage is applied to the common gate terminals of the MOS transistors to thereby perform the frequency control of the oscillator.

Abstract: Inductor-capacitor (LC) oscillator circuits are formed of a conductive loaded resinbased material. The conductive loaded resin-based material comprises micron conductive powder(s), conductive fiber(s), or a combination of conductive powder and conductive fibers in a base resin host. The ratio of the weight of the conductive powder(s), conductive fiber(s), or a combination of conductive powder and conductive fibers to the weight of the base resin host is between about 0.20 and 0.40. The micron conductive powders are formed from nonmetals, such as carbon, graphite, that may also be metallic plated, or the like, or from metals such as stainless steel, nickel, copper, silver, that may also be metallic plated, or the like, or from a combination of nonmetal, plated, or in combination with, metal powders. The micron conductor fibers preferably are of nickel plated carbon fiber, stainless steel fiber, copper fiber, silver fiber, or the like.

Abstract: The invention is a method for pulse position modulating signals which are synchronized to clocked bit periods using a clock comprising the steps of generating two, three or n signals to mark the presence of digital ones during corresponding n time slots occurring during the same bit period. The two, three or n signals are combined into a single data channel to utilize abrupt phase changes of pulses in a carrier signal at a carrier frequency, the phase changes having a very short duration to mark the presence of digital ones only. The combination of the n signals into a single data channel comprises gating each of the n signals in a sequence of serially delayed time slots corresponding to each of the n signals during a portion of the same bit period in the single data channel during time positions reserved for unexpressed zeroes.

Abstract: The present invention provides a pulse width modulation (PWM) circuit comprising an PWM control circuit for setting an output signal to low when a logical level of a oscillation signal at a first input terminal changes from low to high, for resetting the output level to low in response to an effective input signal at a second terminal, a charge and discharge means for charging a first node (node1) when the output stays in low, for discharging the stored charge of node1 when the output stays in high, a comparator (C1) for outputting an output signal to the second terminal according to the first node signal and a first reference signal (Vref0), a discharge current controlling means for the stored charge on the first node, wherein the discharge current controlling means comprises a bias circuit 2 for controlling the discharge current based on constant current.

Abstract: A frequency generator is provided. The generator comprises two voltage controlled oscillators generating a first signal of a given multiple of a predetermined raster frequency, and a second signal of another given multiple of a predetermined raster frequency, dividers dividing the output signal of the oscillator until the frequency of both divided output signals is equal to the raster frequency, a filter arrangement connected to the output of the dividers, and a single sideband mixer. The mixer produces as output a signal having a frequency which is equal to the frequency of the output signal of either one of the oscillators or to the frequency of the output signal of either one of the oscillators from which the output signal of the filter arrangement has been subtracted or to which the output signal of the filter arrangement has been added.

Abstract: Conductor segments are positioned within a two conductor transmission line in order to generate microwave pulses. The conductor segments are switchably coupled to one or the other of the transmission lines in parallel. Microwave pulses may be induced in the transmission line by closing the switches in a controlled manner to discharge successive segments into the transmission lines. The induced waves travel uninterrupted along the transmission lines in a desired direction.

Abstract: A dimensionally flexible sparse matrix comprising multiple ports connected to a plurality of interconnected universal switches is disclosed. Each universal switch has at least three terminals and is switchable to connect any pair or all three terminals together. The plurality of interconnected universal switches are independently switchable to connect any one or more ports of the sparse matrix to any subset of the others ports. The sparse matrix may also be cofigurable to duplicate the connectivity of a variety of dimensionally different switch matrices by designating a first subset of the multiple ports as row ports and a second subset of the remaining ports as column ports with the added flexibilty of connecting row-to-row and/or column-to column. The small physical size of signals stubs in the univerals switches results in a signal path between any pair of terminals that may be suitable for the transmission of signal frequencies greater than approximately 500 mega-hertz.

Abstract: An embodiment of the present invention provides an apparatus, comprising a radio frequency switch capable of using tunable dielectric capacitors as the switching element. The apparatus may further comprise a cross connector connecting a plurality of ports and wherein at least one of the tunable dielectric capacitors may placed between the cross connector at and least one port, thereby enabling impedance variations between the cross connector and the ports. Further, an embodiment of the present invention may provide at least one T connector between the cross connector and at least one of the plurality of ports, wherein at least one tunable dielectric capacitor may be associated with the T connector to vary the impedance in at least one node of the T connector.

Abstract: A system for connecting at least two receivers to a common antenna is proposed, antenna signal lines being supplied to the receivers, which stands out in that the input impedances of the at least two receivers are matched only in a narrow-band fashion in the range of their current reception frequencies to the impedances of the antenna signal lines supplied to them. An antenna signal splitter is also proposed. Finally, a method for controlling the reception frequencies of at least two receivers connected to a common receiving antenna is proposed, which is distinguished by the fact that the reception frequencies of the at least two receivers are set in such a way that they maintain a predefined minimum frequency distance from one another. A reduction of an antenna signal attenuation in an antenna signal splitter for multiple receiver systems is thereby possible, provided the receivers are tuned to different reception frequencies.

Abstract: An improved integrated LC resonator and methods for making and using the same are disclosed. The resonator includes (i) a first capacitor plate; (ii) an inductor over and in electrical communication with the first capacitor plate; and (iii) a second capacitor plate over and in electrical communication with the inductor. The method of making includes sequentially forming a first capacitor plate, a first dielectric layer thereon, a first via and an inductor, a second dielectric layer on the inductor, and a second via and a second capacitor plate. Each of the capacitor plates and the inductor are generally formed in different integrated circuit layers (for example, different metallization layers). Embodiments of the present invention can advantageously provide an integrated LC resonator tank having: (i) relatively high Q by reducing or minimizing parasitic effects; and (ii) relatively high shielding from the semiconductor substrate.

Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a temperature compensated microelectromechanical resonator as well as fabricating, manufacturing, providing and/or controlling microelectromechanical resonators having mechanical structures that include integrated heating and/or temperature sensing elements. In another aspect, the present invention is directed to fabricate, manufacture, provide and/or control microelectromechanical resonators having mechanical structures that are encapsulated using thin film or wafer level encapsulation techniques in a chamber, and including heating and/or temperature sensing elements disposed in the chamber, on the chamber and/or integrated within the mechanical structures. Other aspects of the inventions will be apparent from the detailed description and claims herein.

Abstract: A film bulk acoustic-wave resonator having, a substrate having a cavity, the substrate being formed of one of semi-insulating material and high-resistivity material, a bottom electrode partially fixed to the substrate, part of the bottom electrode is mechanically suspended above the cavity, a piezoelectric layer disposed on the bottom electrode, the shape of the piezoelectric layer is defined by a contour, a top electrode on the piezoelectric layer, a semiconductor intermediate electrode buried at and in a surface of the substrate, being located at the contour of the piezoelectric layer, the semiconductor region having a lower resistivity than the substrate, the intermediate electrode is connected to the bottom electrode in the inside of the contour, and a bottom electrode wiring connected to the semiconductor intermediate electrode extending from the contour to an outside of the contour in the plan view.

Abstract: A dual mode band-pass filter includes a metallic film for defining a resonator, disposed on the first main surface of a dielectric substrate having first and second main surfaces, or inside of the dielectric substrate. An opening is formed in the metallic film. At least one ground electrode is provided on the second main surface of the dielectric substrate or inside of the dielectric substrate, so as to be opposed to the metallic film through a dielectric layer. A pair of input-output coupling circuits is connected to the metallic film.

Abstract: The present invention disclosed a partial-suspended open-line resonator for parallel-coupled line filter for size shrinking and well resonant response. The partial-suspended open-line resonator comprises one open conductive line, one etched ground structure having a lattice adjacent to the conductive line, wherein the lattice is formed on a ground plane. Furthermore, a part of the conductive line is suspended over the lattice.

Abstract: A waveguide is disclosed that shifts the phase of the signal passing through it. In one embodiment, the waveguide has an impedance structure on its walls that resonates at a frequency lower than the frequency of the signal passing through the waveguide. This causes the structure to present a capacitive impedance to the signal, increasing its propagation constant and shifting its phase. Another embodiment of the new waveguide has impedance structures on its wall that are voltage controlled to change the frequency at which the impedance structures resonate. The range of frequencies at which the structure can resonate is below the frequency of the signal passing through the waveguide. This allows the waveguide cause a adjust the shift in the phase of its signal. An amplifier array can be included in the waveguides to amplify the signal. A module can be constructed of the new waveguides and placed in the path of a millimeter beam.

Abstract: The invention relates to a electromechanical switching device having two movable contact elements interacting with a fixed contact. Said switching device has a housing. When viewing a fixing side from the top, said housing is divided into two areas bordering with a longitudinal side of the housing, one of the movable contact elements and the corresponding fixed contact being located in said areas, wherein each of the housing areas has a narrow partial area and a broad partial area bordering therewith. The broad partial area of the first housing area is adjacent to the narrow partial area of the second housing area and the narrow partial area of the first housing area is adjacent to the broad partial area of the second housing area. The actuation directions of the movable contact elements are directed opposite each other.

Abstract: An opening assist mechanism is for the cradle assembly of a circuit breaker including a housing enclosing separable contacts, and an operating mechanism for opening and closing the separable contacts. The operating mechanism includes a trip bar and a cradle assembly. The cradle assembly includes a first toggle link, a second toggle link pivotally coupled to the first toggle link by a first pivot, and a cradle member pivotally coupled to the second toggle link by a second pivot. The cradle member includes a third pivot and a latching portion structured to engage the trip bar when the cradle assembly is disposed in a position corresponding to the separable contacts being closed or otherwise closeable. The opening assist mechanism comprises an actuator, such as a kicker pin, disposed on the cradle member and structured to engage and move at least one of the first and second toggle links in response to an actuation of the operating mechanism.

Abstract: A microelectromechanical system includes separate conducting elements. An electromechanically deformable element can be switched between a first stable position and a second stable position. Contact elements allow for electrical continuity to be established between the separate conducting elements. Switch control elements ensure that the first deformable element switches so as to establish electrical continuity between the separate conducting elements in the second stable position, by contact between the contact elements, and to break electrical continuity by separating the contact elements in the first stable position. The separate conducting elements and the contact elements are carried by the deformable element.

Abstract: A latching mechanism for a movable member mounted for movement between first and second positions. The latching mechanism includes a primary latching mechanism mounted for movement between a latched position where the primary latching mechanism engages the movable member to allow the movable member to move between the first and second positions, and an unlatched position where the movable member is disengaged for movement to the second position. A secondary latching element engages the first latching mechanism to hold the primary latching mechanism in the latched position, the secondary latching element being movable to move the primary latching mechanism to the unlatched position while remaining in engagement with the primary latching mechanism.

Abstract: A distributorless ignition coil has two high voltage secondary windings wound around a primary winding, with each secondary winding being electrically connected to a respective spark plug. A shield surrounds the secondary windings. The secondary windings share a common center tap between them, and the center tap is electrically connected to the shield, which thus acts as a conductor to convey current back to an end of the shield that conveniently may be connected to ignition components to complete the electrical path, thus obviating the need for an interior wire extending from the center tap inside the coil to the end of the coil case.

Abstract: A voltage-controlled rectifier is disclosed to include a circuit board, which has a circuit electrically connected to the positive and negative terminals of the car battery of a car, a capacitor set formed of a plurality of capacitors connected in parallel to the circuit on the circuit board, and a rectifying unit, which has a connecting member and a winding eccentrically wound round the connecting member and electrically connected in series to the capacitor set.

Abstract: The coil component of the present invention is configured in that one secondary winding is coiled between central portion and end portion of outer magnetic leg, and the other secondary winding is coiled between central portion of outer magnetic leg and first gap portion. Secondary windings and are coil in directions opposite to each other, and secondary winding is less in the number of windings than secondary winding.