Abstract: An electrical charging strategy and system for a high voltage electrical energy storage system able to supply electrical energy to a hybrid vehicle is disclosed. The system charges the electrical energy storage system so state-of-charge at the end of a trip is substantially unchanged. The strategy and system employs opportunity charging to achieve maximum energy efficiency of the hybrid system, thus minimizing fuel consumption and maximizing fuel economy. The charging system operation is controlled, based upon: the state-of-charge of the electrical energy storage system, and, the operating efficiency of the internal combustion engine. Battery life is likewise extended through use of this strategy.

Abstract: A battery management system and a method of operating the same includes a plurality of battery cells constituting one pack and connected to a battery having at least one pack, and determines an estimated state of charge (SOC) of the battery. The battery management system determines whether or not a pack current flows, and controls a reset of an SOC depending on the determination result. The battery management system sets an OCV idle period associated with a temperature of the battery, and compares the idle period with a time for which the current of the battery does not flow, and sets the reset OCV depending on the comparison result. The battery management system resets the estimated SOC as the reset SOC associated with the reset OCV.

Abstract: A method for providing an elective replacement indicator (ERI) voltage for a first implantable electrochemical cell, comprising the steps of providing a second, substantially identical exemplary electrochemical cell; repeatedly connecting and disconnecting the second cell to a sequence of at least three loads, thereby discharging the second cell from a state of about zero percent to at least about ninety percent depth-of-discharge; generating cell voltage vs.

Abstract: power factor correction (PFC) circuit includes a coupled split boost choke having at least two windings, at least two boost diodes and at least two power rails. Each power rail includes one of the windings and one of the boost diodes. The PFC circuit further includes a current balancing circuit coupled between the power rails for substantially balancing currents in such power rails.

Abstract: A switching power supply with output ripple suppression includes a rectification circuit, a filtering circuit, a PFC, a transformer, a voltage stabilization circuit and a DC/DC converting circuit with feedback control. The DC/DC converting circuit includes a switching circuit, a PWM generator and a feedback circuit. The feedback circuit receiving feedback signals reflects an actual output voltage of the switching power supply and transmits the feedback signals to the PWM generator. The PWM generator produces PWM waves to control an on-off time ratio of the switching circuit by comparing the feedback signals with a reference signal that reflects a desired output voltage of the switching power supply. The switching circuit in turn controls the actual output voltage of the switching power supply.

Abstract: For one disclosed embodiment, an apparatus comprises a load circuit having one or more memory devices, one or more temperature sensors to sense one or more temperatures for the load circuit, and supply voltage control circuitry to control supply voltage to be applied to the load circuit. The supply voltage control circuitry may vary the supply voltage based at least in part on one or more sensed temperatures when the load circuit is in an inactive state and may help retain one or more signals by one or more memory devices of the load circuit as the supply voltage is varied. Other embodiments are also disclosed.

Abstract: The invention relates to a buck converter including a first high-side switch circuit having an input terminal electrically connected to a first power input terminal, a control terminal electrically connected to a first control signal source, and an output terminal; a second high-side switch circuit having an input terminal electrically connected to a second power input terminal, a control terminal electrically connected to a second control signal source, and an output terminal electrically connected to the output terminal of the first high-side switch; a lower-side switch circuit having a first terminal electrically connected to the output terminal of the first high-side switch and a second terminal electrically connected to a reference power terminal; and a filter electrically connected to the output terminal of the first high-side switch and a power output terminal, wherein the first and second high-side switch circuits will not turn on at the same time.

Abstract: A system and method for managing phases in a multiphase switching power supply turns off a phase in light load conditions and turns on a phase in heavier load conditions. The increase or decrease in the number of phases changes the efficiency of the power supply in response to operating conditions. The phases of the power supply may be synchronized and interleaved. Input current or power representing power supply loading provides a criteria for switching phases on or off. The input current can be taken from an input current sense resistor. The input power can be determined based on a control for managing phases. Turning a phase off causes remaining phases to have an increased on-time or gain to smooth the transition between differing numbers of active phases.

Abstract: In a power supply apparatus including a step-up circuit, an output terminal is provided and connectable to an external smoothing circuit formed by a parasitic resistance of a connection layer and an external capacitor. A resistor is connected between an output end of the step-up circuit and the output terminal.

Abstract: A power converter includes multiple phase circuits, each phase circuit includes a power switch for delivering power to an output of the power converter, a current sensor connected to the power switch for sensing a current in the power switch, a duty cycle controller having an output connected to the current sensor, and a low pass filter connected to the current sensor. The low pass filter is configured to produce a substantially direct current signal proportional to the average current in the power switch. Further, the duty cycle controller is configured to receive the direct current signal and control a duty cycle of the power switch in response to the direct current signal thereby balancing the currents in the phase circuits.

Abstract: While firing a number of phases of a multi-phase switching voltage regulator in a sequence, a determination is made as to which one of the phases has the lowest phase current. Then, the next phase, to be fired in the sequence, is selected as the one that has been determined to have the lowest phase current. Other embodiments are also described and claimed.

Abstract: Disclosed is a single-inductor DC-DC converter capable of delivering a multiple output voltages. One of the output voltages is always higher than the input voltage, while other output voltages may by higher or lower than the input voltage. The DC-DC converter requires no input power switch connected between the input voltage source and the power inductor. The DC-DC converter delivers power to all output voltages during the same switching cycle. The highest output voltage is used to reset the inductor current.

Abstract: In a switching power supply apparatus for performing a switching control of a power MOS transistor that flows current to a coil and converting input voltage into output voltage, even if there occurs offset voltage in a current sensing operational amplifier, source potential of a current sensing MOS transistor is precisely kept at source potential of a low side power MOS transistor. For example, an offset cancel capacitor is arranged at an inverting input terminal of the current sensing operational amplifier, and voltage in the direction to offset the offset voltage occurring in the operational amplifier is charged to this capacitor.

Abstract: A semiconductor device having conversion units which change the reference potential of an input signal to a first or second reference potential and outputs the input signal to a first drive unit or second drive unit , change the reference potential of a first control signal output from the first drive unit to the second reference potential and outputs the first control signal to the second drive unit, and changes the reference potential of a second control signal output from the second drive unit to the first reference potential and outputs the second control signal to the first drive unit, wherein the conversion units increase currents flowing through the conversion units on the basis of a time when the input signal changes.

Abstract: There are provided a resistor R2 arranged in parallel with a resistor R1 that produces a feedback signal indicating a value of an output current to a load 7 and, in a control circuit device 6, a voltage changing circuit 68 that changes a reference potential applied to the inverting input terminal of an error amplifier 64. Thus, when the electric power of a DC power source 1 decreases, by changing the reference potential applied to the error amplifier 64 and the resistance of a resistor that detects the value of the output current to the load 7, it is possible to reduce the electric power consumption of the resistor and thereby prolong a lifespan of the DC power source.

Abstract: A control circuit device 6 is supplied with a buffer circuit 71 that has an input side thereof connected to a PWM input terminal PWN, and the buffer circuit 71 transforms a PWM signal being supplied from the outside to obtain a waveform, whereby an “H” level of a PWM signal that is inputted to an error amplifier 68 by way of an RC filter 8 can be made constant. As a result, it is possible to control an output current to be supplied to the load 7 even when the output current to the load 7 is minimal.

Abstract: Disclosed is for controlling a light source by pulse width modulation of a supply voltage. The supply voltage, or a parameter dependent thereon, is measured and the pulse width is controlled as function of the measured value. The supply voltage or parameter is measured at least twice during the pulse and may be cyclically measured. The pulse width of the current or a subsequent pulse is matched to the recorded value of the supply voltage or the parameter. A total value is generated from all of the measured values and compared with a given value and the pulse width of subsequent pulses are matched as function of the difference between the total value and the given value.

Abstract: A current-mirror circuit for monolithic integration in semiconductor microwave circuits is presented which overcomes the detrimental aspects of the emitter-follower current mirror resulting in improved accuracy and stability of the current mirror even under low voltage operation of circuits with high emitter-bias voltages such as GaAs. Advantageously the circuit can be implemented solely with NPN transistors and resistors allowing the circuit to be compatible with the reduced manufacturing processes and design options on high frequency materials such as GaAs and InP. The invention can be applied to low emitter-bias voltage materials such as Si and SiGe to offer increased accuracy and stability, and lower power supply levels.

Abstract: An electronic device is moved into a first position such that terminals of the electronic device are adjacent probes for making electrical contact with the terminals. The electronic device is then moved horizontally or diagonally such that the terminals contact the probes. Test data are then communicated to and from the electronic device through the probes.

Abstract: A novel method and device for measuring electrical parameters in an energy meter in an electrical system is described. The novel method samples an electrical energy signal and determines a relevant portion of the sampled electrical energy signal. The relevant portion of the electrical energy signal is then separately multiplied by a first and second reference waveform. The relevant portion may be reflective of a particular line cycle at a particular frequency of interest. In addition, other samples in the line cycle may be accumulated. The samples whose portions may be determined may be the first and/or last signal, while other sampled signals may be evaluated in whole.

Abstract: A handler for sorting semiconductor chips after they have been tested includes a loading unit for loading chips to be tested and an unloading unit for unloading chips that have been already tested. Chips arrive in trays at the loading unit, and a loading picker removes the chips from the tray. When a tray is empty, it is moved over to the unloading unit by a tray transfer mechanism so that tested chips can be placed back into the tray. The tray transfer mechanism rotates the empty trays upside down as it is moved from the loading unit to the unloading unit to ensure that the tray is completely empty before it arrives at the unloading unit.

Abstract: A position-sensing system magnetically senses the position of a first component moving with respect to a second component. A magnetically hard layer on the first component provides a recording medium. Information is magnetically recorded in regions of the magnetically hard layer. These regions provide a relative encoding scheme for determining the position of the first component. Magnetic-field sensors are positioned over redundant tracks of magnetically recorded regions. Each magnetic-field sensor positioned over a given track senses the same magnetized regions while the first component moves with respect to the second component. Other magnetic-field sensors can sense ambient fields for use in performing common-mode rejection. A write head can dynamically repair damaged or erased regions detected by the magnetic-field sensors. Energized by a battery-backup power source, the magnetic-field sensors and associated circuitry can continue to track movement of the first component when the machinery is off.

Abstract: A metrology system for measuring the magnetic properties of a magnetic recording medium layer on a device used for perpendicular recording.

Abstract: Apparatus for detecting defects in an oilfield string at a well site as the string is pulled from the well include a plurality of magnetic flux sensors 12 circumferentially spaced about the string, and a plurality of stand-off sensors 14 circumferentially spaced about the string for determining changes in stand-off distance between one or more stand-off sensors and an external surface of the string. Computer 18 corrects signals from the plurality of magnetic flux sensors as a function of the detected stand-off distance.

Abstract: A magnetic-sensing apparatus and methods of making and using thereof are disclosed. The sensing apparatus may have one or more magneto-resistive-sensing elements, one or more reorientation elements for adjusting the magneto-resistive-sensing elements, and semiconductor circuitry having driver circuitry for controlling the reorientation elements. The magneto-resistive-sensing elements, reorientation elements and/or semiconductor circuitry may be disposed in single package and/or monolithically formed on a single chip. Alternatively, some of the semiconductor circuitry may be monolithically formed on a first chip with the magneto-resistive-sensing elements, while a second portion of the semiconductor circuitry may be formed on a second chip. The first and second chips may be placed in close proximity and electrically connected together. Alternatively the chips may have no intentional electrical interaction.

Abstract: A phantom for examination in nuclear spin tomographs comprises at least one test body for abstract imitation of a human or animal body part, and also means for supplying the test body with a liquid during the examination by nuclear spin tomography. Another phantom for examination in nuclear spin tomographs comprises at least one abstract imitation of a human or animal body part, of which at least one abstract imitation is adapted to be an at least partially flexible test body, and a flexible layer surrounding the partially flexible test body to imitate a lipid layer. Methods for producing test bodies include molding the test bodies from plastic material.

Abstract: A RF transmit coil decoupling circuit in a parallel drive configuration comprises a power amplifier and an output matching network to shim the B1 field in response to inhomogeneities therein. The separate coil segments in a transmit array are effectively decoupled from each other despite inherent mutual inductance between coil segments by the decoupling circuit. The output matching network forms a high impedance block seen by the coil elements, while it provides a load line impedance at the output of the power amplifier. The transmission line transformer in the output matching network suppresses higher order harmonics for clearer RF wave forms. It also dampen the Q factor of the output matching network allowing stable operation with a series tuned coil element.

Abstract: Described herein is a magnet system for use in imaging a volume that includes a main magnet and at least one magnet coil assembly positioned between the main magnet and the imaging volume. A gradient coil assembly including an inner primary gradient coil alone or with the addition of an outer secondary gradient coil may also exist between the main magnet and imaging volume. The magnet coil assembly may then be positioned between the inner primary gradient coil and the imaging volume, between the inner primary gradient coil and outer secondary gradient coil, or in both positions. Also described herein is an MRI system incorporating the magnet system with additional magnet coil assemblies, and the process for improving the homogeneity of a magnet system using the additional magnet coil assemblies.

Abstract: A low profile radio frequency coil (32, 44, 441, 442, 443) for use in a magnetic resonance imaging system includes a low profile antenna (34, 102, 202, 302) that is configured to resonate at about a magnetic resonance frequency of the magnetic resonance imaging system. A generally planar inductor (110, 112, 210, 240, 310) is electrically connected or coupled with the low profile antenna. The generally planar inductor provides selected frequency filtering of a radio frequency signal received by or transmitted by the low profile antenna.

Abstract: An object of the present invention is to provide a DC test apparatus capable of reducing wasteful standby power consumption. The DC test apparatus has a power amplifier circuit 130 for supplying a current to a DUT during a test. The power amplifier circuit 130 is provided with transistors 18 and 20 for generating an output current appropriate for an input voltage during current supply, resistors 54 and 56, and a variable resistance circuit 40 for setting a standby current flowing through these transistors 18 and 20 and the like during current supply to a smaller value at any time other than during current supply.

Abstract: This invention relates to a method and apparatus for detecting and alarming unbalanced power feed conditions. A Hall effect device is clamped around a pair of power feed conductors. If the currents in the two power feeder conductors are unequal, i.e., unbalanced, this indicates a trouble condition and is alarmed. Advantageously, Hall effect devices are inexpensive and sensitive. Advantageously, this provides a continuous, inexpensive and sensitive arrangement for detecting unbalanced currents in a feeder pair during and after installation of a system.

Abstract: An arc fault detector, as a stand alone device or in combination with a circuit interrupting device such as a ground fault interrupter (GFCI), protects from potentially dangerous arc fault conditions. The device utilizes a line side or load side series connected inductance having an air or magnetic core to generate the derivative di/dt signal of the arc current in the conductor. The derivative signal is fed to an arc fault detector where it is analyzed for the presence of arcing. The device can have two series connected inductors inductively coupled to each other such that the signal from one inductor is inductively coupled into the other inductor for coupling to the arc fault detector.

Abstract: An apparatus for measuring moisture in a solid employs position feedback for an operator adjusted surface probe. This probe position feedback in the form of visual or audio signals allows an operator to more precisely position a surface probe when making such measurements. The visual or audio feedback will allow an operator to better place a moisture detection probe on a remote surface which may be obscured from the operator's direct line of sight.

Abstract: A method for compensation for a position change of a probe card is disclosed. In one embodiment, during the course of a functional test of an integrated circuit which is arranged on a semiconductor wafer includes determination of a temperature of the probe card and matching of the position of the semiconductor wafer to the temperature-dependent position change of the probe card. Matching of the position of the semiconductor wafer is carried out on the basis of the determined temperature and of a family of characteristics which reflects the temperature-dependent position change of the probe card.

Abstract: There is provided a probing apparatus capable of modifying an existing probing apparatus having a single loading port to one having dual loading ports while saving the space without increasing a foot print thereof and also capable of increasing an inspection efficiency by cooperating with an automatic transfer line for the apparatus having a single loading port. The probing apparatus includes a prober chamber in which a wafer is inspected and a loader chamber having: a first and a second loading ports positioned to be spaced apart from each other at the side of a prober chamber, each of the loading ports mounting thereon a cassette accommodating therein a plurality of waters; and a wafer transfer unit for transferring the wafers between the loading ports and the prober chamber. The loading ports are arranged along a route where the cassette is transferred by an automatic transfer device.

Abstract: An arcuate blade probe is disclosed. The arcuate blade probe includes a shaft with a pair of faces that converge towards each other along a probe axis and terminate at a single edge that includes an arcuate profile. The arcuate profile provides a surface that makes an electrical connection between the edge and a node to be probed. The connection can be made along at least one portion of the edge. The edge can be used to probe lead-based and lead-free solder on the pads of vias and test pads. The arcuate profile give the edge a gradual arc that does not come to a sharp point so that the edge can probe vias with plugged holes.

Abstract: A semiconductor apparatus includes a reset terminal to input a reset control signal to reset an internal circuit, a reset detector to generate a reset clear signal to clear a reset of the internal circuit according to the input reset control signal and a mode capture unit to retain a test mode to test an operation of the internal circuit according to a signal input to the reset terminal.

Abstract: New and improved methods and circuit designs for asynchronous circuits that are tolerant to transient faults, for example of the type introduced through radiation or, more broadly, single—event effects. SEE-tolerant configurations are shown and described for combinational logic circuits, state-holding logic circuits and SRAM memory circuits.

Abstract: A register designed to detect and correct soft errors in real time. A redundant latch is added to the existing structure of a flip flop and functional data is simultaneously registered at multiple latches. The content of these multiple latches are fed to a majority voting circuit. If the content of any of these latches is corrupted by soft error, it is filtered out through the majority voting circuit and correct data is passed out from the output of the flip flop. In one embodiment, this design operates as a simple scan flip flop or scan-hold flip flop, and is useful for system testability purposes.

Abstract: A circuit system includes: a master node; and a slave portion including a plurality of non-grounded slave nodes, each of which couples with the master node through a pair of communication lines. The master node and the slave portion provide a differential transmission system for differentially transmitting a signal among the master node and the slave nodes. The slave portion has a predetermined impedance. The differential transmission system has a good signal condition and a sufficient low common mode noise.

Abstract: Logic array devices having complex macro-cell architecture and methods facilitating use of same. A semiconductor device comprising an array of logic cells and programmable metal includes gate structures that are pre-wired, where, inputs and/or outputs are available for routing in programmable metal, possibly as part of a hybrid process. The device can also include selectable, in-line inverters, which can share the input/output tracks with logic inputs. A bubble-pushing algorithm can take advantage of the selectable in-line inverters to reduce the number of inverters in a design. In some embodiments, an embedded clock line is common to a plurality of logic cells. The clock line is terminated in a clock cell, which can include test logic, so that a clock group is formed. Flexibility to power down cells, or groups of cells can be provided by power traces with programmable connections.

Abstract: A level shifting circuit for a semiconductor device comprises a controller, a level shifting portion, and a driving portion. The controller is adapted to level shift a power converting input signal having a first voltage level to generate a pair of control signals having different logic levels from each other. One of the pair of control signals has a second voltage level that is different from the first level. The level shifting portion is adapted to level shift an input signal having the first voltage level to generate a level shifter output signal having the second voltage level or a third voltage level depending on the respective logic levels of the pair of control signals. The driving portion is adapted to drive an output signal with the second or third voltage level based on the voltage level of the level shifter output signal.

Abstract: An integrated circuit includes a programmable circuit with a programmable element, and a storage circuit to store a storage state depending on a programming state of the programmable element of the programmable circuit unit. The storage circuit includes a first inverter circuit and a second inverter circuit. The strengthening and weakening of transistors of the first inverter circuit and of transistors of the second inverter circuit and also the repeated evaluation of the programming state of the programmable element enable the storage state stored in the storage circuit to be made resistant to corruption on account of alpha-particles or neutrons.

Abstract: The present invention implements structures and method for non-delayed clock dynamic logic circuit configurations with output and/or complementary output with reduced glitch and/or mitigating adverse charge-sharing effects for Complementary Oxide Semiconductor (CMOS) and/or mitigating parasitic bipolar action in Strained/Unstrained Silicon-On-Insulator (SOI) circuits, where insulator may be oxide, nitride of Silicon and the like or Sapphire and the like including a method of synthesis.

Abstract: Circuits using four terminal junction field effect transistors (JFETs) are disclosed. Such circuits can include various static and dynamic logic circuits, flip-flops, multiplexer, tri-state driver, phase detector, logic having variable speeds of operation, and/or analog circuit with such four terminal JFETs operating in a linear or nonlinear mode.

Abstract: A structure and method for reducing the effects of chip-package resonance in an integrated circuit assembly is described. A series RLC circuit is employed to reduce the output impedance of the power delivery system at the resonance frequency.

Abstract: A method of designing a current source involves selecting an equation for a current output through a circuit. Variations in current are checked to make sure they are not a strong function of process and bias. A circuit topology is then created as a function of the equation. Example circuits include an addition based current source and a square root based current source.

Abstract: A load such as an LED and a constant-current source are connected in series with each other between the node of a dc-dc conversion type power supply circuit providing an output voltage and the ground. The constant-current source provides a constant current Io, the magnitude of which can be adjusted. The power supply circuit controls the output voltage such that the voltage drop across the constant-current source serving as a detection voltage becomes equal to a reference voltage. Thus, the load current can be varied within a predetermined range while avoiding the power loss due to an increase in the load current, thereby always permitting efficient operation of the load.

Abstract: A driver circuit for driving a load (3) connected between an output (FO) of a first channel driver (D1) and an output (RO) of a second channel driver (D2). The first and second channel drivers (D1, D2) each include switch transistors for charging and discharging the gates of upper and lower output transistors in response to a command from an input pulse, a charging/discharging circuit (A2, B2) for determining a charging/discharging speed, and a detector circuit (A1, B1) for detecting a state of the channel driver on the opposite side. A dead time period and a speed of charging/discharging the gates of the upper and lower output transistors are changed according to the state of the channel driver on the opposite side. Thus, it is possible to achieve a channel driver circuit which can prevent a shoot-through current, adjust an output slew rate, and obtain preferred linearity as an input-output characteristic.

Abstract: A delay-locked loop device compensates a skew between an external clock and data or between an external clock and an internal clock particularly by applying a single delay model portion, a complementary phase multiplexing, and a cascade delay line. This device performs an operation by selecting any one of an external clock signal (CLK) and an inverted external clock signal (CLKB) using a multiplexing portion 200, aligning the selected clock signal at a rising edge of the external clock signal (CLK) through a first single coarse delay line 212, a first dual coarse delay line 222, and a first fine delay unit 223 according to the phase comparison with a feedback clock signal (FBCLK) through a delay model portion 250, then receiving a clock signal through the first single coarse delay line 212 to the second single coarse delay line 214 to align the rising edges of the rising clock signal (RCLK) and the falling clock signal (FCLK).