Patents Issued in February 19, 2008
  • Patent number: 7333526
    Abstract: A quasi-monochromatic light beam carrier for a particular telecommunication channel is likely to experience drift because of age, temperature, or other factors, and may cause the centroid wavelength of the carrier to shift. Temperature adjustments by wavelength lockers to compensate for drift on one channel may affect the performance of other channels. Embodiments of the present invention couple a quasi-monochromatic light beam through a substrate-based grating, diffract the light beam from the edge of the substrate to free space, and detect the light beam from free space at a position detector to determine the centroid wavelength based on a position of the light beam incident on the detector. The diffracted light beam may be reflected within the substrate a number of times prior to exiting the substrate towards the detector.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: February 19, 2008
    Assignee: Intel Corporation
    Inventor: Mark McDonald
  • Patent number: 7333527
    Abstract: The clock signal is the dominant source of electromagnetic interference (EMI) for many digital electronic devices. EMI generated by these electronic devices must be suppressed to avoid interference with other electronic devices and to satisfy FCC regulations. The present invention seeks to reduce EMI emissions by phase-modulating the clock signal using tunable delay lines. Phase modulation causes a spreading of the energy spectrum of the clock signal thereby reducing EMI emissions. In addition, the present invention is capable of generating a wide energy spectrum in a short time interval. Furthermore, the present invention can be similarly applied to other signals which exhibit a periodic or timing nature due to a correlation with the clock signal.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: February 19, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Mark R. Greenstreet, Robert J. Bosnyak, Stuart A. Ridgway
  • Patent number: 7333528
    Abstract: A multiuser direct sequence spread spectrum (DSSS) Orthogonal Frequency Division Multiplexing (OFDM) multiband of Ultra Wideband (UWB) communication system for short-distance wireless broadband communications is disclosed for indoor environment operations. Eleven frequency bands are employed, with each of the frequency bands having 650 MHz bandwidths. A 1024-point IFFT and FFT with 1,000 subcarriers are used to carry data and pilots within each of the frequency bands. The multiuser DSSS-OFDM multiband of the UWB communication system can transmit N different users at the same time by using a unique spreading sequence for each of the N different users. A QPSK modulation is used for a different data rate with scalability. The maximum transmitting data rate of the UWB communication system can achieve about 5.541 Gbps.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: February 19, 2008
    Inventor: George J. Miao
  • Patent number: 7333529
    Abstract: In order to perform synchronization detection with high speed, high precision and high reliability and to measure communication quality (propagation characteristics) at high precision and high efficiency, a mobile station (202) includes synchronization detecting portion (221) for detecting synchronization chip timing of channel to be measured, a synchronization chip timing information portion accumulating information of detected synchronization chip timing, a correlation detecting portion (222) deriving a correlation value between spreading code of the channel to be measured and a received signal for performing communication with a base station and measurement of communication quality with taking the detected synchronization chip timing as a reception chip timing, a time series generating portion (223) for generating a time series data of received signal vector after correlation detection, and a communication quality calculating portion (224) for calculating communication quality from generated time series da
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: February 19, 2008
    Assignee: NTT DoCoMo, Inc.
    Inventors: Tetsuro Imai, Shinichi Mori
  • Patent number: 7333530
    Abstract: A digital signal processor performs despread decoding in wireless telephone systems. Orthogonal codes are used to combine data signals into one overall coded signal which is transmitted. The orthogonal codes are used to retrieve individual data signals from the transmitted overall coded signal. Despread instructions are included in the digital signal processor functionality.
    Type: Grant
    Filed: August 6, 2001
    Date of Patent: February 19, 2008
    Assignee: Analog Devices, Inc.
    Inventors: Rasekh Rifaat, Zvi Greenfield, Jose Fridman
  • Patent number: 7333531
    Abstract: Two or more antenna elements are arranged in the vertical direction to give vertical spatial adaptivity to a wireless discrete multitone spread spectrum communications system. The system is based on a combination of Discrete Multitone Spread Spectrum (DMT-SS) and multi-element adaptive antenna array technologies. This enables the automatic positioning of a beam in the vertical direction to position nulls where interferers are to located on the same azimuth but are separated in elevation.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: February 19, 2008
    Assignee: AT&T Mobility II LLC
    Inventors: Siavash Alamouti, Joel E. Becker, Douglas Frank Stolarz
  • Patent number: 7333532
    Abstract: In one embodiment, a rake receiver for a spread-spectrum (SS) signal has a plurality of rake fingers corresponding to different multipath components of the SS signal and sampling circuitry generating a stream of samples corresponding to the SS signal. A first rake finger has a detection path detecting symbols based on the samples, a synchronization (synch) path, and a weighting controller. Front-end circuitry in the synch path applies three or more time delays, weighting, and SS correlation to the stream of samples to generate front-end output signals. Back-end circuitry in the synch path generates one or more control signals for controlling the timing of the sampling circuitry based on the front-end output signals. The weighting controller adaptively controls the weighting applied by the front-end synch circuitry to minimize effects of one or more other multipath components associated with one or more other rake fingers of the rake receiver.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: February 19, 2008
    Assignee: Agere Systems Inc.
    Inventors: Jens Baltersee, Gunnar Fock, Peter Schulz-Rittich
  • Patent number: 7333533
    Abstract: A communication device can reliably find a frequency and establish frequency synchronization, despite relying on a variable reference frequency, and may do so, e.g., by searching only during one or more periods of frequency stability. Once gained, such synchronization may be held continuously. An acquisition unit receives from a control unit information about a frequency change of a reference signal. The acquisition unit may nonetheless continue to search for, e.g., a satellite at the frequency that had been in use before the frequency change of the reference signal. An acquisition unit in such a device may search over extended periods, e.g., by using two or more frequency-stable periods. The acquisition unit may, e.g., transmit information about a change in the reference frequency to a tracking unit to maintain synchronization with the satellite.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: February 19, 2008
    Assignee: Sony Corporation
    Inventors: Yoshihisa Takahashi, Takayasu Muto, Jason Sanmiya
  • Patent number: 7333534
    Abstract: Disclosed is a method for performing fast distributed sample acquisition (DSA). A spreader generates a data signal by spreading an incoming data stream over a range of spectrum according to a locally generated first main sequence, and samples the state sample of the main sequence. A sample spreader outputs a first state signal by spreading a symbol according to a locally generated first subsequence. A sample despreader reconstructs the transmitted binary orthogonal symbols by despreading the first state signal obtained from the sample spreader according to a locally generated second subsequence to detect the first main sequence state sample. A despreader compares the state sample obtained from the sample despreader with a locally generated state sample and makes correction on a local SRG to generate a second main sequence having new state. An incoming data stream is reconstructed by despreading the data signal obtained from the spreader according to the second main sequence.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: February 19, 2008
    Assignee: LG Electronics Inc.
    Inventors: Byoung-Gi Lee, Byoung-Hoon Kim
  • Patent number: 7333535
    Abstract: By allowing the block rate to vary, the existing Asymmetric Digital Subscriber Line (ADSL) system is modified to better address extended reach and higher data rates. A method is disclosed for providing improved reach from the ADSL standard by reducing the block rate from the ADSL standard and providing improved data rate for short loops by increasing the block rate from the ADSL standard.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: February 19, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Arthur John Redfern
  • Patent number: 7333536
    Abstract: A microcontroller with embedded software for automatically detecting a baud rate of an asynchronous serial bit stream during an initial set up phase of a microcontroller. The microcontroller is configured to receive a data set from a transmitter and includes a transition detector for identifying bit transitions in the data set. The microcontroller includes a timer triggered by the transition detector that is measures the time interval between two predefined bit transitions, a storage element for registering the measured time interval, and a look up table that provides defines baud rates relative to various time intervals that can be accessed to determine a nearest baud rate value corresponding to the registered time interval.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: February 19, 2008
    Assignee: StMicroelectronics Pvt. Ltd.
    Inventors: Sangeeta Sinha, Praveen Kumar
  • Patent number: 7333537
    Abstract: A system is presented that monitors the quality of a communications channel with mirror receivers. A first receiver and a second receiver, coupled in parallel with the first receiver, receive a data signal transmitted over the communications channel. The second receiver generates an output signal. A signal integrity (SI) processor manipulates the output signal in order to determine the quality of the communications channel. The SI processor samples a phase-shifted version of the output signal, which has a phase shifted relative to a zero reference phase, and analyzes the phase-shifted version of the output signal for bit errors. In an embodiment, the SI processor manipulates the output signal to extract an eye diagram indicative of the quality of the communications channel. The SI processor non-intrusively determines the quality of the communications channel using the second receiver.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: February 19, 2008
    Assignee: Broadcom Corporation
    Inventors: Jay Proano, Howard Baumer, Chung-Jue Chen, Ali Ghiasi, Vasudevan Parthasarathy, Rajesh Satapathy, Linda Ying
  • Patent number: 7333538
    Abstract: An equalization method for a downlink channel in an MC-CDMA telecommunication system includes a plurality of links established between a transmitter and a plurality of receivers, each link using a distinct access code amongst N possible codes. The method includes a first step of estimating the relative levels of the signals transmitted by the transmitter using each of the N codes, the first step including an equalization of the MC-CDMA symbols carrier by carrier, and a second step using the levels for estimating the symbols transmitted by the user over at least one link, the second step being adapted to minimize the mean square error between the transmitted symbols and the estimated symbols.
    Type: Grant
    Filed: March 19, 2002
    Date of Patent: February 19, 2008
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Damien Castelain, David Mottier
  • Patent number: 7333539
    Abstract: A digital filter is disclosed, the filter comprising a device for determining the initial condition of a partial filter input, using a partitioned filter input signal, and partitioned filter input coefficients and a device for determining the initial condition of a partial filter output, using a partitioned filter output signal, and partitioned filter output coefficients, and a device for realising said digital filter as a sum of outputs of Finite Impulse Response (“FIR”) filter elements, wherein inputs of the FIR filter elements are dependent upon said partial filter input initial condition and said partial filter output initial condition, and said current block of filter input signal values.
    Type: Grant
    Filed: May 4, 2001
    Date of Patent: February 19, 2008
    Assignee: Deqx Pty Ltd
    Inventor: Paul William Glendenning
  • Patent number: 7333540
    Abstract: The invention relates to apparatus, methods and computer program code for equalisation. A soft-in-soft-out (SISO) equaliser for use in a receiver for receiving data from a transmitter configured to transmit data from a plurality of transmit antennas simultaneously is described.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: February 19, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mong Suan Yee
  • Patent number: 7333541
    Abstract: A variable square-wave drive device for controlling square waves using feedback- and bias-control methods.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: February 19, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Byoung Own Min, Hyun Jin Kim, Hyoung Jun Jeon
  • Patent number: 7333542
    Abstract: A memory compression and expansion section (11 of FIG. 1) applies compression to a decoded image, and the result is stored in a frame memory. Based on an occupied content of the frame memory (FIG. 1, 106), in case that the number of coded bits for a single or a plurality of memory compression processing blocks or for every control unit of memory compression processing exceeds the number of bits of a memory access unit or is lacking, a memory access width control section (110 of FIG. 1) applies control to a quantizer control section (109 of FIG. 1) so that the number of coded bits is conformed to be equal to or less than the number of bits of memory access unit.
    Type: Grant
    Filed: June 16, 1999
    Date of Patent: February 19, 2008
    Assignee: NEC Corporation
    Inventors: Junji Tajime, Tetsuro Takizawa
  • Patent number: 7333543
    Abstract: A method which calculates a motion vector based on a transformed picture obtained by Discrete Coefficient Transform (DCT) or a Wavelet transform, and an apparatus appropriate for the method. The motion vector estimating method in an encoding method for a moving picture based on a block, the motion vector estimating method includes dividing each of a (k?1)-th frame and a k-th frame into blocks, each of which has N×N picture elements, and transforming the blocks by applying an arbitrary transform method; and determining a search area having a size of W×W (here, W>N) in the (k?1)-th frame, finding an N×N block in the search area of the (k?1)-th frame which has an optimal similarity to an N×N block in the k-th frame, and estimating a motion vector by calculating the displacement of the found block.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: February 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jung-hwa Choi
  • Patent number: 7333544
    Abstract: A lossless image encoding/decoding method and apparatus. The lossless color image encoding apparatus includes a motion prediction image generator estimating a motion between a previous image and a current image and outputting a corresponding prediction image, a residue generator generating a temporal residue corresponding to a difference between a prediction image generated by the motion prediction image generator and the corresponding block of the current image with respect to different components of the color image, a prediction residue generator generating prediction residues by defining a linear-transformed value of one residue among the different components of the color image output from the residue generator as a predictor and using differences between each of the residues of the other components and the predictor, and an entropy encoder receiving the residue forming the predictor from the residue generator and the prediction residues from the prediction residue generator and generating a bitstream.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: February 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woo-shik Kim, Dae-sung Cho, Hyun Mun Kim
  • Patent number: 7333545
    Abstract: A decoder decodes full frame MPEG-2 video by a single method that applies regardless of buffer memory and frame rate conversion considerations. A display control module handles frame rate and field sequence in response to host configuration, trick play command signals, and information in the received bitstream. Pictures are decoded as buffer memory for the decoded pictures becomes available, and picture display attributes are assigned and stored in a table, one string for each decoded picture. Frame rate and field sequence are managed in light of memory constraints, to produce a high quality result without re-decoding data.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: February 19, 2008
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Cem I. Duruöz, Taner Ozcelik, Yoshinori Shimizu
  • Patent number: 7333546
    Abstract: In a mobile communication system, a coding apparatus receives 5 information bits and generates a code symbol stream comprised of 20 coded symbols. The coding apparatus generates 5 coded symbol streams having a length 32 by encoding the 5 individual information bits with different Walsh codes having a length 32, and generates a coded symbol stream comprised of 32 coded symbols by XORing the 5 coded symbol streams in a symbol unit. Further, the coding apparatus generates a code symbol stream comprised of 20 coded symbols by puncturing 2nd, 4th, 5th, 6th, 8th, 9th, 10th, 11th, 12th, 13th, 14th, and 30th coded symbols among the 32 coded symbols.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: February 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Yoel Kim, Sung-Oh Hwang, Hyun-Woo Lee
  • Patent number: 7333547
    Abstract: Dynamic quantization methods and dynamic quantizers for quantizing soft outputs of an equalizer according to the channel condition in order to alleviate the computational load on a soft decision decoder. The dynamic quantizer assigns only a few bits to represent the equalized signals when the channel condition is good, thus reducing computational burden on the soft decision decoder.
    Type: Grant
    Filed: July 14, 2004
    Date of Patent: February 19, 2008
    Assignee: Benq Corporation
    Inventors: Yi-Yuan Tsai, Hung-Yi Chen
  • Patent number: 7333548
    Abstract: A phase drift compensation scheme for multi-carrier systems. According to the invention, a timing offset compensator is provided to compensate for a timing offset in a current symbol after taking an N-point FFT. Then a phase estimator computes a phase estimate for the current symbol based on a function of a channel response of each pilot subcarrier, transmitted data on each pilot subcarrier, and a timing compensated version of the current symbol on the pilot subcarrier locations. From the phase estimate, a tracking unit can generate a phase tracking value for the current symbol. Thereafter, a phase compensator uses the phase tracking value to compensate the timing compensated version of the current symbol for the effect of phase drift.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: February 19, 2008
    Assignee: Mediatek Inc.
    Inventor: Hung-Kun Chen
  • Patent number: 7333549
    Abstract: A apparatus and method for estimating a sequence of transmitted quadrature amplitude modulation (QAM)-modulated signals and space-time block coded signals using an optimal expectation-maximization (EM)-based iterative estimation algorithm in a multiple-input and multiple-output (MIMO)-orthogonal frequency division multiplexing (OFDM) mobile communication system. An initial sequence estimation value is produced on the basis of a predetermined initial value using a pilot sub-carrier contained in each of OFDM signals received by a receiving side. A normalized value of a received signal on a channel-by-channel basis is produced by a predetermined equation using orthogonality between the OFDM signals received by the receiving side. At least one subsequent sequence estimation value is produced using the initial sequence estimation value and the normalized value of the received signal on the channel-by-channel basis.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: February 19, 2008
    Assignees: Samsung Electronics Co., Ltd., Seoul National University Industry Foundation
    Inventors: Jong-Ho Lee, Jae-Hak Chung, Chan-Soo Hwang, Seung-Hoon Nam, Do-Young Kwak, Jae-Choong Han, Seong-Cheol Kim
  • Patent number: 7333550
    Abstract: A discontinuous transmission (DTX) bit processing method for a multirate modulation scheme is provided. The method comprises receiving a symbol; determining whether the symbol comprises at least one DTX bit; mapping the symbol to a predetermined mapping point (S) on an IQ plane; minimizing a transmission power level if the symbol has at least one DTX bit; and transmitting the symbol in the transmission power level of the mapping point.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: February 19, 2008
    Assignee: LG Electronics Inc.
    Inventor: Sung-Kwon Hong
  • Patent number: 7333551
    Abstract: A mobile communication system having M transmission antennas for receiving P information bit streams and encoding the received information bit streams with a space-time trellis code (STTC) according to an optimal generator polynomial; modulating the encoded P information bit streams in a predetermined modulation scheme and outputting modulation symbol streams; and puncturing at least one modulation symbol in a predetermined position from each of the M modulation symbol streams, and transmitting the punctured modulation symbol streams through the M transmission antennas, thereby increasing a data rate while maintaining maximum diversity gain.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: February 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-Soo Hwang, Yung-Soo Kim, Seung-Hoon Nam, Jae-Hak Chung
  • Patent number: 7333552
    Abstract: A method and a device for the coding and/or decoding of an information symbol for transmission over a transmission channel or a received signal value is described and illustrated, whereby a channel symbol used for coding is selected from at least two available channel symbols by means of a pre-calculated expected received signal value. The pre-calculation is achieved, based on the echo properties of the transmission channel and transmission values already sent. A pre-coding method with low receiver-side calculation requirement is thus prepared, whereby the information symbol can be transmitted by means of various channel symbols and thus various transmission values can also be transmitted. The possible selections may be used for minimization of the transmission energy and/or to achieve a minimal disturbance or even a constructive effect through the inter-symbol interference occurring on transmission.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: February 19, 2008
    Assignee: Nanotron Technologies GmbH
    Inventors: Manfred Koslar, Rainer Hach
  • Patent number: 7333553
    Abstract: An apparatus and method for tunably delaying a signal and using that delayed signal in a duobinary transmitter is described. The transmitted duobinary signal is representative of the binary signal, and is formed by, among other things, introducing into a copy of the binary signal a delay that may be adjusted to be greater than or less than the bit period of the signal. Once the binary signal has been converted into a duobinary signal, it may then be converted into an optical duobinary signal. Alternatively, the conversion from binary to duobinary in accordance with the invention may be performed in the optical domain.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: February 19, 2008
    Assignee: Lucent Technologies Inc.
    Inventors: Sethumadhavan Chandrasekhar, Peter Winzer
  • Patent number: 7333554
    Abstract: A signal processing unit is described relates to a communication system by radio waves with frequency modulation comprising a signal processing unit, a transmission stage for transmitting a transmission signal in response to a modulated control signal and in response to a first frequency reference signal, a modulator connected between the processing unit and the transmission stage for forming the modulated control signal in response to an output signal of the processing device and in response to a second frequency reference signal and means for providing the first frequency signal to the transmission stage and for providing the second frequency reference signal to the modulator wherein the first and second frequency reference signal are derived from a signal oscillator.
    Type: Grant
    Filed: March 14, 2001
    Date of Patent: February 19, 2008
    Assignee: NXP B.V.
    Inventor: Dominique Brunel
  • Patent number: 7333555
    Abstract: Briefly, some embodiments of the invention may provide devices, systems and methods for wireless combined-signal communication. For example, a method in accordance with an embodiment of the invention may include transmitting a combined signal over a combined channel by mapping a first block of said combined signal to be carried by a first sub-channel of said combined channel and mapping a second block, substantially identical to said first block, to be carried by a second sub-channel of said combined channel.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: February 19, 2008
    Assignee: Intel Corporation
    Inventors: Gal Basson, Jorge Myszne, Yuval Finkelstein, Shay Waxman, Assaf Kasher, John Sadowsky
  • Patent number: 7333556
    Abstract: A data rate is selected for subcarriers of each frequency and spatial channel of a slowly varying frequency selective multicarrier channel to provide uniform bit loading (UBL) for faster link adaptation. Signal to noise ratios (SNRs) for subcarriers of the multicarrier communication channel may be calculated from channel state information and a transmit power level. A throughput may be estimated for the data rates from the SNRs and one of the data rates may be selected based on the estimated throughputs.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: February 19, 2008
    Assignee: Intel Corporation
    Inventors: Alexander A. Maltsev, Ali S. Sadri, Alexey E. Rubtsov, Alexei V. Davydov
  • Patent number: 7333557
    Abstract: An adaptive controller for linearization of transmitters using predistortion of the input signal has reduced sensitivity to impairments such as gain variation, phase noise or modulation/demodulation frequency instability by linearizing an adaptively normalized gain provided through a separate estimation and cancellation of linear gain variations. Values of a nonlinear and a linear gain blocks, cascaded with the linearized transmitter and called respectively a predistortion block and a gain regulation block, are independently adjusted by two different adaptive controllers. In one embodiment, four banks of real gain elements compose the predistortion block and realize an arbitrary step-wise approximation of a generalized 2×2 transmit gain matrix of nonlinear functions. In a further embodiment cancellation of a DC level bias multi-channel impairment is provided by an adaptively adjusted signal adder inserted in the transmit chain between the predistortion block and the linearized transmitter.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: February 19, 2008
    Assignee: Nortel Networks Limited
    Inventors: Peter Zahariev Rashev, David M. Tholl
  • Patent number: 7333558
    Abstract: In one embodiment, the present invention includes an transmitter apparatus having a digital filter to compensate in a baseband frequency for magnitude and delay slopes occurring in the transmitter's analog path.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: February 19, 2008
    Assignee: Intel Corporation
    Inventors: Elias J. Nemer, Vladimir Kravtsov
  • Patent number: 7333559
    Abstract: An apparatus and method for eliminating the spurious signal of a non-linear amplifier in a base station transmitter of a mobile communication system are provided. A digital predistorter includes first and second predistorters, each having a memoryless non-linearity part using a look-up table and a memory non-linearity part using an finite impulse response (FIR) filter. The first predistorter adaptively updates the look-up tables, while the second predistorter adaptively updates the filtering coefficients of the FIR filters. According to another embodiment of the present invention, a digital predistorter has a memoryless non-linearity part using a look-up table and a memory non-linearity part using an FIR filter, and adaptively updates the look-up table and the filtering coefficients of the FIR filter.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: February 19, 2008
    Assignee: Samsung Electronics Co. Ltd.
    Inventors: Yoo-Seung Song, Ki-Hwan Hwang
  • Patent number: 7333560
    Abstract: Techniques to process data for transmission in a time division duplexed (TDD) communication system. In one aspect, the frequency response of a forward link is estimated at a base station based on reverse link transmissions (e.g., pilots) from a terminal. Prior to a data transmission on the forward link, the base station determines a reverse transfer function based on the pilots transmitted by the terminal, “calibrates” the reverse transfer function with a calibration function to derive an estimate of a forward transfer function, and preconditions modulation symbols based on weights derived from the forward transfer function. In another aspect, the terminal estimates the “quality” of the forward link and provides this information to the base station. The base station then uses the information to properly code and modulate data prior to transmission such that the transmitted data can be received by the terminal at the desired level of performance.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: February 19, 2008
    Assignee: QUALCOMM Incorporated
    Inventors: Ahmad Jalali, John E. Smee, Mark Wallace
  • Patent number: 7333561
    Abstract: A postdistortion amplifier that produces a postdistortion amplifier output signal based on a signal input to the postdistortion amplifier reduces distortion in the postdistortion amplifier output signal by digitally predistorting an error signal. The postdistortion amplifier includes a digital predistortion unit that receives a digital error signal and produces a digital predistorted error signal based on the received digital error signal and by reference to a predistorted error signal model.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: February 19, 2008
    Assignee: Motorola, Inc.
    Inventors: Danny Thomas Pinckley, Sean Michael McBeath
  • Patent number: 7333562
    Abstract: A nonlinear distortion compensating circuit in which a digital value expressing the amplitude of an input signal is divided into upper and lower bits. Only the upper bits are input to a first memory address. A value obtained by adding 1 to the upper bits is input to a second memory address, or, an interpolation circuit to which the upper bits are input, inputs the upper bits to a first memory storing data corresponding to an even numbered address and a second memory storing data corresponding to an odd numbered address, and performs interpolation by adding outputs from the memories by weighting these outputs in accordance with a value expressed by the lower bits. The input signal is multiplied by the obtained value. An interpolation circuit output is an orthogonal coordinate expression (combination of a real part and imaginary part) or polar coordinate expression (combination of an amplitude and phase).
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: February 19, 2008
    Assignee: NEC Corporation
    Inventor: Motoya Iwasaki
  • Patent number: 7333563
    Abstract: A power management system and method for a wireless communication device generates an average desired transmit power signal based on at least one of a received signal strength indicator signal and a power control instruction signal from a base station. A power supply level adjustment signal is generated based on the data parameters of an outgoing data stream and at least one environmental information signal. A combination of the power supply level adjustment signal and the average desired transmit power or a gain control signal and an altered version of the power supply level adjustment signal is used to generate a variable power supply signal that is provided to an output amplifier block for sufficiently generating outgoing wireless device radio signals while reducing power loss in the output amplifier block.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: February 19, 2008
    Assignee: Research in Motion Limited
    Inventors: Wen-Yen Chan, Nasserullah Khan, Qingzhong Jiao, Xin Jin, Nagula Tharma Sangary, Michael Franz Habicher
  • Patent number: 7333564
    Abstract: The present invention provides a high frequency power amplifier circuit capable of obtaining sufficient detection output even in a range where a request output power level is low and performing a desired output power control by a control loop with the detection output in a radio communication system which detects output power and performs feedback control. An output power detection circuit which detects the level of output power on the basis of an AC signal supplied from a final amplification stage of a high frequency power amplification circuit via a capacitive element has a circuit configuration such that in a state where the output power control voltage is lower than a certain level, current (Isu) according to the output power control voltage is generated and supplied to the output power detection circuit, and detection sensitivity of the output power detection circuit improves according to the current.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: February 19, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Hiroki Sugiyama, Takashi Soga, Yusuke Shimamune, Shuji Tomono, Tomio Furuya, Kyoichi Takahashi
  • Patent number: 7333565
    Abstract: An orthogonal modulating circuit for modulating signals of two oscillation frequencies differing in phase by 90° with transmission data (I and Q) is used in common for a plurality of bands, an LC resonance circuit comprising inductances L and a capacitor C is used as the output load on the orthogonal modulating circuit instead of resistors commonly used according to the prior art, and the values of L or C constituting the resonance circuit are switched over between each other according to the transmission band.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: February 19, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Masachika Oono, Hiroaki Matsui, Koichi Yahagi
  • Patent number: 7333566
    Abstract: In a radio reception apparatus compatible with adaptive modulation, based on a received IQ signal processed by a reception processing unit, a determining unit calculates EVM that corresponds to a magnitude of shift-off between a true symbol point and the received symbol point. The calculated EVM is averaged and thereafter applied to a control unit. The control unit compares the applied EVM with a prescribed threshold value, and determines with high accuracy, switching among a plurality of modulation methods having different multi-value numbers.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: February 19, 2008
    Assignees: Sanyo Electric Co., Ltd, Sanyo Telecommunications Co., Ltd
    Inventors: Seigo Nakao, Katsutoshi Kawai
  • Patent number: 7333567
    Abstract: A digital detector processes at least one received digital signal to generate a squared signal, encodes the squared signal, applies first and second portions of the encoded signal to a multiplier and a look-up element, respectively, and processes outputs of the multiplier and look-up element to generate a detector output signal representative of a power level of the received digital signal. In an illustrative embodiment, the digital detector is configured so as to exhibit a waveform dependence substantially the same as that of an analog logarithmic amplifier detector. The digital detector and analog logarithmic amplifier detector are utilizable in a closed-loop gain control arrangement for providing a desired gain for a signal path of a base station transmitter in a wireless communication system.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: February 19, 2008
    Assignee: Lucent Technologies Inc.
    Inventors: Zhengxiang Ma, Mark Y. McKinnon
  • Patent number: 7333568
    Abstract: A data slicer includes a comparator coupled with an input signal and a reference signal for generating a sliced signal, a waveform generator for generating a calibration signal, a pulse extension device coupled to the comparator and the waveform generator for modifying the duty cycle of the sliced signal or the calibration signal to output, a charge pump coupled between the pulse extension device and a first node for charging and discharging the first node according to the signal output from the pulse extension device, a determining circuit for adjusting the data slicer according to the level change at the first node, and a feedback device coupled between the first node and the comparator for generating the reference signal.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: February 19, 2008
    Assignee: MediaTek Inc.
    Inventors: Chih-Cheng Chen, Shang-Ping Chen
  • Patent number: 7333569
    Abstract: Device for recovering a carrier including a first mixer for multiplying passband I, and Q signals and a first complex carrier to produce baseband I, Q signals, a filter part for providing pilot components of the baseband I, and Q signals only, a first phase error detector for receiving the pilot component to produce first phase error information, a second mixer for multiplying the passband I, Q signals and a second complex carrier, a second phase error detector for multiplying a difference of samples from the second mixer at first and second time points and a sample at a middle time point of the two samples for producing second phase error information, a loop filter for receiving first and second phase error information and selectively forwarding one of the first and second phase error information, and first, and second oscillators for producing the first and second complex carriers in proportion to an output of the loop filter, and providing to the first and second mixers respectively, thereby minimizing PLL
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: February 19, 2008
    Assignee: LG Electronics Inc.
    Inventor: Jung Sig Jun
  • Patent number: 7333570
    Abstract: A programmable logic device (“PLD”) is augmented with programmable clock data recover (“CDR”) circuitry to allow the PLD to communicate via any of a large number of CDR signaling protocols. The CDR circuitry may be integrated with the PLD, or it may be wholly or partly on a separate integrated circuit. The circuitry may be capable of CDR input, CDR output, or both. The CDR capability may be provided in combination with other non-CDR signaling capability such as non-CDR low voltage differential signaling (“LVDS”). The circuitry may be part of a larger system.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: February 19, 2008
    Assignee: Altera Corporation
    Inventors: Edward Aung, Henry Lui, Paul Butler, John Turner, Rakesh Patel, Chong Lee
  • Patent number: 7333571
    Abstract: A concatenated coding scheme, using an outer coder, interleaver, and the inner coder inherent in an FQPSK signal to form a coded FQPSK signal. The inner coder is modified to enable interactive decoding of the outer code.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: February 19, 2008
    Assignee: California Institute of Technology
    Inventors: Marvin K. Simon, Dariush Divsalar
  • Patent number: 7333572
    Abstract: In a method for equalization of a data signal based on the Viterbi algorithm, trellis contributions are first of all calculated for reconstructed signal values from transition metrics, and are stored in a first table memory. If a reduced trellis diagram is intended to be used as the basis for calculation of the transition metrics, decision feedback contributions are also calculated, and are stored in a further table memory. In the case of ACS operations, the first and, if appropriate, the further table memories are accessed in order to determine the reconstructed signal values.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: February 19, 2008
    Assignee: Infineon Technologies AG
    Inventors: Anish Nair, Santosh Nath
  • Patent number: 7333573
    Abstract: A method for use in an apparatus for frequency error detection and automatic frequency control detects a frequency error by utilizing known symbols other than a data signal contained in an input signal. At least two known symbols located at positions somewhat distant from each other in the input signal are extracted therefrom. A phase shift between the two known symbols in the input signal represents a frequency shift of the input signal. The frequency shift of the input signal is detected from the phase shift. A first symbol set including at least two known different symbols and a second symbol set including at least two known symbols having a different symbol distance from that of the first symbol set are extracted.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: February 19, 2008
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Kinichi Higure
  • Patent number: 7333574
    Abstract: A front-end IC is so structured that an RF circuit section and a digital demodulating circuit section are integrated in one package therein. The RF circuit section has an RF circuit section and a base band variable gain amplifier. The digital demodulating circuit section has an amplification rate control circuit. The front-end IC is also provided with an AGC signal input switch for switching between (a) inputting an internal signal, via an AGC loop, into the RF circuit section in the RF circuit section and the base band variable gain amplifier, and (b) directly supplying a test-use AGC signal, by opening the AGC loop, into the RF circuit section in the RF circuit section and the base band variable gain amplifier. The internal signal is outputted from the digital demodulating circuit section. The AGC signal input switch is switched over in accordance with an AGC signal input switching signal TEST.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: February 19, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Nobuyuki Ashida
  • Patent number: 7333575
    Abstract: A receiver, a system, and an associated method, for receiving a radio signal carrying transmitted data that is subject to distortion in the transmission channel. The receiver includes a plurality of stages that perform parallel interference cancellation (PIC) with respect to a received space-time transmit diversity (STTD) signal to establish successively more accurate estimates of the transmitted data, including a receiver first stage being a RAKE-STTD receiver, a second stage including an minimum mean-square error (LMMSE) equalizer, and preferably a third stage also including an LMMSE. Each stage processes the estimates of the transmitted signal provided by the stage preceding it, as well as the received signal, to mitigate or eliminate as much transmission-channel interference as possible and provide a refined estimate for processing by subsequent stages. Improved channel estimation may be achieved by processing the pilot signal in similar fashion as well.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: February 19, 2008
    Assignee: Nokia Corporation
    Inventors: Panayiotis D. Papadimitriou, Prabodh Varshney