Abstract: A digital-to-analog converter adapted for use as a feedback converter in a continuous time sigma delta analog-to-digital converter. The digital-to-analog converter has a discrete time digital signal input accepting digital signal samples that are synchronized with an assertion of a first data clock signal and a discrete time clock generator that generates an output pulse in response to receiving an assertion of the first data clock. The output pulse is asserted for a fixed duration that is independent of a jitter of the first data clock. The digital-to-analog converter also includes a continuous time analog output that produces, during assertion of the output pulse, a continuous time analog output signal having a magnitude corresponding to the digital signal samples.

Abstract: A delay and deglitching circuit suppresses glitches occurring in a received digital signal while introducing a predetermined delay to the signal. The deglitching circuit comprises an RC filter and a Schmitt trigger. A node at the input of the Schmitt trigger fed by the RC filter is pulled to a high supply voltage or a low supply voltage when a glitch is removed or the input signal transitions. By setting the RC filter to initial conditions, multiple glitches can be removed with the same affectivity while reducing a sensitivity of the introduced delay to supply voltage variations.

Abstract: A clock distribution circuit for suitably generating, transmitting, and receiving clock signals used in circuits that are configured with the same circuit topology is provided. The clock distribution circuit has a transmission buffer circuit that transmits a clock signal and an amplitude amplification buffer circuit that amplifies the amplitude of cross-coupling connections inserted in parallel with the transmission buffer circuit on a transmission path for the clock signal. Wherein the number of transistors having the same conductivity type as the transistors of a differing conductivity type of the transmission buffer circuit and that of the transistors of a differing conductivity type of the amplitude amplification buffer circuit are the same. At least one transistor is provided as a bias adjustment transistor for adjusting bias in each of the transmission buffer circuit and the amplitude amplification buffer circuit, respectively, and bias adjustments are made simultaneously.

Abstract: A charge pump clock generating circuit and a method thereof are disclosed. The circuit includes a sync counter, a comparator, and a clock generating circuit. The sync counter receives a dot clock and a reset signal for accumulating a counting value according to the dot clock and resetting the counting value to a starting value when the reset signal is enabled. The comparator receives the counting value and outputs the reset signal when the counting value is greater than or equal to a preset value. The clock generating circuit receives a display clock and the reset signal and outputs a charge pump clock. The clock generating circuit transforms the logic state of the charge pump clock when the reset signal is enabled, and sets the charge pump clock to a first preset logic state when the display clock is transformed from a first state to a second state.

Abstract: An apparatus comprising a first circuit, a second circuit and a third circuit. The first circuit may be configured to generate a video input signal having a voltage. The second circuit may have a finite input resistance configured to generate a current in response to presenting the voltage across the finite input resistance. The third circuit may be configured to cancel the current by (i) generating the current in response to presenting the voltage across a replica resistor having a resistance similar to the finite input resistance and (ii) passing the current away from the apparatus.

Abstract: A power supply detection circuit biased by at least two power supply voltages for controlling a signal driver circuit. Upstream and downstream amplifiers, powered by upstream and downstream power supply voltages, respectively, process an original control signal to produce a differential signal via output signal electrodes. Capacitances coupling respective ones of the output signal electrodes to the downstream power supply voltage and the circuit reference potential discharge and charge respective ones of the output signal electrodes in relation to initial receptions of the upstream and downstream power supply voltages and original control signal, following which voltage clamp circuitry maintains such discharged and charged states pending reception of the original control signal in a predetermined state.

Abstract: A level shifter circuit, which includes a Schmitt trigger function, shifts voltage of a high level signal into a low voltage and shifts a signal at an intermediate value of an input voltage. The level shifter circuit includes an input terminal connected to low and high voltage circuits. The low voltage circuit outputs a low drive voltage or ground voltage. The high voltage circuit outputs a high drive voltage or a high reference voltage, which is supplied to an RS latch circuit via a potential adjustment circuit at a level equal to an output potential at the low voltage circuit. The RS latch circuit uses the output of the potential adjustment circuit when the input voltage shifts to a high level and uses the output of the low voltage circuit when the input voltage shifts to a low level.

Abstract: The composing circuit outputs a lower voltage out of voltages output from the constant voltage generation circuit and the dummy pump circuit as a voltage to the sensing circuit. The sensing circuit compares voltages to generate a pump activation signal for activating the pump circuit. Since when an external power supply voltage is a low voltage, the voltage applied to the sensing circuit will be an output voltage of the dummy pump circuit having the same output characteristics as those of the pump circuit in place of the reference voltage, no pump activation signal is generated. As a result, when the external power supply voltage is a low voltage, power consumption can be suppressed without uselessly outputting a pump activation signal.

Abstract: An exponential charge pump uses a number of identical or similar charging stages, each having a first and second capacitor. During a first clock phase, the first capacitor of each stage is charged by the second capacitor of the preceding stage, and, during a complementary second clock phase, the positive plate of the first capacitor of each stage is pushed to an increased voltage by the first capacitor of the preceding stage and charges the second capacitor of the next stage to the increased voltage at the same time. A similar mechanism occurs to the second capacitors in each stage, but with complementary timing. The increased voltage of the first capacitor of the last stage is pumped to an output capacitor during the second clock phase, and the increased voltage of the second capacitor of the last stage is pumped to an output capacitor during the first clock phase.

Abstract: An FSK demodulator system with tunable spectral shaping including a pair of quadri-correlators responsive to first and second quadrature signals, one of the pair deriving first and second signals representative of the frequency deviation of the quadrature signals at even integer multiples of the frequency deviation and for resolving the modulated FSK data represented by the quadrature signals and the other of the pair deriving first and second signals representative of the frequency deviation of the quadrature signals at odd integer multiples of the deviation frequency and for resolving the modulated FSK data represented by the quadrature signals, and a delay control circuit for setting a delay to each of the pair of quadri-correlators to control the first and second signals representative of the frequency deviation of the quadrature signals derived by each of the pair of quadri-correlators and generate a tuned spectral response at both even and odd integer multiples of the frequency deviation.

Abstract: A pyroelectric demodulating detector (also termed a pyroelectric demodulator) is disclosed which utilizes an electrical resistor stacked upon a pyroelectric element to demodulate an rf or microwave electrical input signal which is amplitude-modulated (AM). The pyroelectric demodulator, which can be formed as a hybrid or a monolithic device, has applications for use in AM radio receivers. Demodulation is performed by feeding the AM input signal into the resistor and converting the AM input signal into an AM heat signal which is conducted through the pyroelectric element and used to generate an electrical output signal containing AM information from the AM input signal.

Abstract: A method of varying the gain of an amplifier and an amplifier array are provided. The amplifier array includes two or more amplifier stages (201, 202) connected in parallel with each amplifier stage having a gain control means. Input signal means (203, 204) are provided for each amplifier stage with the input signals of the amplifier stages being of different amplitude. Means for enabling and disabling an amplifier stage (216) are provided and means for summing the outputs of the enabled amplifier stages obtain an output signal (212).

Abstract: A vacuum tube circuit is capable of amplifying an input signal with use of a low source voltage. Ordinarily, the amount of electrons released from a cathode which is heated by a heater is small since a voltage supplied to the heater is low. In the vacuum tube circuit disclosed here, a positive voltage is supplied to a grid terminal, which more effectively attracts the emitted electrons, thereby increasing the amount of electrons arriving at the plate terminal passing through the grid. As a result, a grid current and a plate current flow in the vacuum tube circuit, which achieves an operation for amplifying an input signal from a signal source.

Abstract: An auto gain control circuit comprises a first peak detector, a variable gain amplifier, a second peak detector, a multiplexer and a controller. The first peak detector detects peaks of an input signal to generate a first peak signal. The variable gain amplifier amplifies the input signal to generate an output signal according to a control signal. The second peak detector detects peaks of the output signal to generate a second peak signal. The multiplexer selectively outputs the first peak signal or the second peak signal according to a first control signal. The controller generates the control signal according to the second peak signal and the first peak signal or according to the second peak signal and the reference voltage.

Abstract: A high output power amplifier with change of voltage transformation ratio of a transformer is disclosed. The high output power amplifier using a transformer installed to output leads thereof, which can increase dynamic range and efficiency thereof as voltage transformation ratio of the transformer is adjusted and load resistance is adjusted so as not to generate signal distortion phenomenon and not to decrease its efficiency.

Abstract: An amplifier circuit includes a first transistor having a control terminal that receives a first amplifier input, a first terminal, and a second terminal. A second transistor includes a control terminal that receives a second amplifier input, a first terminal, and a second terminal that communicates with the second terminal of the first transistor. A differential transimpedance amplifier includes a first input that communicates with the first terminal of the first transistor, a second input that communicates with the first terminal of the second transistor, a first output, and a second output. A differential output amplifier includes a first input that communicates with the first output of the differential transimpedance amplifier, a second input that communicates with the second output of the differential transimpedance amplifier, a first output, and a second output.

Abstract: According to one or more aspects of the present invention, an amplifier arrangement is disclosed. The arrangement comprises a first, a second and a third amplifier. The first and second amplifiers are coupled to one another such that they form a negative feedback loop. In addition, an output node of the first amplifier is connected to a signal input of the third amplifier. An output node of the third amplifier circuit forms the amplifier output of the amplifier arrangement. In addition, the third amplifier circuit is designed for switchably changing its gain on the basis of a signal at an actuating input of the amplifier arrangement.

Abstract: An improved traveling wave amplifier is disclosed. The improvements to the traveling wave amplifier disclosed include designing the drain-to-drain and gate-to-gate transmission lines as coupled pairs thereby coupling energy back to the input from the output. The result is increased bandwidth without an increase in device count or resorting to a cascade configuration.

Abstract: An amplifier includes a ground, first and second MOS transistors, a first resistive load and a supply voltage, which are connected in series in this order. A bias circuit provides first and second bias voltages to the gate electrodes of the first and second transistors, respectively. The bias circuit includes a third MOS transistor having its gate and drain electrode diode-connected. The drain electrode of the third transistor provides the first bias voltage of the amplifier. The bias circuit further includes fourth and fifth MOS transistors, and a second resistive load, which are connected in series in this order. The second resistive load is connected to the supply voltage. The fourth transistor has its gate electrode connected to the drain electrode of the third transistor. The fifth transistor has its gate and drain electrodes diode-connected. The drain electrode of the fifth transistor provides the second bias voltage.

Abstract: A pipelined analog to digital converter includes a first stage that receives an input voltage, that generates a first sampled digital value and a first residue voltage, and that includes a first amplifier that amplifies the first residue voltage and generates a first amplified residue voltage. A second stage receives the first amplified residue voltage, generates a second sampled digital value and a second residue voltage, and includes a second amplifier that amplifies the second residue voltage. At least one of the first amplifier and the second amplifier comprises a first transistor having a control terminal, a first terminal, and a second terminal, a second transistor having a control terminal, a first terminal, and a second terminal that communicates with the second terminal of the first transistor, a differential transimpedance amplifier and a differential output amplifier.

Abstract: A first receiver frequency reference is passively coupled to a second receiver by tapping a signal directly from the resonant element, such as a crystal, of an oscillator in the first receiver to drive the input of the second receiver. The sinusoidal signal from the resonant element is relatively free of harmonics and minimizes interference that could be caused by harmonics of a square wave signal coupling or an amplified signal. The oscillator of each receiver can be selectively enabled or disabled to allow the receiver to either generate or receive the frequency reference. This technique of coupling can be used to couple a frequency reference signal between integrated circuit receivers.

Abstract: A spectrum analyzer corrects for internal frequency errors in a reference oscillator using a timing control signal. The reference oscillator provides a reference signal at a reference frequency. An error detection circuit determines an error in the reference frequency using the timing control signal and produces an error correction signal for use by a frequency conversion device in adjusting an output frequency thereof to compensate for the frequency error in the reference frequency.

Abstract: A digital PLL system includes a first multiplier coupled to a phase difference signal for multiplying the phase difference signal by a first gain factor; a second multiplier coupled to the phase difference signal for multiplying the phase difference signal by a second gain factor; a digital loop filter coupled to the first multiplier and the second multiplier for providing an integral signal and a proportional signal and for generating a control signal according to the integral signal and the proportional signal; and an auto-gain control (AGC) unit coupled to the first multiplier, the second multiplier, and the digital loop filter. The AGC unit further comprises a first control unit for updating the first gain factor according to the integral signal; and a second control unit for updating the second gain factor according to the proportional signal.

Abstract: A redundant clock source provides a stable clock source for digital system. The clock source uses two oscillators to generate a clock signal. If one of the oscillators fails, the clock signal is generated from the other oscillator until the failed oscillator is replaced. Special filtering of the waveforms produced by the oscillators makes the clock source is resistant to jitter from the oscillators and transients that occur when an oscillator fails. This allows the clock source to not only use a redundant oscillator in an attempt to eliminate a single point of failure, but to also provide a stable clock signal even if one oscillator fails.

Abstract: The present invention provides a current-limited oscillator capable of performing stable operation even when it is driven with a low power-supply voltage, and a charge pump circuit using the oscillator. A current-limited oscillator has a delay section that includes a plurality of series-connected inverters to delay an output pulse on the basis of a current limiting level indication signal, and the oscillator further includes at least one first transistor that limits a first current between the inverters and a high potential power supply and at least one second transistor that limits a second current between the inverters and a low potential power supply, wherein at least one of the plurality of inverters is configured as a first inverter that is connected with the first transistor and is not connected with the second transistor, and at least another of the plurality of inverters is configured as a second inverter that is not connected with the first transistor and is connected with the second transistor.

Abstract: A ring oscillator and a phase error calibration method are provided. The ring oscillator may include a first voltage-current converter for controlling and outputting an amount of tail current Itail according to a magnitude of a first control voltage applied in feedback in a PLL circuit; a second voltage-current converter for controlling and outputting an amount of shift current according to a magnitude of a second control voltage applied from a system phase error detector; and differential amplifiers for controlling, for output signals, a delay time of signals based on the applied tail current amount and a shift time of the signals based on the shift current amount. Thus, a phase relation between in-phase and quadrature-phase signals outputted from the ring oscillator may be controlled.

Abstract: A quadrature signal generator capable of phase-tuning with respect to all of four generated quadrature signals. The quadrature signal generator includes four phase tuning units each having two input terminals, one receiving a differential signal, the other being grounded, and changing a phase of the differential signal to thereby generate quadrature signals. Accordingly, it is possible to tune phases of all the four generated quadrature signals. It is also possible to prevent the amplitude of quadrature signals from being deviated from a reference value.

Abstract: A voltage-controlled oscillator including a voltage-controlled oscillation section, a frequency control bias circuit, a temperature compensation bias circuit, and a temperature compensation bias generation circuit. The temperature compensation bias generation circuit has a transistor having its collector or drain connected to the temperature compensation bias circuit, a first resistor having one end connected to the collector or drain of the transistor and having another end that is grounded, a second resistor having one end connected to the base or gate of the transistor, a base or gate bias application terminal connected to another end of the second resistor, a third resistor having one end connected to the emitter or source of the transistor, and an emitter or source bias application terminal connected to another end of the third resistor.

Abstract: A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL.

Abstract: A non-uniform transmission line, including at least a first section with length L1, uniform width W1 and thickness h1, and a second section with length L2, uniform width W2 and thickness h2, joined together to form a composite structure and arranged in any of at least three distinct configurations. The composite structure (first section plus second section) may be periodic or non-periodic. Length and/or width and/or thickness of each of the two sections may be varied to provide desired values for characteristic impedance, cutoff frequency and/or time delay for signal propagation.

Abstract: Provided are a digitally controlled circulator and a radio frequency identification (RFID) reader having the circulator. A power splitter is composed of lumped elements and the values of the elements are digitally changed using switching means, in which the transmission loss of a signal is controlled according to whether the reader is in a transmission state or a reception state. Therefore, the loss can be minimized, and the circulator can be miniaturized and priced down by an integrated circuit (IC) semiconductor process and mounted in a mobile terminal such as a cellular phone.

Abstract: A radiation noise suppression circuit for a differential transmission line includes a differential transmission line which has plus line signal wiring to which a plus line signal of a differential signal is applied, and minus line signal wiring to which a minus line signal of the differential signal is applied, and connects a differential driver and a differential receiver. Plus line signal GND wiring and minus line signal GND wiring which are connected between the differential driver and the differential receiver are wired along the differential transmission line. A distance between the plus line signal wiring and the plus line signal GND wiring is substantially equal to a distance between the minus line signal wiring and the minus line signal GND wiring.

Abstract: A waveguide orthomode transducer. In a first layer a turnstile junction having a main waveguide and four waveguide ports, and four hybrid tees each have an e-port, two opposed side-ports, and an h-port. The hybrid tees are ring-arranged around the turnstile junction so the waveguide ports each communicate with one h-port, so adjacent hybrid tees inter communicate with their respective side-ports, and so the e-ports form two sets of opposed e-ports. In a second layer two h-plane power dividers/combiners each have an axial-port and two opposed side-ports. The h-plane power dividers/combiners are arranged so their respective side-ports communicate with different ones of the two sets of opposed e-ports and so their axial-ports are polarization ports. This permits a single signal with two fundamental orthogonally polarized modes to enter the main waveguide and exit separated at the polarization ports vice versa.

Abstract: A multilayer chip-type triplexer is provided. It uses four-session matching transmission lines to integrate three band-pass filters at different frequency bands for simplifying triplexer design. A band-pass filter may be composed of a two-stage combline band-pass filter. The transmission zero generated by the two-stage combline band-pass filter is to increase the isolation and performance of the triplexer. The triplexer uses low-loss materials to reduce the insertion loss of the circuit Moreover, a multilayer structure is adopted to minimize the size of the triplexer. The triplexer is applicable to multiband radio-frequency modules, and meets the multimodule requirement for wireless communication products.

Abstract: A method for configuring a microwave multiplexing network having a first channel filter and a second channel filter and an interconnect in order to improve channel performance. The top ends of the first and second channel filters are coupled to the closer of the top and bottom surfaces of the interconnect according to interconnect spacing values and filter to interconnect values. Interconnect values and filter to interconnect values are determined by selecting interconnect spacing values and filter to interconnect values to ensure that a pole is formed causing an additional real reflection zero to be brought into the passband of the microwave multiplexing network thereby increasing the filter order by one. Then interconnect spacing values and filter to interconnect values as well as the internal filter dimensions are selected to ensure that the return loss of the microwave multiplexing network is less than a predetermined return loss level.

Abstract: A small-size electromechanical filter that can be highly integrated and can be tuned is provided. An electromechanical filter includes a conductor acting as a signal line (movable electrode) 101, a magnetic field generating portion 102 for generating a magnetic field passing through the conductor, and a drive electrode 103 for changing the magnetic field passing through the signal line by displacing relative positions of the conductor and the magnetic field generating portion, whereby a tuning of a ferromagnetic resonance frequency, which is difficult to realize in the prior art, can be realized by changing the magnetic field passing through the signal line.

Abstract: A surface acoustic wave filter includes a device chip, one principal surface of a piezoelectric substrate having a wiring pattern including IDTs and pads electrically connected to the IDTs, that is disposed so as to oppose a mount board, with the pads being electrically connected to lands of the mount board through bumps. A resin film covers the other principal surface of the piezoelectric substrate and the principal surface of the mount board to seal the device chip. In the piezoelectric substrate, the area of the one principal surface is greater than the area of the other principal surface.

Abstract: A balanced filter suitable for a reduction of the filter size. The balanced filter comprises strip-line resonators (SL1a, SL1b) constituting resonance electrodes on the unbalanced side, strip-line resonators (SL2a, SL2b) disposed in adjacently opposed relation to the strip-lines on the unbalanced side and constituting resonance electrodes on the balanced side, strip-line resonators (SL3a, SL3b) disposed in adjacently opposed relation to the strip-lines on the balanced side and constituting stage constituting resonance electrodes, and impedance elements (Z) coupling the resonance electrodes on the balanced side to the stage constituting resonance electrodes.

Abstract: An embodiment of the present invention provides an apparatus, comprising a tunable filter with a plurality of bond wires connecting voltage tunable dielectric capacitors to an RF ground and serving as inductors, wherein inductive coupling between the plurality of bond wires serve as coupling between resonators within the tunable filter. The voltage tunable dielectric capacitors may be integrated onto a single MgO chip thereby providing a complete set of tunable capacitors for a filter circuit in a low cost, compact package.

Abstract: A filter includes a resonant unit which has a plurality of resonators respectively formed of each microstrip line and connected in cascade with one another, and a coupling unit which has at least one inter-resonator coupling of the resonant unit in an area within a range of ±45° (?-wavelength) in an electrical length from a voltage maximum point at a intermediate of the microstrip line.

Abstract: A coupling structure for coupling to a circuit portion (6) in a coplanar-waveguide circuit (1) having ground conductors (2, 3) at both sides is disclosed. A signal input/output line (4) is provided at the center of the coplanar-waveguide circuit; and an inductive coupling portion (5) having an end of the signal input/output line short-circuited to one of the ground conductors and facing a part of the circuit portion via a first gap is also provided.

Abstract: A high-frequency dielectric ceramic composition that has excellent dielectric properties, such as a large ?r, a large Q-value, and a small absolute value of ?f, even in a high-frequency region, such as a microwave region or a millimeter wave region, and that can be fired at 1400° C. or less, which is much lower than before, is provided. The high-frequency dielectric ceramic composition contains 100 parts by weight of main component and 0.005-0.300 parts by weight (on a B2O3 basis) of accessory boron compound. The main component has a composition formula of (1?y)xCaTiaO1+2a?(1?y)(1?x)Ca(M1z/3M22/3)bO1+2b-yLnAlcO(3+3c)/2, wherein x and y denote moles , and x, y, z, a, b, c, and ? (wherein ?=(1?y)x) satisfy the following relationships: 0.56?x?0.8, 0.08?y?0.18, 0.980?z<1.000, ??0.65, 0.985?a?1.05, 0.9?b?1.02, and 0.9?c?1.05.

Abstract: A trip unit in a miniature circuit breaker includes a magnetic yoke and a bimetal mounted on the outside of the yoke. The bimetal is welded at one end to a load terminal that leads to a terminal connector and at the other end to a pigtail. The pigtail, instead of the bimetal, passes through the yoke for connection to the blade of the circuit breaker. To induce a higher magnetic field for faster tripping, a second pigtail may be passed through the yoke in which one end of the second pigtail is connected to the load terminal near the terminal connector and the other end is connected to the bimetal near the load terminal connection point. The load terminal may include at least two parts, one part including the adjustment screw and the other part including the terminal screw. These parts may be separated by air or an insulator.

Abstract: The invention relates to a coil component used as a main component of a common mode choke coil or a transformer and a method of manufacturing the same, and the invention is aimed at providing a coil component with a small size and a low height having high differential transmission characteristics and a method of manufacturing the same. A common mode choke coil has a configuration in which an insulation film, a coil conductor, another insulation film, another coil conductor and another insulation film are stacked in the order listed between magnetic substrates provided opposite to each other. The coil conductors have a coil section which is in a trapezoidal general configuration. A top portion of the coil section is formed in a convex configuration such that it bulges in the form of a convex, and a bottom portion of the coil section is formed in a planar configuration.

Abstract: The superimposition characteristics are improved in an inductance device provided with coils having sections with different numbers of windings. The inductance device includes a ring-shaped coil having n winding section 31 in which the number of windings is n and n+1, magnetic circuit materials mounted within and without the ring of aforementioned coil through which magnetic flux is passed to form a magnetic circuit, and a magnetic gap that blocks either the magnetic flux that was formed so as to surround aforementioned n winding section 31 or the magnetic flux that was formed so as to surround aforementioned n+1 winding section 32.

Abstract: Disclosed is a coil component having a magnetic core that is made of a magnetic material, and a terminal electrode portion and a coil portion that are made of a conductive material, wherein the coil components is configured such that the magnetic material and the conductive material contact with each other, and there is a relation of RM?20ZO when an insulation resistance of the magnetic core is RM (?) and a peak impedance of the coil component is ZO (?).

Abstract: An improved winding base structure of a transformer is assembled by combining a primary-side winding base and a secondary-side winding base. The selection of the material of the primary-side winding base and the secondary-side winding base is dependant on the compression-resistant capability because the primary-side input and the secondary-side output of the transformer bear different voltages. The outside of the assembled winding base is disposed with grooves in which the wires are wound, and the center of the winding base is disposed with a through hole for an iron core to be put therein to form a transformer. The sectional winding base of the subject application is characterized in that the primary-side winding base is made of lower compression-resistant material and the secondary-side winding base is made of higher compression-resistant material. Therefore the production cost of the winding base is reduced.

Abstract: In substrate-mounting type inductor having a winding having conductivity, a core on which the winding is winded, and a terminal portion arranged at an end of the winding, a recessed portion which is recessed in a direction of height of the core is formed on a substrate mounting surface of the core, and the terminal portion is arranged to be housed in the recessed portion through an insulating member.

Abstract: A thermally actuated device, such as an electrical circuit breaker (10) is provided with an ambient temperature compensation thermostat metal member (38) selected so that it bends when subjected to changes in temperature and compensates for ambient temperature effects on a thermostat metal trip arm for a selected current rating. Movement of such thermostat metal member is directly proportional to the flexivity of the material and to the square of the length of the member and indirectly proportional to the thickness of the member. Since packaging constraints make changes in length impractical, compensation members used to provide temperature compensation for different current ratings of the device typically have been made by using members of different thickness.

Abstract: A load sensor includes a substrate, a glass layer provided on the substrate, a wiring provided on the glass layer, an adjusting layer provided on the glass layer, and a strain-sensitive resistor element provided on the adjusting layer and connected to the wiring. A thermal expansion coefficient of the adjusting layer is closer to that of the strain-sensitive resistor element than that of the glass layer. In this load sensor, a stress remaining inside the resistor element is reduced, and the change over time of the resistance of the element is accordingly suppressed. Therefore, a single kind of the resistor element can be formed on substrates having respective thermal expansion coefficients, shapes, and thicknesses, thereby providing various load sensors having respective specifications.