Patents Issued in December 30, 2008
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Patent number: 7471062Abstract: Batteries in portable electrical or electronic devices are charged, through by a wireless battery charger, having an intermediate electrical energy storage device that is charged from a non-power line connected source, and discharged to recharge the battery of a portable device placed into a charge port of the wireless battery charger. The non-power line connected source may be a solar cell for converting light impinging on the solar cell into electrical energy. The non-power line connected source may also be a fuel cell for converting a fuel into electrical energy. The wireless battery charger may also include multiple sources, such as both a solar and a fuel cell. Charging the intermediate electrical energy storage device from the non-power line connected source may take place over an extended period of time having a duration longer than the time required to charge the battery of the portable device.Type: GrantFiled: June 12, 2002Date of Patent: December 30, 2008Assignee: Koninklijke Philips Electronics N.V.Inventor: Gert W. Bruning
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Patent number: 7471063Abstract: An electrical component, such as, for example, a radio, an audio component, a battery charger or a radio/charger. The electrical component includes a housing and an electrical circuit supported by the housing. In some aspects, the electrical component is an audio component and the electrical circuit is an audio circuit. In other aspects, the electrical component is a battery charger and the electrical circuit is a charging circuit. In further aspects, the electrical component is an audio and battery charger combined and the electrical circuit is an audio and charging circuit. A battery may be connectable to the housing and electrically connectable the electrical circuit. The electrical component may include a locking assembly operable to lock the battery in a position relative to the housing. A biasing member may be positioned within a receptacle defined by the housing and operable to bias the battery out of the receptacle.Type: GrantFiled: June 8, 2005Date of Patent: December 30, 2008Assignee: Milwaukee Electric Tool CorporationInventors: Jonathan A. Zick, George L. Santana, Jr., David J. Rozwadowski, Jeffrey M. Zeiler
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Patent number: 7471064Abstract: A battery ECU controls a main battery composed of a plurality of battery cells connected to each other in series. The battery cells are grouped into cell blocks each having a cell-block monitor circuit. A control unit controls charging/discharging processes on the basis of signals output by the cell-block monitor circuit. A signal output by a cell-block monitor circuit on a high-voltage side turns on a transistor for propagating a signal to a cell-block monitor circuit on a middle-voltage side. In the cell-block monitor circuit on a middle-voltage side, the propagated signal turns on another transistor for further propagating a signal to a cell-block monitor circuit on a low-voltage side. In the cell-block monitor circuit on a low-voltage side, the propagated signal turns on a further transistor for outputting a signal to a control unit.Type: GrantFiled: February 8, 2005Date of Patent: December 30, 2008Assignee: Denso CorporationInventors: Satoshi Sobue, Tomohisa Yamamoto
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Patent number: 7471065Abstract: A multi-series battery control system comprises a unit battery cell of which unit consists of multiple battery cells, control IC comprising a control IC chip containing a control circuit for controlling the unit battery cell and a cell monitor IC chip for monitoring the voltage of the unit battery cell, and main controller that sends and receives signal to/from the control IC via insulation of which cell monitor IC chip and control IC chip are paired to control the unit battery cell.Type: GrantFiled: April 29, 2005Date of Patent: December 30, 2008Assignee: Shin-Kobe Electric Machinery Co., Ltd.Inventors: Akihiko Emori, Shigeyuki Yoshihara, Kazuyoshi Sasazawa, Tatsuo Horiba, Akihiko Kudo
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Patent number: 7471066Abstract: A battery charging system uses power line carrier communications, for communicating battery state information associated with charging batteries, between a battery charger and a battery management system (BMS) located on the battery or battery pack. The power line carrier includes transmitters and receivers transmitting and receiving battery state information, such as current, voltage and temperature, as digital signals on existing cable conductors located between the battery/battery pack and the battery charger. The battery management system (BMS), which is physically located on the battery pack, receives the information from the power line carrier, in order to measure a variety of parameters relating to charging the battery, which may be a motor vehicle battery or a battery for operating machinery, such as fork lifts, bulldozers and other earth moving and product transportation vehicles.Type: GrantFiled: December 22, 2005Date of Patent: December 30, 2008Assignee: Odyne CorporationInventors: Joseph Mario Ambrosio, Konstantinos Sfakianos
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Patent number: 7471067Abstract: A battery remaining capacity detection method calculates a remaining capacity of a battery having the possibility that a memory effect occurs by using correlation between an voltage V0 and the remaining capacity. Correlation between a reset voltage Vo reset that is obtained by subtracting a value obtained by multiplying an occurrence amount Vm based on the memory effect by a memory effect occurrence amount correction value C(SOC) from an initial voltage Vo ini and the remaining capacity is obtained, in the battery after use, based on correlation between the initial voltage Vo ini and the remaining capacity. The remaining capacity is obtained by setting the voltage V0 of the battery after use as the reset voltage V0 reset. This method provides precise battery detection without completely discharging.Type: GrantFiled: January 10, 2006Date of Patent: December 30, 2008Assignee: Sanyo Electric Co., Ltd.Inventors: Shigeto Tamezane, Kenshi Matsumoto
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Patent number: 7471068Abstract: A charger for ultracapacitors that allows many ultracapacitors, that may be connected in several different configurations, to be charged from a very low voltage to their rated voltage very rapidly without cell damage. The charger also allows for the detection of failed cells.Type: GrantFiled: November 3, 2006Date of Patent: December 30, 2008Assignee: Ivus Industries, LLCInventor: Erik J. Cegnar
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Patent number: 7471069Abstract: A voltage raising device that provisionally maintains an operation and function when there is an abnormality provided. If a battery voltage drops when an engine is restarted after an idle stop, the voltage raising device raises the output voltage to a target voltage by using a voltage detecting circuit and a current detecting circuit. If an overcurrent determining circuit detects overcurrent, a switching control circuit reduces the target voltage to perform a control. If overvoltage is output, for example, due to an increased target voltage caused by an internal setting deviation resulting from a failure, an overvoltage detecting circuit outputs a prohibition signal ENV to stop the switching operation. However, as long as the output voltage is not overvoltage, the voltage raising operation is allowed. Therefore, the possibility that the engine can be started at least once without a problem is increased.Type: GrantFiled: February 11, 2005Date of Patent: December 30, 2008Assignee: Toyota Jidosha Kabushiki KaishaInventors: Hironobu Kusafuka, Shouji Abo, Yoshitaka Ojima, Yusuke Moritani
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Patent number: 7471070Abstract: A step-up switching power supply unit for generating a predetermined output voltage through a feedback control of its output voltage based on a first detection voltage indicative of the output voltage. The power supply unit is adapted to monitor a second detection voltage associated with the output voltage that is compared with a reference voltage. Open-circuit malfunction arising from, for example, connection failures within the power supply unit can be detected by determining whether the second detection voltage is lower than the reference voltage or not. In the event that open-circuit malfunction has taken place, the switching signal controlling the power supply unit is promptly stopped, thereby preventing abnormal rise of the output voltage (i.e. over-voltage).Type: GrantFiled: June 15, 2007Date of Patent: December 30, 2008Assignee: Rohm Co., Ltd.Inventor: Tasuki Nishino
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Patent number: 7471071Abstract: One embodiment of the invention is a hybrid boost regulator that includes a conventional boost regulator chip that operates when its input voltage is above 2.5 volts and a pre-boost circuit that operates when its input voltage is above 1 volt. A single 1.5 volt battery may be used to power the hybrid boost regulator. The pre-boost circuit is connected to the voltage input terminal of the boost regulator chip. The pre-boost circuit boosts the battery voltage (e.g., 1.5v) at an output terminal of the hybrid boost regulator to approximately the minimum operating voltage (e.g., 2.5v) of the boost regulator chip. Since this pre-boosted voltage is applied to the voltage input terminal of the boost regulator chip, the boost regulator chip will become operational when the ramping output voltage of the hybrid boost regulator exceeds about 2.5 volts. Once the boost regulator chip is operational, the pre-boost circuit is then turned off, and the boost regulator chip runs off the 1.Type: GrantFiled: November 28, 2006Date of Patent: December 30, 2008Assignee: Micrel, Inc.Inventors: Wendy Ng, Charles Vinn, Ramesh Selvaraj
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Patent number: 7471072Abstract: In a switched mode power supply (SMPS) then selectively operates in continuous current mode (CCM) and discontinuous current mode (DCM), the minimum switching frequency of the SMPS is adjusted by setting a minimum duration for DCM operation. A resistance value applied to an external pin of the SMPS controls the duration of a timer that is reset in CCM and activated upon entering DCM. Upon expiration of the variable duration, the SMPS reverts to CCM for at least one switching cycle. This allows the SMPS minimum effective switching frequency to be set, for each application in which the SMPS is deployed, at a level that avoids audible noise (but which may be lower than an ultrasonic frequency), thus taking maximum advantage of the efficiencies of DCM operation under light load conditions.Type: GrantFiled: October 16, 2006Date of Patent: December 30, 2008Assignee: Semtech CorporationInventors: John Kenneth Fogg, Yin-Chih Yang
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Patent number: 7471073Abstract: A method of finding a power maximum of a photovoltaic generator using an MPP regulator of a photovoltaic current converter by means of which a maximum generator power is set at an operating point of the generator's characteristic curve is intended to supply improved efficiency when the generator is partially shadowed. This is achieved by switching the MPP regulator off in order to next load and/or unload the generator to allow a new operating point of the generator's characteristic curve to set and by next switching the MPP regulator on again.Type: GrantFiled: July 11, 2006Date of Patent: December 30, 2008Assignee: SMA Technologie AGInventors: Gerd Bettenwort, Christian Kühnel, Oliver Arend, Joachim Ralf Laschinski, Gerald Alexander Leonhardt, Wolfgang Kurt Reichenbächer
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Patent number: 7471074Abstract: An apparatus includes a first voltage reference circuit, a second voltage reference circuit and a third circuit that is coupled to the second voltage reference circuit. The first voltage reference circuit provides a first reference voltage between a terminal of the first voltage reference circuit and a first power line. The second voltage reference circuit provides a second reference voltage between a terminal of the second voltage reference circuit and a second power line that is separate from the first power line. The third circuit is coupled to the second voltage reference circuit to establish a magnitude of the second reference voltage in response to a potential difference between the terminal of the first voltage reference circuit and the second power line.Type: GrantFiled: October 29, 2004Date of Patent: December 30, 2008Assignee: Silicon Laboratories Inc.Inventor: Vishnu S. Srinivasan
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Patent number: 7471075Abstract: A testing system includes a hand-held transmitter that plugs into a receptacle electrically coupled to a selected branch circuit. The transmitter includes a circuit effective to test an arc fault circuit interrupter electrically coupled to the branch circuit by creating a first pulse on the branch circuit that is effective to trip the arc fault circuit interrupter. The transmitter can perform an additional test of determining whether the receptacle is wired properly.Type: GrantFiled: April 8, 2004Date of Patent: December 30, 2008Assignee: Unique Technologies, LLCInventors: Kerry Berland, Mitchell Budniak, Paul Berland, Ronald A. Coia, Thomas McGann
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Patent number: 7471076Abstract: The present invention discloses apparatus and method for rapidly and easily measuring the numbers and size distribution of low concentration particles which exist in a clean space such as a clean room. The apparatus and method according to the present invention measures the numbers of particles by charging particles to a monopolarity, collecting the particles by applying a voltage to an electrode and attaching the charged particles of a certain size or less thereto, separating the charged particles of the certain size or more according to size by the particle separating ducts. The apparatus for measuring the number of particles according to the present invention makes it possible to obtain a size distribution of particles in the air by a single measurement and to rapidly and easily measure it even though the number of the particles in the air is small.Type: GrantFiled: February 14, 2005Date of Patent: December 30, 2008Assignees: Hyundai Calibration & Certification Technologies Co., Ltd.Inventor: Kang-Ho Ahn
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Patent number: 7471077Abstract: A tray transfer arm 205 capable of holding and releasing a customer tray KST is movable in a Z-axis direction by a Z-axis drive, and the Z-axis drive is capable of switching a moving operation from a normal operation to a torque restriction operation while moving the tray transfer arm 205 downward in the Z-axis direction.Type: GrantFiled: December 6, 2005Date of Patent: December 30, 2008Assignee: Advantest CorporationInventors: Kenichi Shimada, Tadashi Kainuma
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Patent number: 7471078Abstract: A stiffener assembly for use with testing devices is provided herein. In some embodiments, a stiffener for use with testing devices includes an inner member; an outer member disposed in a predominantly spaced apart relation to the inner member; and a plurality of alignment mechanisms for orienting the inner and outer members with respect to each other, wherein the alignment mechanisms transfer forces applied to a lower surface of the inner member to the outer member and provide the predominant conductive heat transfer passageway between the inner and outer members.Type: GrantFiled: December 29, 2006Date of Patent: December 30, 2008Assignee: FormFactor, Inc.Inventors: Eric D. Hobbs, Andrew W. McFarland
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Patent number: 7471079Abstract: A light-tight enclosure system, displaceable along a surface, for housing an automated microscope, having electronically controllable components and an image capturing device. The enclosure system may include device for displacement, a shelf for placement of the automated microscope, an externally viewable monitor, and a plurality of electrical power receptacles.Type: GrantFiled: August 2, 2007Date of Patent: December 30, 2008Assignee: Ikonisys, Inc.Inventors: Triantafyllos Tafas, Yash Agarwal, Youngmin Kim, Wei Guo, Richard Eberle, Joseph Turgeon, Michael Kilpatrick, Petros Tsipouras
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Patent number: 7471080Abstract: In the magnetic absolute encoder, an ordinary operating circuit and an ordinary/backup operating circuit are actuated during ordinary operation in which power is supplied from the ordinary operating power supply; the single-rotation absolute value (1) and single-rotation absolute value (2) detected by these circuits are compared by the abnormality diagnosis circuit, and the presence or absence of an abnormality is automatically judged During backup in which the ordinary operating power supply is interrupted, only the low-power-consumption ordinary/backup operating circuit is actuated, and the multiple-rotation value (2) is detected At the point in time at which the system is returned to ordinary operation, the multiple-rotation value setting circuit sets the multiple-rotation value (2) as the multiple-rotation value (1) of the ordinary operating circuit. As a result, the calculation operation of the multiple-rotation value (1) can be restarted.Type: GrantFiled: December 7, 2007Date of Patent: December 30, 2008Assignee: Harmonic Drive Systems Inc.Inventors: Kozo Sasaki, Toshiki Maruyama, Toshiyuki Abe, Muneo Mitamura
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Patent number: 7471081Abstract: A slider tester includes a driving unit that rotates a test medium, a set plate that detachably supports a slider as a single body, and an investigating apparatus that is electrically connected to the slider supported by the set plate and investigates the characteristics of the slider. A movable support part 30 that tiltably supports the slider is provided on the set plate. There is also provided a pressing mechanism that elastically presses the slider via the movable support part toward a surface of the medium to dispose the slider floating over the surface of the medium. The pressing mechanism includes an elastic body 56 composed of a plate spring that contacts the movable support part and elastically presses the movable support part.Type: GrantFiled: January 6, 2006Date of Patent: December 30, 2008Assignee: Fujitsu LimitedInventors: Norio Kainuma, Kenji Kobae, Hidehiko Kira, Hiroshi Kobayashi, Shuichi Takeuchi, Takayoshi Matsumura, Hirokazu Yamanishi, Shinji Hiraoka, Yoshiaki Yanagida
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Patent number: 7471082Abstract: A system for use when measuring a magnetostriction value of a magnetoresistive element according to one embodiment includes a mechanism for applying a first magnetic field about parallel to a substrate having one or more magnetoresistive elements, and for applying a second magnetic field about perpendicular to the substrate and about parallel to magnetoresistive layers of the elements; a mechanism for applying a mechanical stress to the substrate during application of the magnetic fields; and a measuring subsystem for measuring a signal from at least one of the magnetoresistive elements, wherein the second magnetic field is a magnetic alternating field, wherein the measuring subsystem is locked to a frequency of the alternating field.Type: GrantFiled: October 1, 2007Date of Patent: December 30, 2008Assignee: International Business Machines CorporationInventor: Hubert Grimm
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Patent number: 7471083Abstract: An apparatus for observing magnetic phenomena including a nonferrous planar platform, a cylinder disposed upright on the platform, magnets placed on the platform at the lower end of the cylinder, specimen suspending means disposed at the upper end of the cylinder, ferrous and nonferrous specimens selectively connected to the specimen suspending means when the other specimen is not so connected, a shaft disposed through opposing holes in the side of the cylinder, and biasing means disposed inside the cylinder between the specimen suspending means and the shaft.Type: GrantFiled: January 10, 2008Date of Patent: December 30, 2008Inventor: Ramesh L. Joshi
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Patent number: 7471084Abstract: Disclosed herein is an ELF or LF magnetic field measuring system, which can easily measure each magnetic field component existing in a free space generated by electric appliances or in a human body phantom filled with a specific fluid. A 3-axes magnetic field probe for use in the magnetic field measuring system comprises resistive lines in a protective sleeve rod electrically connected to the transmission board, an isotropic sensing head having a cubic shape, one end of the protective sleeve rod being rigidly connected to a corner point of the cubic sensing head where three faces coincide, and three bobbins adhered to three adjacent faces which coincide at a corner point diagonally opposite to the first corner point. A coil is wound on the periphery of each of the bobbins. The sensor is moved by an automatic mechanical machine to scan a pre-programmed surface where the magnetic field distribution is to the evaluated.Type: GrantFiled: January 13, 2006Date of Patent: December 30, 2008Assignees: Korea Electric Power CorporationInventors: Dong-Il Lee, Koo-Yong Shin, Seong-Doo Lee, Youn-Myoung Gimm
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Patent number: 7471085Abstract: MR based molecular imaging is strongly supported by the accurate quantification of contrast agents. According to an exemplary embodiment of the present invention, a determination unit of an examination apparatus is adapted for determining an error propagation function, wherein the error propagation function is then used as a weighting function for an accurate determination Of AR2*. This leads to an improved examination result.Type: GrantFiled: April 13, 2006Date of Patent: December 30, 2008Assignee: Koninklijke Philips Electronics N.V.Inventors: Hannes Dahnke, Tobias Schaffter
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Patent number: 7471086Abstract: The present technique provides a system and method for processing an image. Particularly the method comprises acquiring image data in frequency space (k-space) of an imaged volume and obtaining a three-dimensional (3-D) k-space volume representative of the imaged volume based on the acquired k-space data. The method further comprises selecting a two-dimensional (2-D) plane from the 3-D k-space volume and applying an inverse Fourier transform to the selected 2-D plane to obtain a real 2-D X-ray-like (or enhanced rendering) projection of the imaged volume offering insights into the 3-D data.Type: GrantFiled: April 20, 2007Date of Patent: December 30, 2008Assignee: General Electric CompanyInventor: Rakesh Mullick
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Patent number: 7471087Abstract: A NMR probe which causes only a minimum disturbance to magnetic-field uniformity, and which acquires a high resonant Q value. A detection coil 1 for detecting a nuclear magnetic resonance signal emitted from a sample 3 measured, and a compensation coil 4 composed of a superconducting material for compensating for inductance of the detection coil 1 are electrically connected in series with each other. Moreover, a tuning-dedicated variable capacitor 6 is connected to the detection coil 1 in series therewith, and a matching-dedicated variable capacitor 5 is connected to the compensation coil 4 in series therewith. Furthermore, a coaxial cable 9 is connected to both ends of the matching-dedicated variable capacitor 5. This configuration allows detection of the signal.Type: GrantFiled: October 27, 2006Date of Patent: December 30, 2008Assignee: Hitachi, Ltd.Inventors: Yuzo Fukuda, Kazuo Saitoh
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Patent number: 7471088Abstract: Cross-component measurements made with a dual-transmitter configuration are processed to estimate a distance to an interface in an anisotropic earth formation. Optionally, measurements may be made with two receivers, also in the dual transmitter configuration.Type: GrantFiled: December 9, 2005Date of Patent: December 30, 2008Assignee: Baker Hughes IncorporatedInventors: Liming Yu, Tsili Wang, Jack Signorelli
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Patent number: 7471089Abstract: An electrode array for electric and magnetic measurements in a marine environment includes a first set of electrodes connected to a first cable, wherein the first set of electrodes and the first cable are configured to sink to a sea floor in the marine environment; a second set of electrodes connected to a second cable, wherein the second set of electrodes and the second cable are connected to the first cable and configured to float in the marine environment such that the second set of electrodes and the second cable maintain a distance from the sea floor when the first cable sits on the sea floor, and an instrument package connected to the first cable and the second cable, wherein the instrument package is configured to receive voltage signals measured by the first set of electrodes and the second set of electrodes.Type: GrantFiled: April 24, 2006Date of Patent: December 30, 2008Assignee: Schlumberger Technology CorporationInventors: Andrea Zerilli, Ugo Conti, David Alumbaugh
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Patent number: 7471090Abstract: In accordance with various embodiments, there is a method for determining the capacity of a battery. Various embodiments include applying a predetermined current ramp to a fully charged lead-acid battery while measuring a battery terminal voltage. An Iup can be determined, where the Iup is a transition from charging to overcharging. A specific gravity of the lead-acid battery can also be determined. The capacity of the lead-acid battery can then be determined from the Iup using a correlation function that describes the relationship of the Iup to the capacity, where the correlation function depends on the specific gravity of the lead-acid battery.Type: GrantFiled: March 31, 2005Date of Patent: December 30, 2008Assignee: Honeywell International Inc.Inventors: Hector M. Atehortua, Steven Hoenig, Thirumalai G. Palanisamy, Harmohan N. Singh
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Patent number: 7471091Abstract: Data indicating a relationship of life of a battery to a value of load power applied to the battery in discharge and environmental temperature of a place where the battery is installed are prepared beforehand. Next, the load power and the environmental temperature when the battery is discharged are measured, and then a life value corresponding to these measured values is selected from the data so as to be set as an expected life value. Next, a first life reduction amount is calculated from a natural logarithmic function with the number-of-discharges as a variable, and the difference between the expected life value and the first life reduction amount is set to a remaining life value, on the basis of which the life of the nickel-hydride battery is determined. By this method, the life of the nickel-hydride battery as a backup power source can be accurately determined, while correction based on phenomena unique to the nickel-hydride battery is performed.Type: GrantFiled: November 30, 2007Date of Patent: December 30, 2008Assignee: Panasonic CorporationInventors: Tatsuhiko Suzuki, Hiroki Takeshima
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Patent number: 7471092Abstract: A test apparatus to test a device under test (DUT) to which a reference voltage of a predetermined high voltage is supplied is provided.Type: GrantFiled: January 26, 2007Date of Patent: December 30, 2008Assignee: Advantest CorporationInventors: Seiji Amanuma, Ken-ichiro Hatake
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Patent number: 7471093Abstract: A capacitive humidity sensor includes a detecting portion and a reference portion. The detecting portion includes a first sensor element, and a capacitance of the first sensor element varies in accordance with humidity. The reference portion includes a second sensor element and a capacitor. The second sensor element is connected to the first sensor element in series, and a capacitance of the second sensor element varies in accordance with the humidity. The capacitor has a constant capacitance relative to a humidity variation. The first sensor element has a gradient of a capacitance variation to the humidity variation, which is different from a gradient of the second sensor element.Type: GrantFiled: February 8, 2007Date of Patent: December 30, 2008Assignee: DENSO CORPORATIONInventor: Naoki Arisaka
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Patent number: 7471094Abstract: A probe card assembly comprises multiple probe substrates attached to a mounting assembly. Each probe substrate includes a set of probes, and together, the sets of probes on each probe substrate compose an array of probes for contacting a device to be tested. Adjustment mechanisms are configured to impart forces to each probe substrate to move individually each substrate with respect to the mounting assembly. The adjustment mechanisms may translate each probe substrate in an “x,” “y,” and/or “z” direction and may further rotate each probe substrate about any one or more of the forgoing directions. The adjustment mechanisms may further change a shape of one or more of the probe substrates. The probes can thus be aligned and/or planarized with respect to contacts on the device to be tested.Type: GrantFiled: June 24, 2005Date of Patent: December 30, 2008Assignee: FormFactor, Inc.Inventors: Eric D. Hobbs, Benjamin N. Eldridge, Lunyu Ma, Gaetan L. Mathieu, Steven T. Murphy, Makarand S. Shinde, Alexander H. Slocum
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Patent number: 7471095Abstract: An electrical connecting apparatus is used for electrical inspection of a device under test having electrodes each of which a recess is formed on a flat upside. The electrical connecting apparatus is provided with a plurality of probes, each probe including a base portion combined with a probe board, an elastically deformable arm portion extending above the electrodes of the device under test from the base portion along the probe board and at a distance therefrom, and a tip portion projecting from the arm portion in a direction to be away from the probe board. The front end of the tip portion of each probe can abut a flat surface area except the recess on the upside of the electrode in a state that no flexural deformation is caused in the arm portion.Type: GrantFiled: November 13, 2007Date of Patent: December 30, 2008Assignee: Kabushiki Kaisha Nihon MicronicsInventors: Satoshi Narita, Yoko Ichinohe, Nobuyuki Yamaguchi
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Patent number: 7471096Abstract: A contactor for electronic parts can provide an appropriate and uniform contact with respect to a plurality of electrode terminals in an electronic part such as an IC. Each of a plurality of contact members has a first contact portion on one end thereof and a second contact portion on the other end thereof, the first contract portion having a recessed portion that receives one of the electrode terminals of the electronic part. A base accommodates and supports the plurality of the contact members. The first contact portion is movable in a horizontal direction.Type: GrantFiled: January 26, 2006Date of Patent: December 30, 2008Assignee: Fujitsu LimitedInventors: Naohito Kohashi, Shigeyuki Maruyama, Yoshikazu Arisaka, Hiroyuki Murotani, Katsuhiko Ono
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Patent number: 7471097Abstract: An embodiment may comprise a test probe to measure electrical properties of a semiconductor package having ball-shaped terminals. The probe may include a signal tip and a ground tip. The signal tip may have a spherical lower surface allowing good contact with a ball-shaped signal terminal. The ground tip may be extended from a lower end of a ground barrel that encloses the signal tip. The ground tip may move independent of the signal tip by means of a barrel stopper and a spring. Thus, the probe can be used regardless of the size of and the distance between the package terminals.Type: GrantFiled: February 20, 2007Date of Patent: December 30, 2008Assignee: Samsung Electronics Co., Ltd.Inventor: Sun-Won Kang
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Patent number: 7471098Abstract: An apparatus and method are provided for testing integrated circuits. An integrated circuit arrangement is provided having first and second dice. Each die has circuitry for diagnostic testing in response to a diagnostic test signal. The circuitry further defines an input for receiving the diagnostic test signal and an output for transmitting results of the diagnostic testing for each of the dice. Interconnecting circuitry between the dice transmits the diagnostic test signal transmitted to the first die to the second die before the diagnostic testing is completed in the first die.Type: GrantFiled: October 28, 2004Date of Patent: December 30, 2008Assignee: Seagate Technology LLCInventors: Robert W. Warren, Jr., Paul J. Huelskamp
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Patent number: 7471099Abstract: A semiconductor device includes a plurality of signal terminals, a first power supply terminal, a second power supply terminal, a core circuit coupled to the plurality of signal terminals and the first power supply terminal, a plurality of first transistors coupled between the respective signal terminals and the second power supply terminal, and a plurality of second transistors coupled between the respective signal terminals and a ground potential, wherein the core circuit is configured to make the first transistors conductive and nonconductive alternately and make the second transistors nonconductive and conductive alternately at a time of test operation, such that one of a first transistor and a second transistor being conductive with respect to a given signal terminal requires another one of the first transistor and the second transistor to be nonconductive with respect to the given signal terminal.Type: GrantFiled: March 22, 2005Date of Patent: December 30, 2008Assignee: Fujitsu LimitedInventors: Yuji Kurita, Hiroyoshi Yamashita, Hitoaki Nishiwaki
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Patent number: 7471100Abstract: A test head for an integrated circuit tester includes a main chassis defining a chamber that is open at the top. Tester modules are installed in the chamber, each tester module being removable as a unit from the chamber and including a tester module chassis, multiple pin electronics cards, and a tester module interface structure exposed at the top of the chamber. A test head interface structure is engageable with the tester module interface structures of the tester modules for connecting the tester module interface structures to a device interface unit.Type: GrantFiled: November 5, 2007Date of Patent: December 30, 2008Assignee: Credence Systems CorporationInventors: Wayne H. Miller, Carlos R. Ramos, Peter S. Young
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Patent number: 7471101Abstract: Systems and methods for controlling electro-migration, and reducing the deleterious effects thereof, are disclosed. Embodiments provide for reversal of an applied voltage to an integrated circuit when a measurement indicative of an extent of electro-migration indicates that a healing cycle of operation is warranted. During the healing cycle, circuits of the integrated circuit function normally, but electro-migration effects are reversed. In one embodiment, micro-electro-mechanical switches are provided at a lowest level of metallization to switch the direction of current through the levels of metallization of the integrated circuit. In another embodiment, if the measurement indicative of the extent of electro-migration exceeds a reference level by a specifiable amount, then the voltage applied to the integrated circuit is reversed in polarity to cause current to switch directions to counter electro-migration.Type: GrantFiled: November 19, 2007Date of Patent: December 30, 2008Assignee: International Business Machines CorporationInventors: Hayden Clavie Cranford, Jr., Louis Lu-Chen Hsu, James Stephen Mason, Chih-Chao Yang
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Patent number: 7471102Abstract: In one embodiment, the present invention includes an oscillator to generate a first frequency and a second frequency. The oscillator includes a plurality of stage cells, each stage cell including a first transistor of a first polarity and a second transistor of a second polarity, each coupled between a first voltage node and a first intermediate node and an inverter coupled to the first intermediate node. In operation, a difference between the first frequency and the second frequency is proportional to a threshold voltage of the second transistor. Other embodiments are described and claimed.Type: GrantFiled: February 23, 2007Date of Patent: December 30, 2008Assignee: Intel CorporationInventors: Atul Maheshwari, Greg Taylor
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Patent number: 7471103Abstract: A logic gate is described that implements complex logic within a memory array. The logic gate receives at least three of a first storage cell signal, a second storage cell signal, a first external signal, or a second external signal at a first input circuitry and second input circuitry. The logic gate then performs one of a set of logic functions using the first storage cell signal, the second storage cell signal, the first external signal, or the second external signal. The set of logic functions includes at least one of a matching function, an OR-AND function, or an AND function.Type: GrantFiled: December 6, 2006Date of Patent: December 30, 2008Assignee: International Business Machines CorporationInventors: Andrew James Bianchi, Jose Angel Paredes
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Patent number: 7471104Abstract: Lookup table circuits (LUTS) having multiple stages differently optimized to balance delays through the lookup table. A first multiplexing stage is optimized for a fast path from the control input to the data outputs, while a second and subsequent stage multiplexers are optimized for a fast path from data inputs to data outputs. In some embodiments, additional delay is introduced into the control inputs of the later stages, e.g., the LUT input paths with the smallest through-delays, in order to further balance the through-delays for the lookup table.Type: GrantFiled: March 31, 2008Date of Patent: December 30, 2008Assignee: Xilinx, Inc.Inventor: Manoj Chirania
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Patent number: 7471105Abstract: A level shifter and method of level shifting between an input signal and an output signal which may realize improvement s in operating speed and reductions in power consumption. An example level shifter may include a pull-up signal generation unit outputting a pull-up signal at a voltage level that is a given voltage level higher than a voltage level of an input signal, a pull-up unit pulling-up an output signal in response to the pull-up signal to generate the output signal with a shifted level, and a pull-down unit pulling-down the output signal in response to the input signal.Type: GrantFiled: December 14, 2005Date of Patent: December 30, 2008Assignee: Samsung Electronics Co., Ltd.Inventor: Yang Ki Kim
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Patent number: 7471106Abstract: A level shifter may reduce leakage current and provide firewall protection between circuits of different voltage domains when one voltage domain is in a standby mode. The level shifter may either couple or decouple input circuitry from a reference voltage in response to a firewall enable signal, may translate signal having a predetermined one of either a high or low state when the firewall enable signal is asserted.Type: GrantFiled: May 15, 2007Date of Patent: December 30, 2008Assignee: Marvell International Ltd.Inventors: Mirza Jahan, Noor Sarwar
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Patent number: 7471107Abstract: Apparatus and methods advantageously maintain transistors of open-drain differential pairs biased in the saturation region when “active,” rather in than the triode or linear region. The biasing techniques are effective over a broad range of process, voltage, and temperature (PVT) variations. By controlling a high voltage level used to drive the gate of a transistor of the differential pair, the biasing of the transistor in the saturation region is maintained. In one embodiment, the low voltage level used to cut off the transistor of the differential pair is also controlled. These techniques advantageously permit differential drivers to exhibit relatively large output swings, relatively high edge rates, relatively high return loss, and relatively good efficiency.Type: GrantFiled: May 12, 2005Date of Patent: December 30, 2008Assignee: PMC-Sierra, Inc.Inventors: Guillaume Fortin, Charles Roy, Mathieu Gagnon
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Patent number: 7471108Abstract: We describe an input circuit and method. The input circuit includes a variable reference level generator that increases a level of a reference signal in proportion to a time when an input signal transits from a low level to a high level and decreases the level of the reference signal in proportion to a time when the input signal transits from a high level to a low level. An analyzer compares the level of the input signal with the level of the reference signal, determines the level of the input signal, and outputs a signal based on the comparison. The input circuit and method widen the minimum difference between the input and reference signal to facilitate analysis of the input signal.Type: GrantFiled: December 8, 2005Date of Patent: December 30, 2008Assignee: Samsung Electronics Co., Ltd.Inventor: In-Chul Jeong
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Patent number: 7471109Abstract: Provided is an output impedance circuit, which has a constant output impedance regardless of a pad voltage, and an output buffer circuit including the output impedance circuit. The output impedance circuit includes an output stage and an impedance control stage. The output stage outputs a current corresponding to a DC bias voltage via an output terminal, and the impedance control stage controls the current flowing through the output stage in response to an output signal. The output stage includes a resistance component and a first MOS transistor. A first terminal of the resistance component is connected to the output terminal. A first terminal of the first MOS transistor is connected to a second terminal of the resistance component, a second terminal of the first MOS transistor is connected to a voltage source, and an input signal is input to a gate of the first MOS transistor.Type: GrantFiled: February 1, 2006Date of Patent: December 30, 2008Assignee: Samsung Electronics Company, Ltd.Inventors: Tae-Hyoung Kim, Uk-Rae Cho
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Patent number: 7471110Abstract: A transceiver interface for data transfer between two integrated circuits (ICs or “chips”) utilizes a current mode technique rather than conventional voltage mode differential signaling techniques. A current pulse is injected into one of two transmission wires based on a signal value to be transmitted (e.g., logic “0” or “1”) by a driver on a transmitting chip. The current pulse is received as a differential current signal at a receive block in a receiving chip. The differential signal is converted to a low swing differential voltage signal by current comparators. The differential voltage signal may be detected by an op-amp receiver which outputs the appropriate signal value.Type: GrantFiled: March 23, 2006Date of Patent: December 30, 2008Assignee: QUALCOMM IncorporatedInventors: Abhay Dixit, Mehdi Hamidi Sani, Vivek Mohan
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Patent number: 7471111Abstract: A slew-rate controlled driver circuit in an integrated circuit fabricated in a low voltage CMOS process, having an input node and an output node. A PMOS pull-up transistor is provided, having a source connected to one side of a power supply, having a gate, and having a drain connected to the output node. The PMOS transistor also has a parasitic capacitance between its gate and drain, having a value that may vary from one integrated circuit to the next from process variations and in response to varying circuit conditions. A current source generates a current having a level corresponding to the value of the parasitic capacitance, and to provide that current to the gate of the PMOS transistor. A level shifter receives an input signal having a voltage varying in a first range provides as output signal to the gate of the PMOS transistor shifted to a level suitable for the PMOS transistor.Type: GrantFiled: April 4, 2007Date of Patent: December 30, 2008Assignee: Texas Instruments IncorporatedInventors: Sumantra Seth, Ankush Goel