Abstract: A pixel structure uses a pixel electrode made of transparent conductive material to electrically connect a data line and a source electrode of a switching element of the adjacent sub-pixel region so that a plurality of sub-pixels can share the same data line. Consequently, the number of data lines can be reduced, and the aperture ratio (AR) can be improved.

Abstract: A four-mask process thin film transistor (TFT) array substrate and a method for fabricating the same is disclosed, which prevents a semiconductor tail from being formed. An open area is thus obtained and wavy noise is prevented from occurring.

Abstract: The invention relates to a nonvolatile semiconductor memory device including a semiconductor layer which has a source region, a drain region, and a channel forming region which is provided between the source region and the drain region; and a first insulating layer, a first gate electrode, a second insulating layer, and a second gate electrode which are layered over the semiconductor layer in that order. Part or all of the source and drain regions is formed using a metal silicide layer. The first gate electrode contains a noble gas element.

Abstract: Affords a GaN single-crystal mass, a method of its manufacture, and a semiconductor device and method of its manufacture, whereby when the GaN single-crystal mass is being grown, and when the grown GaN single-crystal mass is being processed into a substrate or like form, as well as when an at least single-lamina semiconductor layer is being formed onto a single-crystal GaN mass in substrate form to manufacture semiconductor devices, cracking is controlled to a minimum. The GaN single-crystal mass 10 has a wurtzitic crystalline structure and, at 30° C., its elastic constant C11 is from 348 GPa to 365 GPa and its elastic constant C13 is from 90 GPa to 98 GPa; alternatively its elastic constant C11 is from 352 GPa to 362 GPa.

Abstract: A silicon carbide semiconductor device having excellent performance characteristics and a method of manufacturing the same are obtained. An extended terrace surface is formed at a surface of an initial growth layer on a 4H—SiC substrate by annealing with the initial growth layer covered with an Si film, and then a new growth layer is epitaxially grown on the initial growth layer. A 3C—SiC portion having a polytype stable at a low temperature is grown on the extended terrace surface, and a 4H—SiC portion is grown on the other region. A trench is formed by selectively removing the 3C—SiC portion with the 4H—SiC portion remaining, and a gate electrode of a UMOSFET is formed in the trench. A channel region of the UMOSFET can be controlled to have a low-order surface, and a silicon carbide semiconductor device having high channel mobility and excellent performance characteristics is obtained.

Abstract: Semiconductor devices and methods of making thereof are provided. In one aspect, for example, a method for making a semiconductor device can include polishing a working surface of a diamond layer to a substantially flat surface, depositing a buffer layer on the working surface of the diamond layer, and depositing a semiconductor layer on the buffer layer. In one specific aspect, the c-axis of the buffer layer is oriented perpendicular to the working surface of the diamond layer.

Abstract: Semiconductor wafers having a thin layer of strained semiconductor material. These structures include a substrate; an oxide layer upon the substrate; a silicon carbide (SiC) layer upon the oxide layer, and a strained layer of a semiconductor material in a strained state upon the silicon carbide layer, or a matching layer upon the donor substrate that is made from a material that induces strain in subsequent epitaxially grown layers thereon; a strained layer of a semiconductor material of defined thickness in a strained state; and an insulating or semi-insulating layer upon the strained layer in a thickness that retains the strained state of the strained layer. The insulating or semi-insulating layers are made of silicon carbide or oxides and act to retain strain in the strained layer.

Abstract: In order to obtain a silicon carbide semiconductor device that ensures both stability of withstand voltage and reliability in high-temperature operations in its termination end-portion provided for electric-field relaxation in the perimeter of a cell portion driven as a semiconductor element, the termination end-portion is provided with an inorganic protection film having high heat resistance that is formed on an exposed surface of a well region as a first region formed on a side of the cell portion, and an organic protection film having a high electrical insulation capability with a little influence by electric charges that is formed on a surface of an electric-field relaxation region formed in contact relation to an outer lateral surface of the well region and apart from the cell portion, and on an exposed surface of the silicon carbide layer.

Abstract: Light emitting diode systems are disclosed. An optical display system that includes a light emitting diode (LED) and a cooling system is disclosed. The cooling system is configured so that, during use, the cooling system regulates a temperature of the light emitting diode.

Abstract: A display-pixel and photosensor-element device for use as a display and a camera, the device comprising a plurality of light-emitting diode (LED) display elements and a plurality of light-sensitive photosensor devices, together fabricated onto an essentially planar surface so as to create a device that can be used as a display and a camera. In an implementation, a plurality of micro-optic structures can be associated with the plurality of light-sensitive devices. In various exemplary implementations, the LEDs may comprise organic light emitting diodes (OLEDs) or stacked organic light emitting diode (SOLED). In an implementation, the light-emitting diode and the light-sensitive device are integrated into a single element. In an implementation, the device is configured to serve as either or both of a color light sensor array and a display comprising color LEDs.

Abstract: A portion of a package in which a silicon chip (101) is incorporated or a portion of an outer periphery of the package includes a light emitting unit (103) and a light receiving unit (102), the package has such a basic shape that its outer periphery includes a convex portion and a concave portion, and the light emitting unit (103) and the light receiving unit (102) are mounted on the convex portion and the concave portion. The convex portion can physically be bonded to a concave portion of another package, and the concave portion can physically be bonded to a convex portion of another package. At that time, light emitting units (103) and light receiving units (102) of the two integrated circuit packages are bonded to each other such that they are opposed to each other.

Abstract: A wafer of light emitting diodes (LEDs) is laser scribed to produce a laser scribing cut. Then, the wafer is cleaned, for example by wet etching, to reduce scribe damage. Then, electrical contact layers for the LEDs are formed on the wafer that has been cleaned. Alternatively, the scribing cut may be produced by multiple etches before contact formation. Related LEDs are also described.

Abstract: A pixel structure and a manufacturing method thereof and a display panel are provided. An electrode material layer, a shielding material layer, an inter-layer dielectric material layer, a semiconductor material layer and a photoresist-layer are sequentially formed on a substrate. The semiconductor material layer, the inter-layer dielectric material layer, the shielding material layer and the electrode material layer are patterned using the photoresist-layer as a mask to form a semiconductor pattern, an inter-layer dielectric pattern, a shielding pattern and a pixel electrode. A source/drain electrically connected to the pixel electrode and covering a portion of the semiconductor pattern is formed on the pixel electrode. A channel is another portion of the semiconductor uncovered by the source/drain.

Abstract: A chip arrangement for an optoelectronic component includes at least one semiconductor chip which emits electromagnetic radiation, and a connection arrangement which includes planes that are electrically insulated from one another, at least one plane having a cavity and at least one plane being a heat dissipating plane, wherein at least two electrically insulated conductors are arranged in at least the two planes, the semiconductor chip is arranged within the cavity and has at least two connection locations, and each of the connection locations is electrically conductively connected to a respective one of the conductors.

Abstract: An organic light emitting device includes a first electrode and second electrode on a substrate. Light emitting units are positioned between the first and second electrodes. A first light emitting unit includes a first light emitting layer, and a second light emitting unit includes a second light emitting layer. The first electrode reflects light from at least one of the light emitting units to generate an interference pattern with light emitted from the first light emitting layer. The interference pattern has a plurality of interference positions such that a first interference position is located within the first light emitting layer, and a second interference position is located within the second light emitting layer.

Abstract: A heat releasing semiconductor package, a method for manufacturing the same, and a display apparatus including the same. The heat releasing semiconductor package includes a film, an electrode pattern formed over the film, a semiconductor device mounted over the electrode pattern, and a first heat releasing layer formed over the semiconductor device including the electrode pattern, the first heat releasing layer including a first adhesive and a first heat releasing material.

Abstract: A display device includes: an optical cavity portion; and a light emitting layer, wherein a peak wavelength of an internal emission spectrum of the light emitting layer is identical to a peak wavelength of a multiple interference filter spectrum of the optical cavity portion, and wherein a color shift ? uv of white light in the display device at a viewing angle of 60° is less than or equal to 0.015. A method of adjusting a color shift of white light in a display device includes: setting a peak wavelength of a multiple interference filter spectrum obtained by an optical cavity portion in the display device equal to a peak wavelength of an internal emission spectrum of a light emitting layer in the display device; and adjusting a position of the light emitting layer in a thickness direction thereof.

Abstract: The light emitting device (10) of the present invention is provided with a light emitting layer (13), and a pair of electrodes (12 and 14) for injecting electric current into the light emitting layer (13). The light emitting layer (13) includes GaN-based semiconductor particles (21). The light emitting device (10) of the present invention is provided further with a light absorber for absorbing at least part of the light with a wavelength of 470 nm to 800 nm. The light absorber is, for example, a light absorption film (19) provided on at least a part of the surface of each of the GaN-based semiconductor particles (18). Further, the light absorber may be light absorption particles dispersed in the light emitting layer, or may be a light absorption layer disposed on the light exit side with respect to the light emitting layer.

Abstract: Light emitting devices include a gallium nitride-based epitaxial structure that includes an active light emitting region and a gallium nitride-based outer layer, for example gallium nitride. A indium nitride-based layer, such as indium gallium nitride, is provided directly on the outer layer. A reflective metal layer or a transparent conductive oxide layer is provided directly on the indium gallium nitride layer opposite the outer layer. The indium gallium nitride layer forms a direct ohmic contact with the outer layer. An ohmic metal layer need not be used. Related fabrication methods are also disclosed.

Abstract: A lighting device can include at least one optoelectronic semiconductor chip, which emits electromagnetic radiation and generates heat in operation, and a reflector. The reflector is suitable for deflecting the electromagnetic radiation and dissipating the heat generated by the optoelectronic semiconductor chip by means of a reflecting surface.

Abstract: A nitride semiconductor light-emitting diode element 1 includes a nitride semiconductor layer 12 having a bottom surface and an upper surface and containing a light emitting layer 12b inside, and a supporting substrate 11 made from a metal is bonded to the bottom surface of the nitride semiconductor layer 12. A light reflecting depression A1 to reflect light generated in the light emitting layer 12b is formed in the bottom surface of the nitride semiconductor layer 12. According to the nitride semiconductor light-emitting diode element 1, since the light generated from the light emitting layer 12b and propagated in the nitride semiconductor layer 12 in a layer direction is reflected by the light reflecting depression A1 and its travel direction is changed, the ratio of the light incident upon the upper surface of the nitride semiconductor layer 12 within a critical angle is increased.

Abstract: A thin-film LED includes an insulating substrate, an electrode on the insulating substrate, and an epitaxial structure on the electrode.

Abstract: An organic electroluminescence device including opposite anode and cathode, and a hole-transporting region, an emitting layer and an electron-transporting region in sequential order from the anode between the anode and the cathode, wherein the emitting layer is formed of a red emitting layer, a green emitting layer, and blue emitting layer; the blue emitting layer contains a host BH and a fluorescent dopant FBD; the triplet energy ETfbd of the fluorescent dopant FBD is larger than the triplet energy ETbh of the host BH; the green emitting layer contains a host GH and a phosphorescent dopant PGD; a common electron-transporting layer is provided adjacent to the red emitting layer, the green emitting layer and the blue emitting layer within the electron-transporting region; the triplet energy ETel of a material constituting the electron-transporting layer is larger than ETbh; and the difference between the affinity of the host GH and the affinity of the material constituting the electron-transporting layer is 0.

Abstract: An embodiment of this invention relates to a light emitting device. The light emitting device disclosed in the embodiment includes: a reflective layer, and a semiconductor layer which includes an emissive layer on said reflective layer, wherein the distance from the reflective layer to the center of the emissive layer corresponds to a constructive interference condition.

Abstract: The present inventions relate to optical components which include quantum confined semiconductor nanoparticles, wherein at least a portion of the nanoparticles include a ligand attached to a surface thereof, the ligand being represented by the formula: X-Sp-Z, wherein: X represents a primary amine group, a secondary amine group, a urea, a thiourea, an imidizole group, an amide group, an other nitrogen containing group, a carboxylic acid group, a phosphonic or arsonic acid group, a phosphinic or arsinic acid group, a phosphate or arsenate group, a phosphine or arsine oxide group; Sp represents a spacer group, such as a group capable of allowing a transfer of charge or an insulating group; and Z represents: (i) a reactive group capable of communicating specific chemical properties to the nanocrystal as well as provide specific chemical reactivity to the surface of the nanocrystal, and/or (ii) a group that is cyclic, halogenated, or polar a-protic.

Abstract: A light emitting device package comprises: a substrate; first and second conduction members on the substrate; a light emitting diode on the substrate, the light emitting diode being electrically connected with the first and second conduction members; and a phosphor layer on the light emitting diode.

Abstract: A radiation-emitting device with a first electrode, a first emission layer, a second emission layer and a second electrode. The invention additionally relates to a method of producing a radiation-emitting device.

Abstract: A thin-film LED includes an insulating substrate, an electrode on the insulating substrate, and an epitaxial structure on the electrode.

Abstract: There is provided a light emitting module. The light emitting module includes: a semiconductor light emitting element that emits light; and a plate-like optical wavelength conversion member that converts a wavelength of light emitted from the semiconductor light emitting element and emits light having the converted wavelength. The semiconductor light emitting element and the optical wavelength conversion member are directly bonded to each other.

Abstract: A thin-film LED includes an insulating substrate, an electrode on the insulating substrate, and an epitaxial structure on the electrode.

Abstract: The present invention discloses a light emitting device package, comprising: a metal base; an electrical circuit layer provided at an upper side of the metal base for providing a conductive path; a light emitting device mounted in a second region having a smaller thickness than a first region on the metal base; an insulating layer sandwiched between the meta base and the electrical circuit layer; an electrode layer provided at an upper side of the electrical circuit layer; and a wire for electrically connecting the electrode layer and the light emitting device. Further, there is provided a light emitting device package which is improved in light emission efficiency since the light emitting device is placed on a small thickness portion of the metal base.

Abstract: A semiconductor light-emitting device includes a semiconductor multilayer (25) including a cavity structure having two facets facing each other, and a first protective film (23a) formed on at least one of the two facets and of metal nitride. The metal nitride contains aluminum and nitrogen as main components, and at least one of yttrium and lanthanum.

Abstract: A light emitting device, which can be efficiently manufactured and maintain a stable light emitting property for a long period, is provided. The light emitting device comprises a first resin forming body including a periphery that forms a recess to house a light emitting element and a bottom that forms a bottom portion of the recess, and a second resin forming body which covers the light emitting element. The first resin forming body is composed of a thermosetting epoxy resin composite whose essential component is an epoxy resin. The bottom covers surfaces of lead frames excluding mounting regions of the light emitting element and wires. A thickness of the bottom is formed thinner than a thickness from the surface of the lead frames to a leading end of the light emitting element.

Abstract: Apparatus may be provided including a high power light emitting diode (LED) unit, at least one printed circuit board, and an interfacing portion of a heat sink structure. The high power LED unit includes at least one LED die, at least one first lead and at least one second lead, and a heat sink interface. The at least one printed circuit board includes a conductive pattern configured to connect both the at least one first lead and the at least one second lead to a current source. The interfacing portion of the heat sink structure is that portion through which a majority of heat of the heat sink interface is transmitted. The interfacing portion is directly in touching contact with a majority of a heat transfer area of the heat sink interface.

Abstract: Disclosed are a light emitting device, a method of manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes a conductive support member, a light emitting structure layer including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the conductive support member, and an electrode on the light emitting structure layer. The conductive support member has a curved lateral surface recessed inward.

Abstract: A optoelectronic device comprises a semiconductor stack layer; a first transparent conductive oxide (abbreviate as “TCO” hereinafter) layer located on the semiconductor stack layer, wherein the first TCO layer has at least one opening; and a second TCO layer covering the first TCO layer, wherein the second TCO layer is filled into the opening of the first TCO layer and contacted with the semiconductor stack layer, and one of the first TCO layer and the second TCO layer forms an ohmic contact with the semiconductor stack layer.

Abstract: A light emitting device includes a package equipped on a front face with a window for installing a light emitting element, and outer lead electrodes that protrude from a bottom face of the package. The package has, on the bottom face, two side face convex components provided on the side face sides and a center convex component provided at a center. The outer lead electrodes are housed in a concave components defined by the side face convex components and the center convex component. The side face convex component has groove provided on the side face.

Abstract: A semiconductor device includes a first semiconductor layer and a second semiconductor layer of opposite conductivity type, a first epitaxial layer of the first conductivity type formed on sidewalls of the trenches, and a second epitaxial layer of the second conductivity type formed on the first epitaxial layer where the second epitaxial layer is electrically connected to the second semiconductor layer. The first epitaxial layer and the second epitaxial layer form parallel doped regions along the sidewalls of the trenches, each having uniform doping concentration. The second epitaxial layer has a first thickness and a first doping concentration and the first epitaxial layer and a mesa of the first semiconductor layer together having a second thickness and a second average doping concentration where the first and second thicknesses and the first doping concentration and second average doping concentrations are selected to achieve charge balance in operation.

Abstract: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes. In another embodiment, the ESD devices has an asymmetrical characteristic.

Abstract: The present invention provides a fabrication method of a semiconductor substrate, by which a planar GaN substrate that is easily separated can be fabricated on a heterogeneous substrate, and a semiconductor device which is fabricated using the GaN substrate. The semiconductor substrate comprises a substrate, a first semiconductor layer arranged on the substrate, a metallic material layer arranged on the first semiconductor layer, a second semiconductor layer arranged on the first semiconductor layer and the metallic material layer, and voids formed in the first semiconductor layer under the metallic material layer.

Abstract: A semiconductor structure is formed of nitrides of group III metals having wurtzite crystal structure and grown in vapor phase on a (0001) oriented semiconductor substrate. The structure comprises a bottom cladding layer, a top cladding layer, and a diffusion region positioned between the cladding layers for diffusing light propagating within the semiconductor structure. The diffuse region has refractive index different from those of the cladding layers and non-flat surfaces for providing light diffusing interfaces between the diffusion region and the cladding layers. According to the invention, the diffusion region comprises a plurality of diffusion layers, compositions and thicknesses of said diffusion layers having been chosen to avoid formation of strain-induced dislocations in the diffusion region, and adjacent diffusion layers having different refractive indices in order to further enhance the diffusion efficiency.

Abstract: One embodiment of a semiconductor device according to the present invention includes a substrate, a base compound semiconductor layer layered on the substrate to form a base, a channel defining compound semiconductor layer layered on the base compound semiconductor layer to define a channel, and an impact ionization control layer that is layered within a layering range of the base compound semiconductor layer and controls the location of impact ionization, wherein the base compound semiconductor layer is formed of a first compound semiconductor, the channel defining compound semiconductor layer is formed of a second compound semiconductor, and the impact ionization control layer is formed of a third compound semiconductor that has a smaller band gap than the first compound semiconductor.

Abstract: High frequency performance of (e.g., silicon) bipolar devices is improved by reducing the extrinsic base resistance Rbx. Emitter, base and collector regions are formed in or on a semiconductor substrate. The emitter contact has a portion that overhangs a portion of the extrinsic base contact, thereby forming a cave-like cavity between the overhanging portion of the emitter contact and the underlying regions of the extrinsic base contact. When the emitter contact and the extrinsic base contact are silicided, some of the metal atoms forming the silicide penetrate into the cavity so that the highly conductive silicided extrinsic base contact extends under the edge of the emitter contact closer to the base itself, thereby reducing Rbx. Smaller Rbx provides transistors with higher fMAX.

Abstract: A hetero-junction bipolar transistor includes a sub-collector layer formed on a substrate and having conductivity, a first collector layer formed on the sub-collector layer and a second collector layer formed on the first collector layer and having the same conductive type as a conductive type of the sub-collector layer. In the first collector layer, a delta-doped layer is provided.

Abstract: A nitride semiconductor device includes: a first layer made of a first nitride semiconductor; a second layer provided on the first layer and made of a second nitride semiconductor having a larger band gap than the first nitride semiconductor; a first electrode electrically connected to the second layer; a second electrode provided on the second layer and juxtaposed to the first electrode in a first direction; and a floating electrode provided on the second layer, the floating electrode including: a portion sandwiched by the second electrode in a second direction orthogonal to the first direction; and a portion protruding from the second electrode toward the first electrode.

Abstract: Embodiments of a pixel that includes a photosensitive region, a floating diffusion region, and a transistor transfer gate disposed between the photosensitive region and the floating diffusion region. The transfer gate includes first and second transfer gate elements, the first transfer gate element having a different doping than the second transfer gate element. By controlling the doping of the first and second transfer gate elements a transfer gate can be provided with a greater threshold voltage near the photosensitive region and a lesser threshold voltage near the floating diffusion region. Other embodiments, including process embodiments, are disclosed and claimed.

Abstract: A method for producing a device including at least one integrated circuit and at least one N/MEMS. The method produces the N/MEMS in at least one upper layer arranged at least above a first section of a substrate, produces the integrated circuit in a second section of the substrate and/or in a semiconductor layer arranged at least above the second section of the substrate, and further produces a cover encapsulating the N/MEMS from at least one layer used for production of a gate in the integrated circuit and/or for producing at least one electrical contact of the integrated circuit.

Abstract: The present invention discloses a capacitive MEMS switch on top of a semiconductor substrate containing a CMOS driving circuitry. The capacitive MEMS switch disclosed includes: 1) a semiconductor substrate containing a driving circuitry inside, and first and second conductors as well as a bottom electrode on top; 2) a suspended composite beam above and anchored onto the semiconductor substrate, containing a top electrode aligned to the bottom electrode with a first vertical distance, a top conductor, capped by a dielectric layer, having a first and second contact tips aligned with the first and second bottom conductors with a second vertical distance differentially smaller than the first vertical distance. The electrostatic attraction generated between the top electrode and the bottom electrode pulls the first and second contact tips in physical contact with and electrically connects the first and second bottom conductors through the top conductor.

Abstract: An integrated circuit on a (100) substrate containing an n-channel extended drain MOS transistor with drift region current flow oriented in the <100> direction with stressor RESURF trenches in the drift region. The stressor RESURF trenches have stressor elements with more than 100 MPa compressive stress. An integrated circuit on a (100) substrate containing an n-channel extended drain MOS transistor with drift region current flow oriented in the <110> direction with stressor RESURF trenches in the drift region. The stressor RESURF trenches have stressor elements with more than 100 MPa compressive stress. An integrated circuit on a (100) substrate containing a p-channel extended drain MOS transistor with drift region current flow oriented in a <110> direction with stressor RESURF trenches in the drift region. The stressor RESURF trenches have stressor elements with more than 100 MPa tensile stress.

Abstract: A semiconductor device includes a semiconductor substrate, and an extending semiconductor portion that extends vertically from the semiconductor substrate. The extending semiconductor portion has a side surface which comprises four main surfaces of {100} face and four sub-surfaces of {110} face. The four sub-surfaces are smaller in area than the four main surfaces.