Abstract: Embodiments of the invention place surface-mount such as decoupling capacitors, resistors or other devices directly on the underside of a ball grid array (BGA) electronic integrated circuit (EIC) package, between BGA pads.

Abstract: Embodiments of the invention place surface-mount devices such as decoupling capacitors, resistors or other devices directly on the underside of a ball grid array (BGA) electronic integrated circuit (EIC) package, in place of de-populated BGA pads.

Abstract: A flip chip structure formed on a semiconductor substrate includes a first plurality of copper pillars positioned directly over, and in electrical contact with respective ones of a plurality of contact pads on the front face of the semiconductor substrate. A layer of molding compound is positioned on the front face of the substrate, surrounding and enclosing each of the first plurality of pillars and having a front face that is coplanar with front faces of each of the copper pillars. Each of a second plurality of copper pillars is positioned on the front face of one of the first plurality of copper pillars, and a solder bump is positioned on a front face of each of the second plurality of pillars.

Abstract: A multi-die package includes a first semiconductor die and a second semiconductor die each having an upper surface with a plurality of bond pads positioned thereon. The multi-die package also includes a plurality of bonding wires each coupling one of the bond pads on the upper surface of the first semiconductor die to a corresponding one of the bond pads on the upper surface of the second semiconductor die. A bonding wire of the plurality of bonding wires includes a first portion extending upward from one of the second plurality of bond pads substantially along a z-axis and curving outward substantially along x and y axes in a direction towards the first semiconductor die. The bonding wire also includes a second portion coupled to the first portion and extending from the first portion downward to one of the first plurality of bond pads on the upper surface of the first semiconductor die.

Abstract: A method and system of stacking and aligning a plurality of integrated circuits. The method includes the steps of providing a first integrated circuit having at least one funnel-shaped socket, providing a second integrated circuit, aligning at least one protrusion on the second integrated circuit with the at least one funnel-shaped socket, and bonding the first integrated circuit to the second integrated circuit. The system includes a first integrated circuit having at least one funnel-shaped socket, a metallization-diffusion barrier disposed on the interior of the funnel-shaped socket, and a second integrated circuit. The at least one funnel-shaped socket is adapted to receive a portion of the second integrated circuit.

Abstract: An integrated circuit structure includes a semiconductor substrate and a hard mask layer formed on the semiconductor substrate. The integrated circuit structure further includes at least a conductive layer formed in the hard mask layer and a via extending from the hard mask layer to at least a portion of the semiconductor substrate, wherein the via has a round corner and a tapered sidewall.

Abstract: A method for producing a substrate with a copper or a copper-containing coating is disclosed. The method comprises a first step wherein a first precursor, a second precursor and a substrate are provided. The first precursor is a copper complex that contains no fluorine and the second precursor is selected from a ruthenium complex, a nickel complex, a palladium complex or mixtures thereof. In the second step, a layer is deposited at least on partial regions of a surface of the substrate by using the first precursor and the second precursor by means of atomic layer deposition (ALD). The molar ratio of the first precursor:second precursor used for the ALD extends from 90:10 to 99.99:0.01. The obtained layer contains copper and at least one of ruthenium, nickel and palladium. Finally, a reduction is performed step in which a reducing agent acts on the substrate obtained after depositing the copper-containing layer.

Abstract: A metal interconnect structure and a method of manufacturing the metal interconnect structure. Manganese (Mn) is incorporated into a copper (Cu) interconnect structure in order to modify the microstructure to achieve bamboo-style grain boundaries in sub-90 nm technologies. Preferably, bamboo grains are separated at distances less than the “Blech” length so that copper (Cu) diffusion through grain boundaries is avoided. The added Mn also triggers the growth of Cu grains down to the bottom surface of the metal line so that a true bamboo microstructure reaching to the bottom surface is formed and the Cu diffusion mechanism along grain boundaries oriented along the length of the metal line is eliminated.

Abstract: One or more embodiments relate to a semiconductor structure, comprising: a barrier layer overlying a workpiece surface; a seed layer overlying the barrier layer; an inhibitor layer overlying said seed layer, the inhibitor layer having a opening exposing a portion of the seed layer, and a fill layer overlying the exposed portion of the seed layer.

Abstract: According to one embodiment, a design method of layout formed by a sidewall method is provided. The method includes: preparing a base pattern on which a plurality of first patterns extending in a first direction and arranged at a first space in a second direction intersecting the first direction and a plurality of second patterns extending in the first direction and arranged at a center between the first patterns, respectively, are provided; and drawing a connecting portion which extends in the second direction and connects two neighboring first patterns sandwiching one of the second patterns, and separating the one of the second patterns into two patterns not contacting the connecting portion.

Abstract: In a method for fabricating a semiconductor device, first, a first metal interconnect is formed in an interconnect formation region, and a second metal interconnect is formed in a seal ring region. Subsequently, by chemical mechanical polishing or etching, the upper portions of the first metal interconnect and the second metal interconnect are recessed to form recesses. A second insulating film filling the recesses is then formed above a substrate, and the upper portion of the second insulating film is planarized. Next, a hole and a trench are formed to extend halfway through the second insulating film, and ashing and polymer removal are performed. Subsequently to this, the hole and the trench are allowed to reach the first metal interconnect and the second metal interconnect.

Abstract: A semiconductor device is disclosed that comprises a first non-volatile memory cell, a second non-volatile memory cell, an active region between the first and second memory cells, and an electrically conductive contact touching the active region, wherein the contact has a horizontal cross-section that is at least five percent smaller in a first dimension than in a second dimension.

Abstract: A method includes forming a metal hard mask over a low-k dielectric layer. The step of forming the metal hard mask includes depositing a sub-layer of the metal hard mask, and performing a plasma treatment on the sub-layer of the metal hard mask. The metal hard mask is patterned to form an opening. The low-k dielectric layer is etched to form a trench, wherein the step of etching is performed using the metal hard mask as an etching mask.

Abstract: Generally, the subject matter disclosed herein relates to sophisticated semiconductor chips that may be less susceptible to the occurrence of white bumps during semiconductor chip packaging operations, such as flip-chip or 3D-chip assembly, and the like. One illustrative semiconductor chip disclosed herein includes, among other things, a bond pad and a metallization layer below the bond pad, wherein the metallization layer is made up of a bond pad area below the bond pad and a field area surrounding the bond pad area. Additionally, the semiconductor device also includes a plurality of device features in the metallization layer, wherein the plurality of device features has a first feature density in the bond pad area and a second feature density in the field area that is less than the first feature density.

Abstract: A 3D integrated circuit including a first wafer and a second wafer is provided. The first wafer includes a first conduction pattern. The second wafer includes a second conduction pattern which is electrically connected to the first conduction pattern. A displacement between the first wafer and the second wafer is determined by a resistance of the first conduction pattern and the second conduction pattern.

Abstract: Also in a semiconductor integrated circuit device including a copper embedded wiring as a main wiring layer, generally, the uppermost-layer wiring layer is often an aluminum-based pad layer in order to ensure wire bonding characteristics. The aluminum-based pad layer is also generally used as a wiring layer (general intercoupling wiring such as power source wiring or signal wiring). However, such a general intercoupling wiring has a relatively large wiring length. This causes a demerit for the device to be susceptible to damages during a plasma treatment due to the antenna effect, and other demerits. With the present invention, in a semiconductor integrated circuit device including a metal multilayer wiring system having a lower-layer embedded type multilayer wiring layer and an upper-layer non-embedded type aluminum-based pad metal layer, the non-embedded type aluminum-based pad metal layer substantially does not have a power supply ring wiring.

Abstract: A wiring substrate includes: a substrate body made of an inorganic material; a first electrode portion, having a flat-plate shape, which penetrates through the substrate body in a thickness direction of the substrate body; a second electrode portion, having a flat-plate shape, which penetrates through the substrate body in the thickness direction and faces the first electrode portion at a prescribed interval; and a first signal electrode, which is provided between the first electrode portion and the second electrode portion and penetrates through the substrate body in the thickness direction, wherein one of the first electrode portion and the second electrode portion is a ground electrode and the other is a power electrode.

Abstract: A bonding contact area on a semiconductor substrate is provided that includes a reinforcing structure having at least one conductive material layer arranged on the semiconductor substrate to receive the patterned reinforcing structure, a metal layer formed as a bonding contact layer with a bonding surface and arranged on a conductive material layer. Whereby, below the bonding surface, an oxide layer having at least about a 2 ?m thickness is arranged, which extends beyond the edge of the bonding surface. The reinforcing structure is arranged in the oxide layer, when viewed looking down onto the bonding surface, outside the bonding surface within the oxide layer.

Abstract: A chip stacking structure includes a first chip and a second chip. The first chip includes a surface having a first group of pads formed thereon, and the second chip includes a surface having a second group of pads formed thereon. The second group of pads is bonded onto the first group of pads to define a plurality of capillary passages extending in a same direction. The chip stacking structure further includes an underfill filling up interspaces between the first chip and the second chip. The chip stacking structure is capable of avoiding chip deformation and cracking during a bonding process.

Abstract: A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a first chip surface presenting a first chip conductive region. An electrically insulating layer includes a first layer surface presenting a first layer conductive region, and a second, opposing surface presenting a second layer conductive region. The electrically insulating layer is coupled to the first semiconductor chip by applying the first layer conductive region to the first chip conductive region. The electrically insulating layer is then coupled to the second chip conductive region by applying the second layer conductive region to the second chip conductive region.

Abstract: After formation of an opening by exposing and development of the photosensitive surface protection film and adhesive layer which is formed on the circuit side of the semiconductor wafer, the semiconductor chips having a photosensitive surface protection film and adhesive layer thereon is fabricated by cutting individual chips from the semiconductor wafer. After the second semiconductor chip is placed over the first semiconductor chip up by the suction collet, the second semiconductor chip is bonded with the first semiconductor chip by the first surface protection film and adhesive layer. The suction side of the suction collet has lower adhesion to the second semiconductor chip than that between the now bonded semiconductor chips.

Abstract: A chip packaging structure and a manufacturing method for the same are provided. The chip packaging structure includes a first chip, a second chip and a transfer component. The first chip has a plurality of first bonding pads formed on the top surface of the first chip. The second chip has a plurality of second bonding pads formed on the top surface of the second chip. The first chip and the second chip are arranged abreast and electrically connected to each other. The transfer component is disposed on the top surface of the first chip and electrically connected with the first chip. Via these arrangements, the chip packaging structure can have smaller dimensions.

Abstract: A packaged integrated circuit device includes a substrate, and a conductive pad and a chip stack on the substrate. A primary conductive line electrically connects the pad on the substrate to a conductive pad on one of the chips in the chip stack. Secondary conductive lines electrically connect the pad on the one of the chips to respective conductive pads on ones of the chips above and below the one of the chips in the chip stack. The primary conductive line may be configured to transmit a signal from the pad on the substrate to the pad on the one of the chips in the chip stack, and the secondary conductive lines may be configured to transmit the signal from the one of the chips to the ones of the chips thereabove and therebelow at a same time.

Abstract: A transistor structure includes a chip package and two pins, wherein the chip package includes a transistor die and a molding compound encapsulating the transistor die. One of the pins is electrically connected to a first bonding pad and a second bonding pad of the transistor die, and another of the pins is electrically connected to a third bonding pad of the transistor die. The transistor structure may be employed in a snubber circuit to connect an active component or a load in parallel to absorb spikes or noise generated by the active component while the active component is switching at a high frequency. Therefore, the packaging of the transistor structure could simplify the process, reduce size, increase the withstanding voltage, and improve the efficiency and reduce the spike voltage of the power supply of the snubber circuit.

Abstract: Various substrates or circuit boards for receiving a semiconductor chip and methods of processing the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first opening in a solder mask positioned on a side of a substrate. The first opening does not extend to the side. A second opening is formed in the solder mask that extends to the side. The first opening may serve as an underfill anchor site.

Abstract: A photosensitive adhesive composition comprising: (A) a polyimide having a carboxyl group as a side chain, whereof the acid value is 80 to 180 mg/KOH; (B) a photo-polymerizable compound; and (C) a photopolymerization initiator.

Abstract: A semiconductor apparatus includes a semiconductor chip, a lead frame that has a first surface having the semiconductor chip mounted thereover and a second surface opposite to the first surface, a bonding wire that couples the semiconductor chip and the lead frame, and a high-dielectric layer that is disposed over a surface of the lead frame opposite to a surface having the semiconductor chip mounted thereover and that has a relative permittivity of 5 or more. The lead frame includes a source electrode lead coupled to the source of a semiconductor device formed over the semiconductor chip and a source-wire junction at which the source electrode lead and the bonding wire are coupled together. The high-dielectric layer is disposed in a region including at least a position corresponding to the source-wire junction over the second surface of the lead frame.

Abstract: A method of manufacturing a filling of a gap region. The method includes the steps of: applying a carrier fluid and filler particles in a gap region between a first surface and a second surface; exposing the filler particles to a force field for driving the filler particles towards a preferred direction; and withholding the filler particles in a gap region by using a barrier element for forming a path of attached filler particles between the first surface and the second surface.

Abstract: The present invention relates to an epoxy resin composition for semiconductor encapsulation, including the following components (A) to (E), in which the component (D) is contained in an amount of from 0.1 to 1.

Abstract: A disc assembly of an air cleaning humidifier includes a disc member provided with assembly parts formed by cutting parts of the disc member; first and second plate members respectively disposed at both sides of the disc member; at least one fixing member inserted into a corresponding one of the assembly parts between the first and second plate members to fix the disc member; and water storage parts formed in the at least one fixing member.

Abstract: An offshore co-current vapor-liquid contacting apparatus includes stages having contacting modules. Each contacting module includes a downcomer extending in a direction and has downcomer baffles distanced from each other in the direction to define downcomer cells within the downcomer. Each downcomer includes an outlet proximate to a co-current flow channel. A receiving pan extends substantially parallel to the downcomer and has receiving pan baffles distanced from each other in the direction to define receiving pan sections within the receiving pan. A vapor-liquid separation device has an inlet surface proximate to the co-current flow channel and an outlet surface above the receiving pan. Ducts are provided, with each duct having an upper end in fluid communication with a respective receiving pan section and a lower end in fluid communication with a selected downcomer cell in an immediately inferior stage.

Abstract: The valve cover has a guide vane extending laterally and downwardly from the central portion towards and in spaced relation to the tray deck for deflecting a majority of the vapor passing upwardly through an orifice downward towards the tray deck. A de-entrainment device with a downwardly angled deflector in vertical alignment with an orifice in the tray deck may be integrated or not with the valve cover below the tray deck.

Abstract: Provided is a device for diluting a viscous substance which is advantageous in spreading a viscous substance to increase its area and allow efficient dilution of the viscous substance with a diluent. The device comprises a base body having a treatment chamber to be supplied with a viscous substance and a diluent for diluting the viscous substance; a surface element having a coating surface to be attached by the viscous substance supplied to the treatment chamber of the base body; and a movable member movable along the coating surface of the surface element and a coating element. The coating element is provided on the movable member and mechanically spreads the viscous substance attached to the coating surface of the surface element on the coating surface of the surface element in association with movement of the movable member to increase area of the viscous substance.

Abstract: A method for manufacturing an optical element includes floating an optical element material in gas to heat the optical element material, and thereafter making first and second shaping molds contact the floating optical element material at the same time, and pressurizing the optical element material by using the first and second shaping molds.

Abstract: A method for fabrication of an optically transparent and electrically conductive structural material, that includes electrospinning a nanofibrillar mat of a polymer, casting a conductive material nanowire network onto the electrospun mat, embedding the electrospun mat containing the conductive material nanowire network into a mold with bulk monomer, and polymerizing the bulk monomer with the embedded electrospun mat containing the conductive material nanowire network to create an optically transparent and electrically conductive polymer.

Abstract: A method for manufacturing a lens includes: providing a metal sheet and a stamping mold; forming a light shield of a predetermined shape and size from the metal sheet using the stamping mold; providing an injection mold, the injection mold defining a mold cavity, the mold cavity defining a molding surface that corresponds to the light shield in shape and size; placing the light shield in the mold cavity, wherein the light shield is pasted to the molding surface; and forming a lens with the light shield using the injection mold.

Abstract: A modified optical fiber comprises one Surface Light Field Emulation (s-LiFE) segment, comprising a core; a cladding; and multiple controlled nanoscale diffusion centers to emit light through the side of the optical fibers. Optionally, the modified optical fiber has a coating. The nanoscale diffusion centers are physical geometric patterns or composition patterns in the cladding or the coating. The s-LiFE optical fiber is a member of an illumination system further comprising a light source. The method of making of said s-LiFE optical fiber comprises a fiber spooning step.

Abstract: The present invention relates to a method for manufacturing a two-dimensional polymer optical waveguide, which is used for manufacturing a two-dimensional optical waveguide through simplified processes using a single imprint original master.

Abstract: A method for producing a wafer lens provided with a lens portion made of a photo-curable resin on one face of a substrate. The method includes a dispensing step, a curing step and a releasing step. In the dispensing step, a photo-curable resin material is dispensed on at least one of (i) a mold having a molding surface in a shape corresponding to an optical surface shape of the lens portion and (ii) the one face of the substrate. The photo-curable resin material has a viscosity of 10000 cP or more at 25° C. In the dispensing step, the photo-curable resin material is heated so that the viscosity of the photo-curable resin material becomes between 1000 cP and 10000 cP, and dispensed.

Abstract: A dental blank has at least an inner zone (or layer) of a first color and an outer zone (or layer) of a second color, wherein the inner and outer zones are concentric. The inner zone can be surrounded in its entirety by the outer zone such that only the outer zone is visible on all surfaces of the blank. Alternatively, the inner zone and the outer zone can extend to a same single surface of the blank, such that only the outer zone covers all remaining surfaces. The blank may also have an intermediate zone between the inner and outer zones. A method of fabrication includes solid free form processes, such as robocasting, laser sintering and 3D printing that allow for placement of multiple colors. A dental restoration made from the blank can have a variety of shades depending on a ratio of milled outer layers to internal layers.

Abstract: An absorbent manufacturing device forms an absorbent by depositing a liquid absorbent fiber and a super absorbent polymer in a deposition part. The absorbent manufacturing device includes: a plurality of suction holes that are provided in the deposition part, wherein the liquid absorbent fiber and the super absorbent polymer flowing inside a scattering duct are deposited in the deposition part by suction; a suction duct that is provided in communication with the suction holes and draws air so that the suction holes perform suction; and a separator that separates a super absorbent polymer of size equal to or larger than a certain size from a flow of air flowing in the suction duct and returns the separated super absorbent polymer to the scattering duct.

Abstract: A tire vulcanizing method reduces consumption energy and increases productivity of vulcanization. This method involves supplying an inert gas to an internal space of the tire via a supply pipe, discharging the gas from the internal space via a return pipe, and supplying the gas from the return pipe to the supply pipe by a rotation type circulation device. A heating device heats the circulated gas. An internal outlet gas temperature sensor detects a temperature of the gas in the return pipe. A controller decreases a rotating speed of the circulation device when the return pipe gas temperature is a rotating speed decrease temperature or more.

Abstract: An object of the invention is to provide a granulation method and a granulation apparatus that can reduce the manufacturing costs of pellets. There is provided a granulation method which uses an underwater cutting (UWC) device 107 that cuts a medium to be processed extruded from holes of a die 106 by using cutter blades provided in a circulation box 109 and conveys the cut pellets from the circulation box 109 while cooling the cut pellets by pellet cooling/transport water (PCW). The granulation method includes circulating the PCW and stopping the circulation of the PCW after pushing the cutter blades against the die 106 while rotating the cutter blades, before the start of the granulation; storing a predetermined amount of PCW in the circulation box 109 by discharging the PCW; and heating the PCW, which is stored in the circulation box 109, up to 69° C. or more.

Abstract: Plastic and metal are combined while maintaining the advantages of a method for preparation of an imitation metal engineering plastic composite material. The composition of the composite material comprises an engineering thermoplastic, a high-density filler, a mineral powder, a glass fiber, a toughener, a coupling agent, a lubricant and an antioxidant. The composite material features a high density, a high mechanical performance, an excellent thermal deformation temperature, and good plastic injection molding manufacturability. The method of combining the coupling agent and the optimal conditions of the particles are adopted to make the manufacturing simpler and easier, and a general twin-screw granulator can be used for producing granules, and a general plastic injection molding machine can be used in the plastic injection molding process.

Abstract: A xylylenediamine-based polyamide resin/fiber composite material and molding are provided that do not exhibit a decline in properties under high temperatures and high humidities, and that exhibit a high elastic modulus and present little warping, and exhibit better recycle characteristics, a better moldability, and a better productivity than for thermosetting resins. The polyamide resin-type composite material comprises a fibrous material (B) impregnated with a polyamide resin (A) wherein at least 50 mole % of diamine structural units derived from xylylenediamine, and having a number-average molecular weight (Mn) of 6,000 to 30,000, and containing a component of a molecular weight of not more than 1,000 at 0.5 to 5 mass %.

Abstract: In a process for producing a biopolymer nanoparticles, biopolymer feedstock and a plasticizer are fed to a feed zone of an extruder and the biopolymer feedstock is processed using shear forces. A crosslinking agent is added to the extruder downstream of the feed zone. The process has a production rate of at least 1.0 metric tons per hour. The feedstock and the plasticizer are preferably added separately to the feed zone. The extruder may have single flight elements in the feed zone. The temperatures in the intermediate section of the extruder are preferably kept above 100 C. The screw configuration may include two or more steam seal sections. Shear forces in a first section of the extruder may be greater than shear forces in an adjacent downstream section of the first section. In a post reaction section, water may be added to improve die performance.

Abstract: A method of fabricating a conformal deltoid noodle includes providing a composite prepreg material having a predetermined length and a width, the predetermined length being aligned along a longitudinal axis; subjecting the composite prepreg material to a cutting process to form a notched section coextensive along the predetermined length; and rolling the composite prepreg material along its width to create the conformal deltoid noodle.

Abstract: A method for forming an ocular drug delivery device includes the steps of: (1) forming a drug core containing an active agent, wherein the drug core has a barrier disposed all surfaces thereof except for a drug release surface which is left free of the barrier; (2) forming a drug release membrane over the drug release surface; and (3) forming the remaining portion of the device body by an overcast (overmold) process.

Abstract: To provide an insert molding method for a connector which enables terminals to be inserted easily into insertion destination places for the terminals. An insert-molding method for insert molding a connector 1 equipped with a plurality of terminals 10 integrated with a housing 40 and aligned in two rows, includes setting the plurality of terminals 10 in a housing mold 80 to uniform warping directions D of the terminals 10 so that the warping directions D are respectively directed toward outer sides of the rows of the terminals 10.

Abstract: A method of making a pump housing that is net-molded and immediately assumes its final shape and design specification without requiring more than de minimis secondary machining processes. The method utilizes molds and cores configured such that none of the fluid ports of the housing produced using the molds and cores have any intersecting geometry.