Patents Issued in August 6, 2013
  • Patent number: 8502195
    Abstract: Systems, methods and devices for the efficient photocurrent generation in single- or multi-walled carbon nanotubes, which includes (SWNTs)/poly [3-hexylthiophene-2,5-diyl] (P3HT) hybrid photovoltaics, and exhibit the following features: photocurrent measurement at individual SWNT/P3HT heterojunctions indicate that both semiconducting (s-) and metallic (m-) SWNTs function as excellent hole acceptors; electrical transport and gate voltage dependent photocurrent indicate that P3HT p-dopes both s-SWNT and m-SWNT, and exciton dissociation is driven by a built-in voltage at the heterojunction. Some embodiments include a mm2 scale SWNT/P3HT bilayer hybrid photovoltaics using horizontally aligned SWNT arrays, which exhibit greater than 90% effective external quantum efficiency, among other things, which advantageously provide carbon nanomaterial based low cost and high efficiency hybrid photovoltaics.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: August 6, 2013
    Assignee: The Regents of the University of Michigan
    Inventors: Nanditha Dissanayake, Zhaohui Zhong
  • Patent number: 8502198
    Abstract: A switching device includes at least one bottom electrode and at least one top electrode. The top electrode crosses the bottom electrode at a non-zero angle, thereby forming a junction. A metal oxide layer is established on at least one of the bottom electrode or the top electrode. A molecular layer including a monolayer of organic molecules and a source of water molecules is established in the junction. Upon introduction of a forward bias, the molecular layer facilitates a redox reaction between the electrodes, thereby reducing a tunneling gap between the electrodes.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: August 6, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: R. Stanley Williams, Zhiyong Li, Douglas Ohlberg, Philip J. Kuekes, Duncan Stewart
  • Patent number: 8502199
    Abstract: A semiconductive conjugated polymer comprising a first repeat unit comprising general formula I: where Ar1, Ar3, and Ar5 are the same or different and wherein each represents an optionally substituted aryl or heteroaryl group; Ar2 and Ar4 are the same or different and each represent a substituted aryl or heteroaryl group; and Ar2 and Ar4 sterically interact with one another so as to cause an increase in the bandgap of the polymer.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: August 6, 2013
    Assignees: Cambridge Display Technology Limited, CDT Oxford Limited
    Inventors: Brian Tierney, Mark Leadbeater, Nalinkumar Patel, Clare L. Foden, Natasha M. Conway, Mary J. McKiernan
  • Patent number: 8502200
    Abstract: The invention relates to an electroluminescent light-emitting device comprising an arrangement of organic layers which are applied to a substrate, and also to a method for its production. The arrangement of organic layers comprises the following layers: at least one charge carrier transport layer consisting of organic material, and at least one light-emitting layer consisting of organic material. The arrangement of organic layers furthermore comprises at least one doped fullerene layer which has a doping that increases the electrical conductivity.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: August 6, 2013
    Assignee: Novaled AG
    Inventors: Gregor Schwartz, Kentaro Harada, Karsten Walzer, Martin Pfeiffer, Karl Leo
  • Patent number: 8502201
    Abstract: The present invention relates to an organic thin-film light emitting device containing an organic compound represented by formula (1) and a donor compound. the light emitting device can achieve both of the low-voltage driving operation and high luminance efficiency. YA1-Ar)n1??(1) (Y represents either substituted or unsubstituted pyrene, or substituted or unsubstituted anthracene. A1 is selected from the group consisting of a single bond, an arylene group, and a hetero arylene group. Ar is selected from the group consisting of a carbazolyl group, a dibenzofuranyl group, and a dibenzothiophenyl group. These groups may be substituted or unsubstituted, and n1 is an integer of 1 to 3.).
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: August 6, 2013
    Assignee: TORAY Industries, Inc.
    Inventors: Kazumasa Nagao, Takeshi Arai, Takeshi Ikeda, Tsuyoshi Tominaga, Daisaku Tanaka, Yasunori Ichihashi, Koji Ueoka
  • Patent number: 8502202
    Abstract: An object is to provide a light-emitting element capable of emitting light with a high luminance even at a low voltage, and having a long lifetime. The light-emitting element includes n EL layers between an anode and a cathode (n is a natural number of two or more), and also includes, between m-th EL layer from the anode and (m+1)-th EL layer (m is a natural number, 1?m?n?1), a first layer including a first donor material in contact with the m-th EL layer, a second layer including an electron-transport material and a second donor material in contact with the first layer, and a third layer including a hole-transport material and an acceptor material in contact with the second layer and the (m+1)-th EL layer.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromi Nowatari, Satoshi Seo, Nobuharu Ohsawa, Takahiro Ushikubo, Tetsuo Tsutsui
  • Patent number: 8502203
    Abstract: Disclosed is a laminated structure, including a substrate, a wettability changing layer on the substrate, the wettability changing layer including a material, a critical surface tension of the material being changed by providing energy thereto, and an electrically conductor layer on the substrate, the electrically conductor layer formed on a region of the wettability changing layer, the region being provided with the energy, wherein the material includes a structural unit including a side chain and a structural unit including no side chain.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: August 6, 2013
    Assignee: Ricoh Company, Ltd.
    Inventors: Takanori Tano, Koei Suzuki, Yusuke Tsuda
  • Patent number: 8502204
    Abstract: An optoelectronic module includes a layer structure having a plurality of semiconductor layers including a substrate layer, a first layer arrangement and a second layer arrangement, wherein 1) the first layer arrangement has a light-emitting layer arranged on the substrate layer, 2) the second layer arrangement contains at least one circuit that controls an operating state of the light-emitting layer, and 3) the second layer arrangement is arranged on the substrate layer and/or surrounded by the substrate layer.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: August 6, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Dieter Eissler, Siegfried Herrmann
  • Patent number: 8502205
    Abstract: An organic light emitting diode (OLED) device and a method of manufacturing the same, the OLED device including a substrate, a first electrode on the substrate, a buffer layer on the first electrode, an emission layer on the buffer layer, and a second electrode on the emission layer, wherein the buffer layer includes a transparent conductive oxide, and a metal or metal oxide having a work function lower than a work function of the transparent conductive oxide.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: August 6, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Joon-Gu Lee, Jong-Hyuk Lee, Won-Jong Kim, Ji-Young Choung, Kyu-Ilwan Kwang, Yong-Tak Kim, Jin-Baek Choi
  • Patent number: 8502206
    Abstract: An organic light emitting diode (OLED) display device and a method of fabricating the same are disclosed.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: August 6, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Won-Kyu Lee, Kyu-Sik Cho, Tae-Hoon Yang, Byoung-Kwon Choo, Sang-Ho Moon, Bo-Kyung Choi, Yong-Hwan Park, Joon-Hoo Choi, Min-Chul Shin, Yun-Gyu Lee
  • Patent number: 8502207
    Abstract: An organic light emitting diode structure is disclosed. The hole transport layer of the organic light emitting diode structure is used as a first primary color light emitting layer. A second primary color light emitting unit and a third primary color light emitting unit are formed on the first primary color light emitting layer, and a part of the first primary color light emitting layer is exposed. A method for fabricating the organic light emitting diode structure is also disclosed.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: August 6, 2013
    Assignee: AU Optronics Corporation
    Inventor: Cheng-Hung Lin
  • Patent number: 8502208
    Abstract: An organic light-emitting device cutting off ambient light while keeping emission intensity includes a pair of first and second electrodes opposed to each other; and a plurality of organic semiconductor layers layered and disposed between the first and second electrodes, wherein the organic semiconductor layers include an organic light-emitting layer, the organic semiconductor device further comprising a light-scattering layer layered and disposed between the organic light-emitting layer and at least one of the first and second electrodes. The light-scattering layer includes: organic materials having carrier injection and transport characteristics of transporting electrons and/or holes; and plural particles dispersed among the organic materials so that light emitted from the organic light-emitting layer is passed therethrough.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: August 6, 2013
    Assignee: Pioneer Corporation
    Inventor: Takahito Oyamada
  • Patent number: 8502209
    Abstract: A polymer compound comprising a repeating unit represented by the formula (I): [wherein X1 represents an oxygen atom, a sulfur atom or N(RN)—, R1 to R4 and RN represent a hydrogen atom, a halogen atom, an alkyl group, an alkenyl group, an alkynyl group, an alkoxy group, an alkylthio group, an aryl group, an aryloxy group, an arylthio group, an arylalkyl group, an arylalkoxy group, an arylalkylthio group, an arylalkenyl group, an arylalkynyl group, a mono-valent heterocyclic group or the like.].
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: August 6, 2013
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Shota Moriwaki, Osamu Goto, Tomoko Takasuka
  • Patent number: 8502210
    Abstract: It is an object of the present invention to provide a light-emitting element having, between a pair of electrodes, a layer containing a light-emitting material and a transparent conductive film, wherein the electric erosion of the transparent conductive film and reflective metal can be prevented and to provide a light-emitting device using the light-emitting element. According to the present invention, a first layer 102 containing a light-emitting material, a second layer 103 containing an N-type semiconductor, a third layer 104 including a transparent conductive film, and a fourth layer 105 containing a hole-transporting medium are provided between an anode 101 and a cathode 106, wherein the first layer 102, the second layer 103, the third layer 104, the fourth layer 105, and the cathode 106 are provided in order, and wherein the cathode has a layer containing reflective metal.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Kumaki, Satoshi Seo
  • Patent number: 8502211
    Abstract: An organic light emitting diode display includes: a substrate having first and second regions; a first thin film transistor (TFT) including source and drain electrodes at the first region; a second TFT including source and drain electrodes at the second region; a protective layer on the first and second TFTs; a planarization layer pattern on the protective layer; a first pixel electrode electrically connected to the source electrode or the drain electrode of the first TFT through a first via contact hole through the protective layer; and a second pixel electrode electrically connected to the source electrode or the drain electrode of the second TFT through a second via contact hole formed through the protective layer and the planarization layer pattern, the planarization layer pattern corresponding to a shape of the second pixel electrode and located between the protective layer and the second pixel electrode.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: August 6, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dae-Woo Lee, Han-Hee Yoon, Kyoung-Bo Kim
  • Patent number: 8502212
    Abstract: The invention relates to an organic light emitting diode segment (100) comprising two organic light emitting diodes (102; 104), wherein the organic light emitting diodes are vertically stacked with their conducting directions pointing in opposed directions, wherein in the stack the organic light emitting diodes (102; 104) are electrically connected to each other by a common shared electrode (112).
    Type: Grant
    Filed: February 25, 2010
    Date of Patent: August 6, 2013
    Assignee: Koninklijke Philips N.V.
    Inventors: Dirk Hente, Stefan Peter Grabowski
  • Patent number: 8502213
    Abstract: A multi-layer body includes at least two functional layers on a top side of a carrier substrate, which are structured in register relationship with each other, by a procedure whereby an underside of the carrier substrate is prepared in such a way that in a first region there results a transparency for a first exposure radiation and in at least one second region there results a transparency for at least one second exposure radiation different therefrom in register relationship with the first region, the underside is successively exposed with the first and the at least one second exposure radiation and the first exposure radiation is used for structuring a first functional layer and the at least one second exposure radiation is used for structuring at least one second functional layer on the top side of the carrier substrate.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: August 6, 2013
    Assignee: OVD Kinegram AG
    Inventors: Gernot Schneider, Rene Staub, Wayne Robert Tompkin, Achim Hansen
  • Patent number: 8502214
    Abstract: An organic light emitting diode display includes a substrate, a display portion on the substrate, and a sealing substrate fixed on the substrate and sealingly engaging the display portion. The sealing substrate is fixed by an adhesive layer that surrounds the display portion. The sealing substrate includes a composite member, at least one conductive portion, and an insulation sheet. The composite member includes a resin base layer and a plurality of carbon fibers. The at least one conductive portion extends over inner and outer sides of the composite member and penetrates the composite member. The at least one conductive portion includes a double-layered structure having a metal foil layer and a plating layer. The insulation sheet is on the outer side of the composite member and the insulation sheet covers the at least one conductive portion.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: August 6, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Hun-Tae Kim
  • Patent number: 8502215
    Abstract: A semiconductor having an active layer; a gate insulating film in contact with the semiconductor; a gate electrode opposite to the active layer through the gate insulating film; a first nitride insulating film formed over the active layer; a photosensitive organic resin film formed on the first nitride insulating film; a second nitride insulating film formed on the photosensitive organic resin film; and a wiring provided on the second, nitride insulating film. A first opening portion is provided in the photosensitive organic resin film, an inner wall surface of the first opening portion is covered with the second nitride insulating film, a second opening portion is provided in a laminate including the gate insulating film, the first nitride insulating film, and the second nitride insulating film inside the first opening portion, and the semiconductor is connected with the wiring through the first opening portion and the second opening portion.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Masahiko Hayakawa, Shunpei Yamazaki
  • Patent number: 8502216
    Abstract: An object is to prevent an impurity such as moisture and oxygen from being mixed into an oxide semiconductor and suppress variation in semiconductor characteristics of a semiconductor device in which an oxide semiconductor is used. Another object is to provide a semiconductor device with high reliability. A gate insulating film provided over a substrate having an insulating surface, a source and a drain electrode which are provided over the gate insulating film, a first oxide semiconductor layer provided over the source electrode and the drain electrode, and a source and a drain region which are provided between the source electrode and the drain electrode and the first oxide semiconductor layer are provided. A barrier film is provided in contact with the first oxide semiconductor layer.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Shunpei Yamazaki
  • Patent number: 8502217
    Abstract: Provided is an oxide semiconductor device including an oxide semiconductor layer and an insulating layer coming into contact with the oxide semiconductor layer in which the insulating layer includes: a first insulating layer coming into contact with an oxide semiconductor, having a thickness of 50 nm or more, and including an oxide containing Si and O; a second insulating layer coming into contact with the first insulating layer, having a thickness of 50 nm or more, and including a nitride containing Si and N; and a third insulating layer coming into contact with the second insulating layer, the first insulating layer and the second insulating layer having hydrogen contents of 4×1021 atoms/cm3 or less, and the third insulating layer having a hydrogen content of more than 4×1021 atoms/cm3.
    Type: Grant
    Filed: November 27, 2008
    Date of Patent: August 6, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ayumu Sato, Ryo Hayashi, Hisato Yabuta, Tomohiro Watanabe
  • Patent number: 8502218
    Abstract: The present invention provides continuous, free-standing metal oxide films and methods for making said films. The methods are able to produce large-area, flexible, thin films having one or more continuous, single-crystalline metal oxide domains. The methods include the steps of forming a surfactant monolayer at the surface of an aqueous solution, wherein the headgroups of the surfactant molecules provide a metal oxide film growth template. When metal ions in the aqueous solution are exposed to the metal oxide film growth template in the presence of hydroxide ions under suitable conditions, a continuous, free-standing metal oxide film can be grown from the film growth template downward into the aqueous solution.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: August 6, 2013
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Xudong Wang, Zhenqiang Ma, Fei Wang, Jung-Hun Seo
  • Patent number: 8502219
    Abstract: A method which has a low-temperature growth step of growing a buffer layer of a ZnO-based single crystal on the substrate at a growth temperature in the range of 250° C. to 450° C. using a polar oxygen material and a metalorganic compound containing no oxygen; performing a heat treatment of the buffer layer to effect a transition of the buffer layer to a thermostable-state single crystal layer; and a high-temperature growth step of growing the ZnO-based single crystal layer on the thermostable-state single crystal layer at a growth temperature in the range of 600° C. to 900° C. using a polar oxygen material and a metalorganic compound containing no oxygen.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: August 6, 2013
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Naochika Horio, Masayuki Makishima
  • Patent number: 8502220
    Abstract: An object is to improve reliability of a semiconductor device. A semiconductor device including a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate is provided. The driver circuit portion and the display portion include thin film transistors in which a semiconductor layer includes an oxide semiconductor; a first wiring; and a second wiring. The thin film transistors each include a source electrode layer and a drain electrode layer which each have a shape whose end portions are located on an inner side than end portions of the semiconductor layer. In the thin film transistor in the driver circuit portion, the semiconductor layer is provided between a gate electrode layer and a conductive layer. The first wiring and the second wiring are electrically connected in an opening provided in a gate insulating layer through an oxide conductive layer.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Masayuki Sakakura, Yoshiaki Oikawa, Kenichi Okazaki, Hotaka Maruyama
  • Patent number: 8502221
    Abstract: An object is to stabilize electric characteristics of a semiconductor device including an oxide semiconductor to increase reliability. The semiconductor device includes an insulating film; a first metal oxide film on and in contact with the insulating film; an oxide semiconductor film partly in contact with the first metal oxide film; source and drain electrodes electrically connected to the oxide semiconductor film; a second metal oxide film partly in contact with the oxide semiconductor film; a gate insulating film on and in contact with the second metal oxide film; and a gate electrode over the gate insulating film.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8502222
    Abstract: An amorphous oxide semiconductor contains at least one element selected from In, Ga, and Zn at an atomic ratio of InxGayZnz, wherein the density M of the amorphous oxide semiconductor is represented by the relational expression (1) below: M?0.94×(7.121x+5.941y+5.675z)/(x+y+z)??(1) where 0?x?1, 0?y?1, 0?z?1, and x+y+z?0.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: August 6, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hisato Yabuta, Ayanori Endo, Nobuyuki Kaji, Ryo Hayashi
  • Patent number: 8502223
    Abstract: The present invention relates to a silicon wafer having testing pad(s) and a method for testing the same. The silicon wafer includes a silicon substrate, an insulation layer, at least one testing pad and a dielectric layer. The testing pad includes a first metal layer, a second metal layer and at least one first interconnection metal. The first metal layer is disposed on the insulation layer, and has a first area and a second area. The first area and the second area are electrically insulated with each other. The second metal layer is disposed above the first metal layer. The first interconnection metal connects the second area of the first metal layer and the second metal layer. Therefore, when a through hole and a seed layer are formed in the following processes, the through hole is estimated whether it is qualified by probing the testing pad to know whether the seed layer connects the second area of the first metal layer of the testing pad, thus the yield rate of the following processes is increased.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: August 6, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Chi-Han Chen
  • Patent number: 8502224
    Abstract: A measuring apparatus including a first chip, a first circuit layer, a first heater, a first stress sensor and a second circuit layer is provided. The first chip has a first through silicon via, a first surface and a second surface opposite to the first surface. The first circuit layer is disposed on the first surface. The first heater and the first stress sensor are disposed on the first surface and connected to the first circuit layer. The second circuit layer is disposed on the second surface.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: August 6, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Ra-Min Tain, John H. Lau, Ming-Che Hsieh, Wei Li, Ming-Ji Dai
  • Patent number: 8502225
    Abstract: An object is to improve reliability of a light-emitting device. A light-emitting device has a driver circuit portion including a transistor for a driver circuit and a pixel portion including a transistor for a pixel over one substrate. The transistor for the driver circuit and the transistor for the pixel are inverted staggered transistors each including an oxide semiconductor layer in contact with part of an oxide insulating layer. In the pixel portion, a color filter layer and a light-emitting element are provided over the oxide insulating layer. In the transistor for the driver circuit, a conductive layer overlapping with a gate electrode layer and the oxide semiconductor layer is provided over the oxide insulating layer. The gate electrode layer, a source electrode layer, and a drain electrode layer are formed using metal conductive films.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Masayuki Sakakura, Yoshiaki Oikawa, Kenichi Okazaki, Hotaka Maruyama
  • Patent number: 8502226
    Abstract: An object is to reduce parasitic capacitance of a signal line included in a liquid crystal display device. A transistor including an oxide semiconductor layer is used as a transistor provided in each pixel. Note that the oxide semiconductor layer is an oxide semiconductor layer which is highly purified by thoroughly removing impurities (hydrogen, water, or the like) which become electron suppliers (donors). Thus, the amount of leakage current (off-state current) can be reduced when the transistor is off. Therefore, a voltage applied to a liquid crystal element can be held without providing a capacitor in each pixel. In addition, a capacitor wiring extending to a pixel portion of the liquid crystal display device can be eliminated. Therefore, parasitic capacitance in a region where the signal line and the capacitor wiring intersect with each other can be eliminated.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshikazu Kondo, Jun Koyama, Shunpei Yamazaki
  • Patent number: 8502227
    Abstract: An active matrix substrate (2) is provided with first connecting wirings (641, 643, 645, 647) connected to gate terminals (51) to which extraction wirings (611, 613, 615, 617) are connected, second connecting wirings (642, 644, 646) connected to gate terminals (51) to which extraction wirings (612, 614, 616) are connected, bundled wirings (651 to 654) each composed of a mutually adjacent first connecting wiring and second connecting wiring bunched together, a first inspection wiring (66) capable of inputting an inspection signal to bunched wirings (652, 654) that are not adjacent to each other among the bundled wirings, and a second inspection wiring (67) capable of inputting an inspection signal to bundled wirings (651, 653) that are not adjacent to each other and not connected to the first inspection wiring (66) among the bundled wirings.
    Type: Grant
    Filed: May 11, 2009
    Date of Patent: August 6, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahiro Yoshida, Takehiko Kawamura, Katsuhiro Okada
  • Patent number: 8502228
    Abstract: One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present invention is an active matrix type display, having the thin film transistor array of the one embodiment and an image display means.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: August 6, 2013
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Ryohei Matsubara, Mamoru Ishizaki
  • Patent number: 8502229
    Abstract: An array substrate including a substrate having a pixel region, a gate line and a gate electrode on the substrate, the gate electrode being connected to the gate line, a gate insulating layer on the gate line and the gate electrode, an oxide semiconductor layer on the gate insulating layer, an auxiliary pattern on the oxide semiconductor layer, and source and drain electrodes on the auxiliary pattern, the source and drain electrodes being disposed over the auxiliary pattern and spaced apart from each other to expose a portion of the auxiliary pattern, the exposed portion of the auxiliary pattern exposing a channel region and including a metal oxide over the channel region, wherein a data line crosses the gate line to define the pixel region and is connected to the source electrode, a passivation layer on the source and drain electrodes and the data line.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: August 6, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Yong-Yub Kim, Chang-Il Ryoo
  • Patent number: 8502230
    Abstract: An organic light-emitting display is disclosed. In one embodiment, the display includes i) a substrate, ii) a thin film transistor formed on the substrate, and comprising i) a gate electrode, ii) an active layer electrically insulated from the gate electrode, and iii) source and drain electrodes that are electrically connected to the active layer and iii) a first electrode electrically connected to the thin film transistor. The display further includes an intermediate layer formed on the first electrode and comprising an organic emission layer and a second electrode formed on the intermediate layer, wherein the source electrode or the drain electrode has an optical blocking portion extending in the direction of substrate thickness.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: August 6, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-Han Jeong, Steve Y.G. Mo, Eun-Hyun Kim, Hyun-Sun Park
  • Patent number: 8502231
    Abstract: To realize a semiconductor device including a capacitor element capable of obtaining a sufficient capacitor without reducing an opening ratio, in which a pixel electrode is flattened in order to control a defect in orientation of liquid crystal. A semiconductor device of the present invention includes a light-shielding film formed on the thin film transistor, a capacitor insulating film formed on the light-shielding film, a conductive layer formed on the capacitor insulating film, and a pixel electrode that is formed so as to be electrically connected to the conductive layer, in which a storage capacitor element comprises the light-shielding film, the capacitor insulating film, and the conductive layer, whereby an area of a region serving as the capacitor element can be increased.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tatsuya Arao
  • Patent number: 8502232
    Abstract: A highly reliable capacitor, a semiconductor device having high operating performance and reliability, and a manufacturing method thereof are provided. A capacitor formed of a first conductive film 102, a dielectric 103 made of an insulating material, and a second conductive film 104 is characterized in that a pin hole 106 formed by chance in the dielectric 103 is filled up with an insulating material (filler) 107 made of a resin material. This can prevent short circuit between the first conductive film 102 and the second conductive film 104. The capacitor is used as a storage capacitor provided in a pixel of a semiconductor device.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Yoshiharu Hirakata, Etsuko Fujimoto, Yu Yamazaki, Shunpei Yamazaki
  • Patent number: 8502233
    Abstract: It is an object of the present invention to provide a semiconductor device, in particular, a light emitting element which can be easily manufactured with a wet method. One feature of the invention is a light emitting device including a transistor and a light emitting element. In the light emitting element, an organic layer, a light emitting layer, and a second electrode are sequentially formed over a first electrode, and the transistor is electrically connected to the light emitting element through a wiring. Here, the wiring contains aluminum, carbon, and titanium. The organic layer is formed by a wet method. The first electrode which is in contact with the organic layer is formed from indium tin oxide containing titanium oxide.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto
  • Patent number: 8502234
    Abstract: An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: August 6, 2013
    Assignee: Agovy, Inc.
    Inventors: Isik C. Kizilyalli, Hui Nie, Andrew P. Edwards, Linda Romano, David P. Bour, Richard J. Brown, Thomas R. Prunty
  • Patent number: 8502235
    Abstract: A monolithic electronic device includes a first nitride epitaxial structure including a plurality of nitride epitaxial layers. The plurality of nitride epitaxial layers include at least one common nitride epitaxial layer. A second nitride epitaxial structure is on the common nitride epitaxial layer of the first nitride epitaxial structure. A first plurality of electrical contacts is on the first epitaxial nitride structure and defines a first electronic device in the first nitride epitaxial structure. A second plurality of electrical contacts is on the first epitaxial nitride structure and defines a second electronic device in the second nitride epitaxial structure. A monolithic electronic device includes a bulk semi-insulating silicon carbide substrate having implanted source and drain regions and an implanted channel region between the source and drain regions, and a nitride epitaxial structure on the surface of the silicon carbide substrate. Corresponding methods are also disclosed.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: August 6, 2013
    Assignee: Cree, Inc.
    Inventors: Scott T. Sheppard, Adam William Saxler, Thomas Smith
  • Patent number: 8502236
    Abstract: A MOSFET, which is capable of reducing on resistance by reducing channel mobility even when a gate voltage is high, includes: an n type substrate made of SiC and having a main surface with an off angle of 50°-65° relative to a {0001} plane; an n type reverse breakdown voltage holding layer made of SiC and formed on the main surface of the substrate; a p type well region formed in the reverse breakdown voltage holding layer distant away from a first main surface thereof; a gate oxide film formed on the well region; an n type contact region disposed between the well region and the gate oxide film; a channel region connecting the n type contact region and the reverse breakdown voltage holding layer; and a gate electrode disposed on the gate oxide film. In a region including an interface between the channel region and the gate oxide film, a high-concentration nitrogen region is formed.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: August 6, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Harada, Keiji Wada, Toru Hiyoshi
  • Patent number: 8502237
    Abstract: A semiconductor rectifying device of an embodiment includes a first-conductive-type semiconductor substrate made of a wide bandgap semiconductor, a first-conductive-type semiconductor layer formed on an upper surface of the semiconductor substrate and made of the wide bandgap semiconductor having an impurity concentration lower than that of the semiconductor substrate, a first-conductive-type first semiconductor region formed at a surface of the semiconductor layer and made of the wide bandgap semiconductor, a second-conductive-type second semiconductor region formed around the first semiconductor region and made of the wide bandgap semiconductor, a second-conductive-type third semiconductor region formed around the first semiconductor region and made of the wide bandgap semiconductor having a junction depth deeper than a junction depth of the second semiconductor region, a first electrode that is formed on the first, second, and third semiconductor regions, and a second electrode formed on a lower surface of
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: August 6, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masamu Kamaga, Makoto Mizukami
  • Patent number: 8502238
    Abstract: A nitride semiconductor laser device with a reduction in internal crystal defects and an alleviation in stress, and a semiconductor optical apparatus comprising this nitride semiconductor laser device. First, a growth suppressing film against GaN crystal growth is formed on the surface of an n-type GaN substrate equipped with alternate stripes of dislocation concentrated regions showing a high density of crystal defects and low-dislocation regions so as to coat the dislocation concentrate regions. Next, the n-type GaN substrate coated with the growth suppressing film is overlaid with a nitride semiconductor layer by the epitaxial growth of GaN crystals. Further, the growth suppressing film is removed to adjust the lateral distance between a laser waveguide region and the closest dislocation concentrated region to 40 ?m or more.
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: August 6, 2013
    Assignees: Sharp Kabushiki Kaisha, Sumitomo Electric Industries, Ltd.
    Inventors: Shigetoshi Ito, Takayuki Yuasa, Yoshihiro Ueta, Mototaka Taneya, Zenpei Tani, Kensaku Motoki
  • Patent number: 8502239
    Abstract: A light emitting diode chip having a substantially transparent substrate and having an aspect ratio, which defines an elongated geometry provides enhanced efficiency and brightness. Method for forming and operating the same are also disclosed.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: August 6, 2013
    Assignee: Bridgelux, Inc.
    Inventor: Heng Liu
  • Patent number: 8502240
    Abstract: Provided are a light-emitting device package and a method of manufacturing the same. The light-emitting device package may include a plurality of light-emitting chips on one substrate (board). The plurality of light-emitting chips may produce colors around a target color. The target color may be produced by combinations of the colors of light emitted from the plurality of light-emitting chips. The colors around the target color may have the same hue as the target color and have color temperatures different from that of the target color. The plurality of light-emitting chips may have color temperatures within about ±250K of that of the target color.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: August 6, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyung-kun Kim
  • Patent number: 8502241
    Abstract: The present invention is characterized in that a transistor with its L/W set to 10 or larger is employed, and that |VDS| of the transistor is set equal to or larger than 1 V and equal to or less than |VGS?Vth|. The transistor is used as a resistor so that the resistance of a light emitting element can be held by the transistor. This slows down an increase in internal resistance of the light emitting element and the resultant current value reduction. Accordingly, a change with time in light emission luminance is reduced and the reliability is improved.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Mitsuaki Osame, Jun Koyama
  • Patent number: 8502242
    Abstract: A semiconductor device includes a first light emitting chip, the first light emitting chip having a first semiconductor layer, a second semiconductor layer, and a first active layer disposed therebetween, a second light emitting chip disposed on the first light emitting chip, the second light emitting chip having a third semiconductor layer, a fourth semiconductor layer, and a second active layer disposed therebetween, and a conductive layer disposed between the first semiconductor layer and the fourth semiconductor layer, the first semiconductor layer and the fourth semiconductor layer having different conductivity types.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: August 6, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: YuSik Kim
  • Patent number: 8502243
    Abstract: A display substrate includes a base substrate, a first dielectric layer, a first lattice pattern, a second lattice pattern, and a second dielectric layer. The first lattice pattern is disposed on the first dielectric layer at a first color pixel region. The first lattice pattern includes a plurality of first nano metal wires. The second lattice pattern is disposed on the first dielectric layer at a second color pixel region. The second lattice pattern includes a plurality of second nano metal wires. The second nano metal wires have different dimensions from the first nano metal wires. The second dielectric layer covers the first nano metal wires and the second nano metal wires.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: August 6, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun-Wuk Kim, Sung-Tae Shin, Kyeong-Hyeon Kim
  • Patent number: 8502244
    Abstract: Solid state lighting (“SSL”) devices with improved contacts and associated methods of manufacturing are disclosed herein. In one embodiment, an SSL device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The SSL device also includes a first contact on the first semiconductor material and a second contact on the second semiconductor material. The second contact is opposite the first contact. The SSL device further includes an insulative material between the first contact and the first semiconductor material, the insulative material being generally aligned with the second contact.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: August 6, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Martin F. Schubert
  • Patent number: 8502245
    Abstract: Provided is a semiconductor light emitting device. The semiconductor light emitting device comprises a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer. The active layer comprises a first active layer, a second active layer, an electron barrier layer on the first conductive type semiconductor layer. The first active layer and the second active layer comprise a quantum well layer and a quantum barrier layer. The electron barrier layer is formed between the first active layer and the second active layer. The second conductive type semiconductor layer is formed on the active layer.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: August 6, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Tae Yun Kim, Hyo Kun Son
  • Patent number: 8502246
    Abstract: A method for the fabrication of nonpolar indium gallium nitride (InGaN) films as well as nonpolar InGaN-containing device structures using metalorganic chemical vapor deposition (MOVCD). The method is used to fabricate nonpolar InGaN/GaN violet and near-ultraviolet light emitting diodes and laser diodes.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: August 6, 2013
    Assignees: The Regents of the University of California, The Japan Science and Technology Agency
    Inventors: Arpan Chakraborty, Benjamin A. Haskell, Stacia Keller, James S. Speck, Steven P. DenBaars, Shuji Nakamura, Umesh K. Mishra